source: rtems/c/src/lib/libbsp/powerpc/shared/openpic/openpic.c @ f05b2ac

4.104.114.84.95
Last change on this file since f05b2ac was f05b2ac, checked in by Ralf Corsepius <ralf.corsepius@…>, on Apr 21, 2004 at 4:01:48 PM

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1/*
2 *  openpic.c -- OpenPIC Interrupt Handling
3 *
4 *  Copyright (C) 1997 Geert Uytterhoeven
5 *
6 *  Modified to compile in RTEMS development environment
7 *  by Eric Valette
8 *
9 *  Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
10 *
11 *  The license and distribution terms for this file may be
12 *  found in found in the file LICENSE in this distribution or at
13 *  http://www.rtems.com/license/LICENSE.
14 *
15 * $Id$
16 */
17
18/*
19 *  Note: Interprocessor Interrupt (IPI) and Timer support is incomplete
20 */
21
22#include <rtems.h>
23#include <rtems/bspIo.h>
24#include <bsp/openpic.h>
25#include <bsp/pci.h>
26#include <libcpu/io.h>
27#include <libcpu/byteorder.h>
28#include <bsp.h>
29#include <rtems/bspIo.h>
30
31#ifndef NULL
32#define NULL 0
33#endif
34#define REGISTER_DEBUG
35#undef REGISTER_DEBUG
36
37volatile struct OpenPIC *OpenPIC = NULL;
38
39static unsigned int NumProcessors;
40static unsigned int NumSources;
41
42    /*
43     *  Accesses to the current processor's registers
44     */
45
46#define THIS_CPU                Processor[cpu]
47#define CHECK_THIS_CPU          check_arg_cpu(cpu)
48
49    /*
50     *  Sanity checks
51     */
52
53#if 1
54#define check_arg_ipi(ipi) \
55    if (ipi < 0 || ipi >= OPENPIC_NUM_IPI) \
56        printk("openpic.c:%d: illegal ipi %d\n", __LINE__, ipi);
57#define check_arg_timer(timer) \
58    if (timer < 0 || timer >= OPENPIC_NUM_TIMERS) \
59        printk("openpic.c:%d: illegal timer %d\n", __LINE__, timer);
60#define check_arg_vec(vec) \
61    if (vec < 0 || vec >= OPENPIC_NUM_VECTORS) \
62        printk("openpic.c:%d: illegal vector %d\n", __LINE__, vec);
63#define check_arg_pri(pri) \
64    if (pri < 0 || pri >= OPENPIC_NUM_PRI) \
65        printk("openpic.c:%d: illegal priority %d\n", __LINE__, pri);
66#define check_arg_irq(irq) \
67    if (irq < 0 || irq >= NumSources) \
68        printk("openpic.c:%d: illegal irq %d from 0x%08x,[0x%08x],[[0x%08x]]\n", \
69               __LINE__, irq, __builtin_return_address(0), \
70               __builtin_return_address(1), __builtin_return_address(2) \
71               );
72#define check_arg_cpu(cpu) \
73    if (cpu < 0 || cpu >= NumProcessors) \
74        printk("openpic.c:%d: illegal cpu %d\n", __LINE__, cpu);
75#else
76#define check_arg_ipi(ipi)      do {} while (0)
77#define check_arg_timer(timer)  do {} while (0)
78#define check_arg_vec(vec)      do {} while (0)
79#define check_arg_pri(pri)      do {} while (0)
80#define check_arg_irq(irq)      do {} while (0)
81#define check_arg_cpu(cpu)      do {} while (0)
82#endif
83
84    /*
85     *  I/O functions
86     */
87
88static inline unsigned int openpic_read(volatile unsigned int *addr)
89{
90    unsigned int val;
91
92    val = in_le32(addr);
93#ifdef REGISTER_DEBUG
94    printk("openpic_read(0x%08x) = 0x%08x\n", (unsigned int)addr, val);
95#endif
96    return val;
97}
98
99static inline void openpic_write(volatile unsigned int *addr, unsigned int val)
100{
101#ifdef REGISTER_DEBUG
102    printk("openpic_write(0x%08x, 0x%08x)\n", (unsigned int)addr, val);
103#endif
104    out_le32(addr, val);
105}
106
107static inline unsigned int openpic_readfield(volatile unsigned int *addr, unsigned int mask)
108{
109    unsigned int val = openpic_read(addr);
110    return val & mask;
111}
112
113inline void openpic_writefield(volatile unsigned int *addr, unsigned int mask,
114                                      unsigned int field)
115{
116    unsigned int val = openpic_read(addr);
117    openpic_write(addr, (val & ~mask) | (field & mask));
118}
119
120static inline void openpic_clearfield(volatile unsigned int *addr, unsigned int mask)
121{
122    openpic_writefield(addr, mask, 0);
123}
124
125static inline void openpic_setfield(volatile unsigned int *addr, unsigned int mask)
126{
127    openpic_writefield(addr, mask, mask);
128}
129
130    /*
131     *  Update a Vector/Priority register in a safe manner. The interrupt will
132     *  be disabled.
133     */
134
135static void openpic_safe_writefield(volatile unsigned int *addr, unsigned int mask,
136                                    unsigned int field)
137{
138    openpic_setfield(addr, OPENPIC_MASK);
139    /* wait until it's not in use */
140    while (openpic_read(addr) & OPENPIC_ACTIVITY);
141    openpic_writefield(addr, mask | OPENPIC_MASK, field | OPENPIC_MASK);
142}
143
144/* -------- Global Operations ---------------------------------------------- */
145
146    /*
147     *  Initialize the OpenPIC
148     *
149     * Add some kludge to use the Motorola Raven OpenPIC which does not
150     * report vendor and device id, and gets the wrong number of interrupts.
151     * (Motorola did a great job on that one!)
152     *
153     * T. Straumann, 12/20/2001: polarities and senses are now passed as
154     *                           parameters, eliminated global vars.
155     *                           IRQ0 is no longer treated specially.
156     */
157
158void openpic_init(int main_pic, unsigned char *polarities, unsigned char *senses)
159{
160    unsigned int t, i;
161    unsigned int vendorid, devid, stepping, timerfreq;
162    const char *version, *vendor, *device;
163
164    if (!OpenPIC)
165        BSP_panic("No OpenPIC found");
166
167    t = openpic_read(&OpenPIC->Global.Feature_Reporting0);
168    switch (t & OPENPIC_FEATURE_VERSION_MASK) {
169        case 1:
170            version = "1.0";
171            break;
172        case 2:
173            version = "1.2";
174            break;
175        default:
176            version = "?";
177            break;
178    }
179    NumProcessors = ((t & OPENPIC_FEATURE_LAST_PROCESSOR_MASK) >>
180                     OPENPIC_FEATURE_LAST_PROCESSOR_SHIFT) + 1;
181    NumSources = ((t & OPENPIC_FEATURE_LAST_SOURCE_MASK) >>
182                  OPENPIC_FEATURE_LAST_SOURCE_SHIFT) + 1;
183    t = openpic_read(&OpenPIC->Global.Vendor_Identification);
184
185    vendorid = t & OPENPIC_VENDOR_ID_VENDOR_ID_MASK;
186    devid = (t & OPENPIC_VENDOR_ID_DEVICE_ID_MASK) >>
187            OPENPIC_VENDOR_ID_DEVICE_ID_SHIFT;
188    stepping = (t & OPENPIC_VENDOR_ID_STEPPING_MASK) >>
189               OPENPIC_VENDOR_ID_STEPPING_SHIFT;
190
191    /* Kludge for the Raven */
192    pci_read_config_dword(0, 0, 0, 0, &t);
193    if (t == PCI_VENDOR_ID_MOTOROLA + (PCI_DEVICE_ID_MOTOROLA_RAVEN<<16)) {
194        vendor = "Motorola";
195        device = "Raven";
196        NumSources += 1;
197    } else {
198        switch (vendorid) {
199            case OPENPIC_VENDOR_ID_APPLE:
200                vendor = "Apple";
201                break;
202            default:
203                vendor = "Unknown";
204            break;
205        }
206        switch (devid) {
207            case OPENPIC_DEVICE_ID_APPLE_HYDRA:
208                device = "Hydra";
209                break;
210            default:
211                device = "Unknown";
212                break;
213        }
214    }
215    printk("OpenPIC Version %s (%d CPUs and %d IRQ sources) at 0x%08x\n", version,
216           NumProcessors, NumSources, OpenPIC);
217
218    printk("OpenPIC Vendor %d (%s), Device %d (%s), Stepping %d\n", vendorid,
219           vendor, devid, device, stepping);
220
221    timerfreq = openpic_read(&OpenPIC->Global.Timer_Frequency);
222    printk("OpenPIC timer frequency is ");
223    if (timerfreq)
224        printk("%d Hz\n", timerfreq);
225    else
226        printk("not set\n");
227
228    if ( main_pic )
229    {
230            /* Initialize timer interrupts */
231            for (i = 0; i < OPENPIC_NUM_TIMERS; i++) {
232                    /* Disabled, Priority 0 */
233                    openpic_inittimer(i, 0, OPENPIC_VEC_TIMER+i);
234                    /* No processor */
235                    openpic_maptimer(i, 0);
236            }
237
238            /* Initialize IPI interrupts */
239            for (i = 0; i < OPENPIC_NUM_IPI; i++) {
240                    /* Disabled, Priority 0 */
241                    openpic_initipi(i, 0, OPENPIC_VEC_IPI+i);
242            }
243
244            /* Initialize external interrupts */
245            for (i = 0; i < NumSources; i++) {
246                    /* Enabled, Priority 8 */
247                    openpic_initirq(i, 8, OPENPIC_VEC_SOURCE+i,
248                                        polarities ? polarities[i] : 0,
249                                        senses     ? senses[i]     : 1);
250                    /* Processor 0 */
251                    openpic_mapirq(i, 1<<0);
252            }
253
254            /* Initialize the spurious interrupt */
255            openpic_set_spurious(OPENPIC_VEC_SPURIOUS);
256#if 0
257            if (request_irq(IRQ_8259_CASCADE, no_action, SA_INTERRUPT,
258                            "82c59 cascade", NULL))
259              printk("Unable to get OpenPIC IRQ 0 for cascade\n");
260#endif
261            openpic_set_priority(0, 0);
262            openpic_disable_8259_pass_through();
263    }
264}
265
266    /*
267     *  Reset the OpenPIC
268     */
269
270void openpic_reset(void)
271{
272    openpic_setfield(&OpenPIC->Global.Global_Configuration0,
273                       OPENPIC_CONFIG_RESET);
274}
275
276    /*
277     *  Enable/disable 8259 Pass Through Mode
278     */
279
280void openpic_enable_8259_pass_through(void)
281{
282    openpic_clearfield(&OpenPIC->Global.Global_Configuration0,
283                       OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE);
284}
285
286void openpic_disable_8259_pass_through(void)
287{
288    openpic_setfield(&OpenPIC->Global.Global_Configuration0,
289                     OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE);
290}
291
292    /*
293     *  Find out the current interrupt
294     */
295
296unsigned int openpic_irq(unsigned int cpu)
297{
298    unsigned int vec;
299
300    check_arg_cpu(cpu);
301    vec = openpic_readfield(&OpenPIC->THIS_CPU.Interrupt_Acknowledge,
302                            OPENPIC_VECTOR_MASK);
303    return vec;
304}
305
306    /*
307     *  Signal end of interrupt (EOI) processing
308     */
309
310void openpic_eoi(unsigned int cpu)
311{
312    check_arg_cpu(cpu);
313    openpic_write(&OpenPIC->THIS_CPU.EOI, 0);
314}
315
316    /*
317     *  Get/set the current task priority
318     */
319
320unsigned int openpic_get_priority(unsigned int cpu)
321{
322    CHECK_THIS_CPU;
323    return openpic_readfield(&OpenPIC->THIS_CPU.Current_Task_Priority,
324                             OPENPIC_CURRENT_TASK_PRIORITY_MASK);
325}
326
327void openpic_set_priority(unsigned int cpu, unsigned int pri)
328{
329    CHECK_THIS_CPU;
330    check_arg_pri(pri);
331    openpic_writefield(&OpenPIC->THIS_CPU.Current_Task_Priority,
332                       OPENPIC_CURRENT_TASK_PRIORITY_MASK, pri);
333}
334
335    /*
336     *  Get/set the spurious vector
337     */
338
339unsigned int openpic_get_spurious(void)
340{
341    return openpic_readfield(&OpenPIC->Global.Spurious_Vector,
342                             OPENPIC_VECTOR_MASK);
343}
344
345void openpic_set_spurious(unsigned int vec)
346{
347    check_arg_vec(vec);
348    openpic_writefield(&OpenPIC->Global.Spurious_Vector, OPENPIC_VECTOR_MASK,
349                       vec);
350}
351
352    /*
353     *  Initialize one or more CPUs
354     */
355
356void openpic_init_processor(unsigned int cpumask)
357{
358    openpic_write(&OpenPIC->Global.Processor_Initialization, cpumask);
359}
360
361/* -------- Interprocessor Interrupts -------------------------------------- */
362
363    /*
364     *  Initialize an interprocessor interrupt (and disable it)
365     *
366     *  ipi: OpenPIC interprocessor interrupt number
367     *  pri: interrupt source priority
368     *  vec: the vector it will produce
369     */
370
371void openpic_initipi(unsigned int ipi, unsigned int pri, unsigned int vec)
372{
373    check_arg_timer(ipi);
374    check_arg_pri(pri);
375    check_arg_vec(vec);
376    openpic_safe_writefield(&OpenPIC->Global.IPI_Vector_Priority(ipi),
377                            OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK,
378                            (pri << OPENPIC_PRIORITY_SHIFT) | vec);
379}
380
381    /*
382     *  Send an IPI to one or more CPUs
383     */
384
385void openpic_cause_IPI(unsigned int cpu, unsigned int ipi, unsigned int cpumask)
386{
387    CHECK_THIS_CPU;
388    check_arg_ipi(ipi);
389    openpic_write(&OpenPIC->THIS_CPU.IPI_Dispatch(ipi), cpumask);
390}
391
392/* -------- Timer Interrupts ----------------------------------------------- */
393
394    /*
395     *  Initialize a timer interrupt (and disable it)
396     *
397     *  timer: OpenPIC timer number
398     *  pri: interrupt source priority
399     *  vec: the vector it will produce
400     */
401
402void openpic_inittimer(unsigned int timer, unsigned int pri, unsigned int vec)
403{
404    check_arg_timer(timer);
405    check_arg_pri(pri);
406    check_arg_vec(vec);
407    openpic_safe_writefield(&OpenPIC->Global.Timer[timer].Vector_Priority,
408                            OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK,
409                            (pri << OPENPIC_PRIORITY_SHIFT) | vec);
410}
411
412    /*
413     *  Map a timer interrupt to one or more CPUs
414     */
415
416void openpic_maptimer(unsigned int timer, unsigned int cpumask)
417{
418    check_arg_timer(timer);
419    openpic_write(&OpenPIC->Global.Timer[timer].Destination, cpumask);
420}
421
422/* -------- Interrupt Sources ---------------------------------------------- */
423
424    /*
425     *  Enable/disable an interrupt source
426     */
427
428void openpic_enable_irq(unsigned int irq)
429{
430unsigned long flags;
431    check_arg_irq(irq);
432        rtems_interrupt_disable(flags);
433    openpic_clearfield(&OpenPIC->Source[irq].Vector_Priority, OPENPIC_MASK);
434        rtems_interrupt_enable(flags);
435}
436
437void openpic_disable_irq(unsigned int irq)
438{
439unsigned long flags;
440    check_arg_irq(irq);
441        rtems_interrupt_disable(flags);
442    openpic_setfield(&OpenPIC->Source[irq].Vector_Priority, OPENPIC_MASK);
443        rtems_interrupt_enable(flags);
444}
445
446    /*
447     *  Initialize an interrupt source (and disable it!)
448     *
449     *  irq: OpenPIC interrupt number
450     *  pri: interrupt source priority
451     *  vec: the vector it will produce
452     *  pol: polarity (1 for positive, 0 for negative)
453     *  sense: 1 for level, 0 for edge
454     */
455
456void openpic_initirq(unsigned int irq, unsigned int pri, unsigned int vec, int pol, int sense)
457{
458    check_arg_irq(irq);
459    check_arg_pri(pri);
460    check_arg_vec(vec);
461    openpic_safe_writefield(&OpenPIC->Source[irq].Vector_Priority,
462                            OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK |
463                            OPENPIC_SENSE_POLARITY | OPENPIC_SENSE_LEVEL,
464                            (pri << OPENPIC_PRIORITY_SHIFT) | vec |
465                            (pol ? OPENPIC_SENSE_POLARITY : 0) |
466                            (sense ? OPENPIC_SENSE_LEVEL : 0));
467}
468
469    /*
470     *  Map an interrupt source to one or more CPUs
471     */
472
473void openpic_mapirq(unsigned int irq, unsigned int cpumask)
474{
475    check_arg_irq(irq);
476    openpic_write(&OpenPIC->Source[irq].Destination, cpumask);
477}
478
479        /*
480         * Get the current priority of an external interrupt
481         */
482unsigned int openpic_get_source_priority(unsigned int irq)
483{
484    check_arg_irq(irq);
485        return openpic_readfield(&OpenPIC->Source[irq].Vector_Priority,
486                                                         OPENPIC_PRIORITY_MASK) >> OPENPIC_PRIORITY_SHIFT;
487}
488
489void openpic_set_source_priority(unsigned int irq, unsigned int pri)
490{
491unsigned long flags;
492    check_arg_irq(irq);
493    check_arg_pri(pri);
494        rtems_interrupt_disable(flags);
495        openpic_writefield(
496                                        &OpenPIC->Source[irq].Vector_Priority,
497                                        OPENPIC_PRIORITY_MASK,
498                                        pri << OPENPIC_PRIORITY_SHIFT);
499        rtems_interrupt_enable(flags);
500}
501    /*
502     *  Set the sense for an interrupt source (and disable it!)
503     *
504     *  sense: 1 for level, 0 for edge
505     */
506
507void openpic_set_sense(unsigned int irq, int sense)
508{
509    check_arg_irq(irq);
510    openpic_safe_writefield(&OpenPIC->Source[irq].Vector_Priority,
511                            OPENPIC_SENSE_LEVEL,
512                            (sense ? OPENPIC_SENSE_LEVEL : 0));
513}
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