source: rtems/c/src/lib/libbsp/powerpc/shared/openpic/openpic.c @ 69ed59f

4.104.114.84.95
Last change on this file since 69ed59f was 69ed59f, checked in by Joel Sherrill <joel.sherrill@…>, on May 14, 2002 at 5:10:17 PM

2001-05-14 Till Straumann <strauman@…>

  • bootloader/misc.c, console/Makefile.am, console/console.c, console/consoleIo.h, console/inch.c, console/polled_io.c, console/uart.c, console/uart.h, include/bsp.h, irq/Makefile.am, irq/irq.c, irq/irq.h, irq/irq_init.c, openpic/openpic.c, openpic/openpic.h, pci/Makefile.am, pci/pci.c, pci/pci.h, residual/Makefile.am, start/start.S, startup/bspstart.c, vectors/vectors.S, vectors/vectors.h, vectors/vectors_init.c: Per PR216, "libbsp/powerpc/shared" BSP has been modified considerably with the goal to make it more flexible and reusable by other BSPs. The main strategies were:
    • eliminate hardcoded base addresses; devices use offsets and a BSP defined base address.
    • separate functionality into different files (e.g. reboot from inch.c to reboot.c) which can be overridden by a 'derived' BSP.
    • separate initialization code into separate files (e.g. PCI bridge detection/initialization was separated from the more generic PCI access routines), also to make it easier for 'derived' BSPs to substitute their own initialization code.

There are also a couple of enhancements and fixes:

  • IRQ handling code now has a hook for attaching a VME bridge.
  • OpenPIC is now explicitely initialized (polarities, senses). Eliminated the implicit assumption on the presence of an ISA PIC.
  • UART and console driver now supports more than 1 port. The current maximum of 2 can easily be extended by enlarging a table (it would even be easier if the ISR API was not broken by design).
  • fixed polled_io.c so it correctly supports console on COM2
  • fixed TLB invalidation code (start.S).
  • exception handler prints a stack backtrace.
  • added BSP_pciFindDevice() to scan the pci bus for a particular vendor/device/instance.
  • Property mode set to 100644
File size: 12.9 KB
Line 
1/*
2 *  openpic.c -- OpenPIC Interrupt Handling
3 *
4 *  Copyright (C) 1997 Geert Uytterhoeven
5 *
6 *  Modified to compile in RTEMS development environment
7 *  by Eric Valette
8 *
9 *  Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
10 *
11 *  The license and distribution terms for this file may be
12 *  found in found in the file LICENSE in this distribution or at
13 *  http://www.OARcorp.com/rtems/license.html.
14 *
15 * $Id$
16 */
17
18/*
19 *  Note: Interprocessor Interrupt (IPI) and Timer support is incomplete
20 */
21
22#include <rtems/bspIo.h>
23#include <bsp/openpic.h>
24#include <bsp/pci.h>
25#include <bsp/consoleIo.h>
26#include <libcpu/io.h>
27#include <libcpu/byteorder.h>
28#include <bsp.h>
29#include <rtems/bspIo.h>
30
31#ifndef NULL
32#define NULL 0
33#endif
34#define REGISTER_DEBUG
35#undef REGISTER_DEBUG
36
37
38volatile struct OpenPIC *OpenPIC = NULL;
39
40static unsigned int NumProcessors;
41static unsigned int NumSources;
42
43
44    /*
45     *  Accesses to the current processor's registers
46     */
47
48#define THIS_CPU                Processor[cpu]
49#define CHECK_THIS_CPU          check_arg_cpu(cpu)
50
51
52    /*
53     *  Sanity checks
54     */
55
56#if 1
57#define check_arg_ipi(ipi) \
58    if (ipi < 0 || ipi >= OPENPIC_NUM_IPI) \
59        printk("openpic.c:%d: illegal ipi %d\n", __LINE__, ipi);
60#define check_arg_timer(timer) \
61    if (timer < 0 || timer >= OPENPIC_NUM_TIMERS) \
62        printk("openpic.c:%d: illegal timer %d\n", __LINE__, timer);
63#define check_arg_vec(vec) \
64    if (vec < 0 || vec >= OPENPIC_NUM_VECTORS) \
65        printk("openpic.c:%d: illegal vector %d\n", __LINE__, vec);
66#define check_arg_pri(pri) \
67    if (pri < 0 || pri >= OPENPIC_NUM_PRI) \
68        printk("openpic.c:%d: illegal priority %d\n", __LINE__, pri);
69#define check_arg_irq(irq) \
70    if (irq < 0 || irq >= NumSources) \
71        printk("openpic.c:%d: illegal irq %d from %p,[%p],[[%p]]\n", \
72               __LINE__, irq, __builtin_return_address(0), \
73               __builtin_return_address(1), __builtin_return_address(2) \
74               );
75#define check_arg_cpu(cpu) \
76    if (cpu < 0 || cpu >= NumProcessors) \
77        printk("openpic.c:%d: illegal cpu %d\n", __LINE__, cpu);
78#else
79#define check_arg_ipi(ipi)      do {} while (0)
80#define check_arg_timer(timer)  do {} while (0)
81#define check_arg_vec(vec)      do {} while (0)
82#define check_arg_pri(pri)      do {} while (0)
83#define check_arg_irq(irq)      do {} while (0)
84#define check_arg_cpu(cpu)      do {} while (0)
85#endif
86
87
88
89    /*
90     *  I/O functions
91     */
92
93static inline unsigned int openpic_read(volatile unsigned int *addr)
94{
95    unsigned int val;
96
97    val = ld_le32(addr);
98#ifdef REGISTER_DEBUG
99    printk("openpic_read(0x%08x) = 0x%08x\n", (unsigned int)addr, val);
100#endif
101    return val;
102}
103
104static inline void openpic_write(volatile unsigned int *addr, unsigned int val)
105{
106#ifdef REGISTER_DEBUG
107    printk("openpic_write(0x%08x, 0x%08x)\n", (unsigned int)addr, val);
108#endif
109    out_le32(addr, val);
110}
111
112
113static inline unsigned int openpic_readfield(volatile unsigned int *addr, unsigned int mask)
114{
115    unsigned int val = openpic_read(addr);
116    return val & mask;
117}
118
119inline void openpic_writefield(volatile unsigned int *addr, unsigned int mask,
120                                      unsigned int field)
121{
122    unsigned int val = openpic_read(addr);
123    openpic_write(addr, (val & ~mask) | (field & mask));
124}
125
126static inline void openpic_clearfield(volatile unsigned int *addr, unsigned int mask)
127{
128    openpic_writefield(addr, mask, 0);
129}
130
131static inline void openpic_setfield(volatile unsigned int *addr, unsigned int mask)
132{
133    openpic_writefield(addr, mask, mask);
134}
135
136
137    /*
138     *  Update a Vector/Priority register in a safe manner. The interrupt will
139     *  be disabled.
140     */
141
142static void openpic_safe_writefield(volatile unsigned int *addr, unsigned int mask,
143                                    unsigned int field)
144{
145    openpic_setfield(addr, OPENPIC_MASK);
146    /* wait until it's not in use */
147    while (openpic_read(addr) & OPENPIC_ACTIVITY);
148    openpic_writefield(addr, mask | OPENPIC_MASK, field | OPENPIC_MASK);
149}
150
151
152/* -------- Global Operations ---------------------------------------------- */
153
154
155    /*
156     *  Initialize the OpenPIC
157     *
158     * Add some kludge to use the Motorola Raven OpenPIC which does not
159     * report vendor and device id, and gets the wrong number of interrupts.
160     * (Motorola did a great job on that one!)
161     *
162     * T. Straumann, 12/20/2001: polarities and senses are now passed as
163     *                           parameters, eliminated global vars.
164     *                           IRQ0 is no longer treated specially.
165     */
166
167void openpic_init(int main_pic, unsigned char *polarities, unsigned char *senses)
168{
169    unsigned int t, i;
170    unsigned int vendorid, devid, stepping, timerfreq;
171    const char *version, *vendor, *device;
172
173    if (!OpenPIC)
174        BSP_panic("No OpenPIC found");
175
176    t = openpic_read(&OpenPIC->Global.Feature_Reporting0);
177    switch (t & OPENPIC_FEATURE_VERSION_MASK) {
178        case 1:
179            version = "1.0";
180            break;
181        case 2:
182            version = "1.2";
183            break;
184        default:
185            version = "?";
186            break;
187    }
188    NumProcessors = ((t & OPENPIC_FEATURE_LAST_PROCESSOR_MASK) >>
189                     OPENPIC_FEATURE_LAST_PROCESSOR_SHIFT) + 1;
190    NumSources = ((t & OPENPIC_FEATURE_LAST_SOURCE_MASK) >>
191                  OPENPIC_FEATURE_LAST_SOURCE_SHIFT) + 1;
192    t = openpic_read(&OpenPIC->Global.Vendor_Identification);
193
194    vendorid = t & OPENPIC_VENDOR_ID_VENDOR_ID_MASK;
195    devid = (t & OPENPIC_VENDOR_ID_DEVICE_ID_MASK) >>
196            OPENPIC_VENDOR_ID_DEVICE_ID_SHIFT;
197    stepping = (t & OPENPIC_VENDOR_ID_STEPPING_MASK) >>
198               OPENPIC_VENDOR_ID_STEPPING_SHIFT;
199
200    /* Kludge for the Raven */
201    pci_read_config_dword(0, 0, 0, 0, &t);
202    if (t == PCI_VENDOR_ID_MOTOROLA + (PCI_DEVICE_ID_MOTOROLA_RAVEN<<16)) {
203        vendor = "Motorola";
204        device = "Raven";
205        NumSources += 1;
206    } else {
207        switch (vendorid) {
208            case OPENPIC_VENDOR_ID_APPLE:
209                vendor = "Apple";
210                break;
211            default:
212                vendor = "Unknown";
213            break;
214        }
215        switch (devid) {
216            case OPENPIC_DEVICE_ID_APPLE_HYDRA:
217                device = "Hydra";
218                break;
219            default:
220                device = "Unknown";
221                break;
222        }
223    }
224    printk("OpenPIC Version %s (%d CPUs and %d IRQ sources) at %p\n", version,
225           NumProcessors, NumSources, OpenPIC);
226
227    printk("OpenPIC Vendor %d (%s), Device %d (%s), Stepping %d\n", vendorid,
228           vendor, devid, device, stepping);
229
230    timerfreq = openpic_read(&OpenPIC->Global.Timer_Frequency);
231    printk("OpenPIC timer frequency is ");
232    if (timerfreq)
233        printk("%d Hz\n", timerfreq);
234    else
235        printk("not set\n");
236
237    if ( main_pic )
238    {
239            /* Initialize timer interrupts */
240            for (i = 0; i < OPENPIC_NUM_TIMERS; i++) {
241                    /* Disabled, Priority 0 */
242                    openpic_inittimer(i, 0, OPENPIC_VEC_TIMER+i);
243                    /* No processor */
244                    openpic_maptimer(i, 0);
245            }
246           
247            /* Initialize IPI interrupts */
248            for (i = 0; i < OPENPIC_NUM_IPI; i++) {
249                    /* Disabled, Priority 0 */
250                    openpic_initipi(i, 0, OPENPIC_VEC_IPI+i);
251            }
252           
253            /* Initialize external interrupts */
254            /* SIOint (8259 cascade) is special */
255            openpic_initirq(0, 8, OPENPIC_VEC_SOURCE, 1, 1);
256            /* Processor 0 */
257            openpic_mapirq(0, 1<<0);
258            for (i = 0; i < NumSources; i++) {
259                    /* Enabled, Priority 8 */
260                    openpic_initirq(i, 8, OPENPIC_VEC_SOURCE+i,
261                                        polarities ? polarities[i] : 0,
262                                        senses     ? senses[i]     : 1);
263                    /* Processor 0 */
264                    openpic_mapirq(i, 1<<0);
265            }
266           
267            /* Initialize the spurious interrupt */
268            openpic_set_spurious(OPENPIC_VEC_SPURIOUS);
269#if 0       
270            if (request_irq(IRQ_8259_CASCADE, no_action, SA_INTERRUPT,
271                            "82c59 cascade", NULL))
272              printk("Unable to get OpenPIC IRQ 0 for cascade\n");
273#endif     
274            openpic_set_priority(0, 0);
275            openpic_disable_8259_pass_through();
276    }
277}
278
279
280    /*
281     *  Reset the OpenPIC
282     */
283
284void openpic_reset(void)
285{
286    openpic_setfield(&OpenPIC->Global.Global_Configuration0,
287                       OPENPIC_CONFIG_RESET);
288}
289
290
291    /*
292     *  Enable/disable 8259 Pass Through Mode
293     */
294
295void openpic_enable_8259_pass_through(void)
296{
297    openpic_clearfield(&OpenPIC->Global.Global_Configuration0,
298                       OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE);
299}
300
301void openpic_disable_8259_pass_through(void)
302{
303    openpic_setfield(&OpenPIC->Global.Global_Configuration0,
304                     OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE);
305}
306
307
308    /*
309     *  Find out the current interrupt
310     */
311
312unsigned int openpic_irq(unsigned int cpu)
313{
314    unsigned int vec;
315
316    check_arg_cpu(cpu);
317    vec = openpic_readfield(&OpenPIC->THIS_CPU.Interrupt_Acknowledge,
318                            OPENPIC_VECTOR_MASK);
319    return vec;
320}
321
322
323    /*
324     *  Signal end of interrupt (EOI) processing
325     */
326
327void openpic_eoi(unsigned int cpu)
328{
329    check_arg_cpu(cpu);
330    openpic_write(&OpenPIC->THIS_CPU.EOI, 0);
331}
332
333
334    /*
335     *  Get/set the current task priority
336     */
337
338unsigned int openpic_get_priority(unsigned int cpu)
339{
340    CHECK_THIS_CPU;
341    return openpic_readfield(&OpenPIC->THIS_CPU.Current_Task_Priority,
342                             OPENPIC_CURRENT_TASK_PRIORITY_MASK);
343}
344
345void openpic_set_priority(unsigned int cpu, unsigned int pri)
346{
347    CHECK_THIS_CPU;
348    check_arg_pri(pri);
349    openpic_writefield(&OpenPIC->THIS_CPU.Current_Task_Priority,
350                       OPENPIC_CURRENT_TASK_PRIORITY_MASK, pri);
351}
352
353    /*
354     *  Get/set the spurious vector
355     */
356
357unsigned int openpic_get_spurious(void)
358{
359    return openpic_readfield(&OpenPIC->Global.Spurious_Vector,
360                             OPENPIC_VECTOR_MASK);
361}
362
363void openpic_set_spurious(unsigned int vec)
364{
365    check_arg_vec(vec);
366    openpic_writefield(&OpenPIC->Global.Spurious_Vector, OPENPIC_VECTOR_MASK,
367                       vec);
368}
369
370
371    /*
372     *  Initialize one or more CPUs
373     */
374
375void openpic_init_processor(unsigned int cpumask)
376{
377    openpic_write(&OpenPIC->Global.Processor_Initialization, cpumask);
378}
379
380
381/* -------- Interprocessor Interrupts -------------------------------------- */
382
383
384    /*
385     *  Initialize an interprocessor interrupt (and disable it)
386     *
387     *  ipi: OpenPIC interprocessor interrupt number
388     *  pri: interrupt source priority
389     *  vec: the vector it will produce
390     */
391
392void openpic_initipi(unsigned int ipi, unsigned int pri, unsigned int vec)
393{
394    check_arg_timer(ipi);
395    check_arg_pri(pri);
396    check_arg_vec(vec);
397    openpic_safe_writefield(&OpenPIC->Global.IPI_Vector_Priority(ipi),
398                            OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK,
399                            (pri << OPENPIC_PRIORITY_SHIFT) | vec);
400}
401
402
403    /*
404     *  Send an IPI to one or more CPUs
405     */
406
407void openpic_cause_IPI(unsigned int cpu, unsigned int ipi, unsigned int cpumask)
408{
409    CHECK_THIS_CPU;
410    check_arg_ipi(ipi);
411    openpic_write(&OpenPIC->THIS_CPU.IPI_Dispatch(ipi), cpumask);
412}
413
414
415/* -------- Timer Interrupts ----------------------------------------------- */
416
417
418    /*
419     *  Initialize a timer interrupt (and disable it)
420     *
421     *  timer: OpenPIC timer number
422     *  pri: interrupt source priority
423     *  vec: the vector it will produce
424     */
425
426void openpic_inittimer(unsigned int timer, unsigned int pri, unsigned int vec)
427{
428    check_arg_timer(timer);
429    check_arg_pri(pri);
430    check_arg_vec(vec);
431    openpic_safe_writefield(&OpenPIC->Global.Timer[timer].Vector_Priority,
432                            OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK,
433                            (pri << OPENPIC_PRIORITY_SHIFT) | vec);
434}
435
436
437    /*
438     *  Map a timer interrupt to one or more CPUs
439     */
440
441void openpic_maptimer(unsigned int timer, unsigned int cpumask)
442{
443    check_arg_timer(timer);
444    openpic_write(&OpenPIC->Global.Timer[timer].Destination, cpumask);
445}
446
447
448/* -------- Interrupt Sources ---------------------------------------------- */
449
450
451    /*
452     *  Enable/disable an interrupt source
453     */
454
455void openpic_enable_irq(unsigned int irq)
456{
457    check_arg_irq(irq);
458    openpic_clearfield(&OpenPIC->Source[irq].Vector_Priority, OPENPIC_MASK);
459}
460
461void openpic_disable_irq(unsigned int irq)
462{
463    check_arg_irq(irq);
464    openpic_setfield(&OpenPIC->Source[irq].Vector_Priority, OPENPIC_MASK);
465}
466
467
468    /*
469     *  Initialize an interrupt source (and disable it!)
470     *
471     *  irq: OpenPIC interrupt number
472     *  pri: interrupt source priority
473     *  vec: the vector it will produce
474     *  pol: polarity (1 for positive, 0 for negative)
475     *  sense: 1 for level, 0 for edge
476     */
477
478void openpic_initirq(unsigned int irq, unsigned int pri, unsigned int vec, int pol, int sense)
479{
480    check_arg_irq(irq);
481    check_arg_pri(pri);
482    check_arg_vec(vec);
483    openpic_safe_writefield(&OpenPIC->Source[irq].Vector_Priority,
484                            OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK |
485                            OPENPIC_SENSE_POLARITY | OPENPIC_SENSE_LEVEL,
486                            (pri << OPENPIC_PRIORITY_SHIFT) | vec |
487                            (pol ? OPENPIC_SENSE_POLARITY : 0) |
488                            (sense ? OPENPIC_SENSE_LEVEL : 0));
489}
490
491
492    /*
493     *  Map an interrupt source to one or more CPUs
494     */
495
496void openpic_mapirq(unsigned int irq, unsigned int cpumask)
497{
498    check_arg_irq(irq);
499    openpic_write(&OpenPIC->Source[irq].Destination, cpumask);
500}
501
502
503    /*
504     *  Set the sense for an interrupt source (and disable it!)
505     *
506     *  sense: 1 for level, 0 for edge
507     */
508
509void openpic_set_sense(unsigned int irq, int sense)
510{
511    check_arg_irq(irq);
512    openpic_safe_writefield(&OpenPIC->Source[irq].Vector_Priority,
513                            OPENPIC_SENSE_LEVEL,
514                            (sense ? OPENPIC_SENSE_LEVEL : 0));
515}
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