source: rtems/c/src/lib/libbsp/powerpc/shared/motorola/motorola.c @ 92868024

4.104.115
Last change on this file since 92868024 was 92868024, checked in by Ralf Corsepius <ralf.corsepius@…>, on 10/16/09 at 10:56:49

2009-10-16 Ralf Corsépius <ralf.corsepius@…>

  • shared/motorola/motorola.c, shared/vme/vme_universe.c: Add missing prototypes.
  • Property mode set to 100644
File size: 13.7 KB
Line 
1/* motorola.h
2 *
3 *  This include file describe the data structure and the functions implemented
4 *  by rtems to identify motorola boards.
5 *
6 *  Copyright (C) 1999 valette@crf.canon.fr
7 *
8 *  The license and distribution terms for this file may be
9 *  found in found in the file LICENSE in this distribution or at
10 *  http://www.rtems.com/license/LICENSE.
11 *
12 *  $Id$
13 */
14
15#include <bsp.h>
16#include <bsp/motorola.h>
17#include <rtems/bspIo.h>
18#include <libcpu/io.h>
19#include <string.h>
20#include <libcpu/cpuIdent.h>
21
22/*
23** Board-specific table that maps interrupt names to onboard PCI
24** peripherals as well as local PCI busses.  This table is used at
25** bspstart() to configure the interrupt name & pin for all devices that
26** do not have it already specified.  If the device is already
27** configured, we leave it alone but sanity check & print a warning if
28** we don't know about the pin/line the card gives us.
29**
30** bus = the bus number of the slot/device in question
31**
32** slot :
33**
34**   If slot != -1, it indicates a device on the given bus in that slot
35**   is to use one of the listed interrupt names given an interrupt pin.
36**
37**   If slot == -1, it means devices on this bus can occupy any slot-
38**   and for pci, this means the particular interrupt pin that the
39**   device signals is therefore dependent on the particular slot.  To
40**   work from the slot to the interrupt pin, the swizzle table is used.
41**   Once the bus and interrupt pin is known, the correct interrupt name
42**   can be pulled from the table.  The swizzle table relates the
43**   interrupt pin from the device to the particular interrupt
44**   controller interrupt pin- so it is quite reasonable for a device on
45**   bus 1 signalling interrupt pin 1 to show up at the interrupt
46**   controller as pin 4- this is why the int pin field varies for
47**   bridged pci busses.
48**
49**
50** opts = bitmap of options that control the configuration of this
51** slot/bus.
52**
53** pin_routes[] = array of pin & vectors that may serve this slot;
54**
55**      pin = the pin # which delivers an interrupt on this route, A=1,
56**      B=2, C=3, D=4
57**
58**      int_name[4] = an array of up to 4 bsp-specific interrupt name
59**      that can be used by this route.  Unused entries should be -1.
60**      The array is of primary use for slots that can be vectored thru
61**      multiple interrupt lines over the interrupt pin supplied by the
62**      record.  If more than one entry is present, the most preferable
63**      should supplied first.
64**
65*/
66
67#define NULL_PINMAP     {-1,{-1,-1,-1,-1}}
68#define NULL_INTMAP     {-1,-1,-1,{}}
69
70static struct _int_map mcp750_intmap[] = {
71
72   { 0, 16, 0, {{1,  {5, 19,-1,-1}}, /* pmc slot */
73                NULL_PINMAP}},
74
75   { 0, 14, 0, {{1,  {10,18,-1,-1}}, /* onboard ethernet */
76                NULL_PINMAP}},
77
78   { 1, -1, 0, {{1,  {24,-1,-1,-1}},
79                {2,  {25,-1,-1,-1}},
80                {3,  {26,-1,-1,-1}},
81                {4,  {27,-1,-1,-1}},
82                NULL_PINMAP}},
83
84   NULL_INTMAP };
85
86static struct _int_map mtx603_intmap[] = {
87
88   {0, 14, 0, {{1, {10,16,-1,-1}},  /* onboard ethernet */
89               NULL_PINMAP}},
90
91   {0, 12, 0, {{1, {14,18,-1,-1}},  /* onboard scsi */
92               NULL_PINMAP}},
93
94   {0, 16, 0, {{1, {25,-1,-1,-1}},  /* pci/pmc slot 1 */
95               {2, {26,-1,-1,-1}},
96               {3, {27,-1,-1,-1}},
97               {4, {28,-1,-1,-1}},
98               NULL_PINMAP}},
99
100   {0, 17, 0, {{1, {26,-1,-1,-1}},  /* pci/pmc slot 2 */
101               {2, {27,-1,-1,-1}},
102               {3, {28,-1,-1,-1}},
103               {4, {25,-1,-1,-1}},
104               NULL_PINMAP}},
105
106   {0, 18, 0, {{1, {27,-1,-1,-1}},  /* pci slot 3 */
107               {2, {28,-1,-1,-1}},
108               {3, {25,-1,-1,-1}},
109               {4, {26,-1,-1,-1}},
110               NULL_PINMAP}},
111
112   NULL_INTMAP };
113
114static struct _int_map mvme23xx_intmap[] = {
115/* Raven Hostbridge; has int_pin == 0
116   {0,  0, 0, {{0, {-1,-1,-1,-1}},
117               NULL_PINMAP}},
118*/
119
120/* Winbond PCI/ISA 83c553; has int_pin == 0
121   {0, 11, 0, {{0, {-1,-1,-1,-1}},
122               NULL_PINMAP}},
123*/
124
125#if 0 /* Leave as ISA interrupts for now */
126   {0, 13, PCI_FIXUP_OPT_OVERRIDE_NAME,
127                        {{1, {11,21,-1,-1,-1}},  /* Universe  ISA/PCI */
128                        /* strictly speaking, a non-multi function device
129                         * must only use pin A
130                         */
131                         {2, {22,-1,-1,-1,-1}},  /* Universe          */
132                         {3, {23,-1,-1,-1,-1}},  /* Universe          */
133                         {4, {24,-1,-1,-1,-1}},  /* Universe          */
134             NULL_PINMAP}},
135
136   {0, 14, PCI_FIXUP_OPT_OVERRIDE_NAME,
137                        {{1, {10,18,-1,-1}},  /* DEC Tulip enet (ISA/PCI)  */
138             NULL_PINMAP}},
139#endif
140
141   {0, 16, PCI_FIXUP_OPT_OVERRIDE_NAME,
142                        {{1, {25,-1,-1,-1}},  /* pci/pmc slot 1   */
143             {2, {26,-1,-1,-1}},
144             {3, {27,-1,-1,-1}},
145             {4, {28,-1,-1,-1}},
146             NULL_PINMAP}},
147
148   {0, 17, PCI_FIXUP_OPT_OVERRIDE_NAME,
149                        {{1, {28,-1,-1,-1}},  /* pci/pmc slot 2   */ /* orig: 0xf */
150             {2, {25,-1,-1,-1}},
151             {3, {26,-1,-1,-1}},
152             {4, {27,-1,-1,-1}},
153             NULL_PINMAP}},
154
155   NULL_INTMAP };
156
157static struct _int_map mvme24xx_intmap[] = {
158/* Raven Hostbridge; has int_pin == 0
159   {0,  0, 0, {{0, {-1,-1,-1,-1}},
160               NULL_PINMAP}},
161*/
162
163/* Winbond PCI/ISA 83c553; has int_pin == 0
164   {0, 11, 0, {{0, {-1,-1,-1,-1}},
165               NULL_PINMAP}},
166*/
167
168   {0, 13, PCI_FIXUP_OPT_OVERRIDE_NAME,
169                        {{1, {11,21,-1,-1}},  /* Universe  ISA/PCI */
170                        /* strictly speaking, a non-multi function device
171                         * must only use pin A
172                         */
173                         {2, {22,-1,-1,-1}},  /* Universe          */
174                         {3, {23,-1,-1,-1}},  /* Universe          */
175                         {4, {24,-1,-1,-1}},  /* Universe          */
176             NULL_PINMAP}},
177
178   {0, 14, PCI_FIXUP_OPT_OVERRIDE_NAME,
179                        {{1, {10,18,-1,-1}},  /* DEC Tulip enet (ISA/PCI)  */
180             NULL_PINMAP}},
181   {0, 16, PCI_FIXUP_OPT_OVERRIDE_NAME,
182            {{1, {25,-1,-1,-1}},  /* pci/pmc slot 1   */
183             {2, {26,-1,-1,-1}},
184             {3, {27,-1,-1,-1}},
185             {4, {28,-1,-1,-1}},
186             NULL_PINMAP}},
187
188   {0, 17, PCI_FIXUP_OPT_OVERRIDE_NAME,
189            {{1, {28,-1,-1,-1}},  /* pci/pmc slot 2   */ /* orig: 0xf */
190             {2, {25,-1,-1,-1}},
191             {3, {26,-1,-1,-1}},
192             {4, {27,-1,-1,-1}},
193             NULL_PINMAP}},
194   NULL_INTMAP };
195
196static struct _int_map mvme27xx_intmap[] = {
197/* Raven Hostbridge; has int_pin == 0 */
198   {0,  0, 0, {{0, {-1,-1,-1,-1}},
199               NULL_PINMAP}},
200
201
202/* Winbond PCI/ISA 83c553; has int_pin == 0 */
203   {0, 11, 0, {{0, {-1,-1,-1,-1}},
204               NULL_PINMAP}},
205
206   {0, 13, PCI_FIXUP_OPT_OVERRIDE_NAME,
207                        {{1, {11,21,-1,-1}},  /* Universe  ISA/PCI */
208                        /* strictly speaking, a non-multi function device
209                         * must only use pin A
210                         */
211                         {2, {22,-1,-1,-1}},  /* Universe          */
212                         {3, {23,-1,-1,-1}},  /* Universe          */
213                         {4, {24,-1,-1,-1}},  /* Universe          */
214             NULL_PINMAP}},
215
216   {0, 14, PCI_FIXUP_OPT_OVERRIDE_NAME,
217                        {{1, {10,18,-1,-1}},  /* DEC Tulip enet (ISA/PCI)  */
218             NULL_PINMAP}},
219   {0, 16, PCI_FIXUP_OPT_OVERRIDE_NAME,
220            {{1, {25,-1,-1,-1}},  /* pci/pmc slot 1   */
221             {2, {26,-1,-1,-1}},
222             {3, {27,-1,-1,-1}},
223             {4, {28,-1,-1,-1}},
224             NULL_PINMAP}},
225
226   {0, 17, PCI_FIXUP_OPT_OVERRIDE_NAME,
227            {{1, {28,-1,-1,-1}},  /* pci/pmc slot 2   */ /* orig: 0xf */
228             {2, {25,-1,-1,-1}},
229             {3, {26,-1,-1,-1}},
230             {4, {27,-1,-1,-1}},
231             NULL_PINMAP}},
232   NULL_INTMAP };
233
234static struct _int_map mvme2100_intmap[] = {
235   {0, 0, 0, {{1, {16,-1,-1,-1}}, /* something shows up in slot 0 and OpenPIC  */
236                                  /* 0 is unused.  This hushes the init code.  */
237               NULL_PINMAP}},
238
239   {0, 13, 0, {{1, {23,-1,-1,-1}},  /* Universe Lint[0-3]; not quite legal     */
240               {2, {24,-1,-1,-1}},  /* since the universe is a single-function */
241               {3, {25,-1,-1,-1}},  /* device. We leave it for info purposes   */
242               {4, {26,-1,-1,-1}},
243               NULL_PINMAP}},
244
245   {0, 14, 0, {{1, {17,-1,-1,-1}},  /* onboard ethernet */
246               NULL_PINMAP}},
247
248   {0, 16, PCI_FIXUP_OPT_OVERRIDE_NAME,
249              {{1, {18,-1,-1,-1}},  /* PMC slot; all pins are routed to 18     */
250               {2, {18,-1,-1,-1}},  /* I give the OVERRIDE option since I had  */
251               {3, {18,-1,-1,-1}},  /* problems with devices behind a bridge   */
252               {4, {18,-1,-1,-1}},  /* on a PMC card reading irq line 0...     */
253               NULL_PINMAP}},
254
255   /* FIXME: I don't know how MIP works or what it is; these probably won't work */
256
257   {0, -1, PCI_FIXUP_OPT_OVERRIDE_NAME,
258              {{1, {23,-1,-1,-1}},  /* PCI INT[A-D] expansion */
259               {2, {24,-1,-1,-1}},
260               {3, {25,-1,-1,-1}},
261               {4, {26,-1,-1,-1}},
262               NULL_PINMAP}},
263
264   NULL_INTMAP };
265
266/*
267 * This table represents the standard PCI swizzle defined in the
268 * PCI bus specification.  Table taken from Linux 2.4.18, prep_pci.c,
269 * the values in this table are interrupt_pin values (1 based).
270 */
271static unsigned char prep_pci_intpins[4][4] =
272{
273        { 1, 2, 3, 4 },  /* Buses 0, 4, 8, ... */
274        { 2, 3, 4, 1 },  /* Buses 1, 5, 9, ... */
275        { 3, 4, 1, 2 },  /* Buses 2, 6, 10 ... */
276        { 4, 1, 2, 3 },  /* Buses 3, 7, 11 ... */
277};
278
279static int prep_pci_swizzle(int slot, int pin)
280{
281   return prep_pci_intpins[ slot % 4 ][ pin-1 ];
282}
283
284typedef struct {
285  /*
286   * 0x100 mask assumes for Raven and Hawk boards
287   * that the level/edge are set.
288   * 0x200 if this board has a Hawk chip.
289   */
290      int               cpu_type;
291      int               base_type;
292      ppc_cpu_id_t      proc_type;
293      const char        *name;
294
295      struct _int_map   *intmap;
296      int               (*swizzler)(int, int);
297} mot_info_t;
298
299static const mot_info_t mot_boards[] = {
300  {0x3E0, 0x00, PPC_750,     "MVME 2400", mvme24xx_intmap,prep_pci_swizzle},
301  {0x010, 0x00, PPC_UNKNOWN, "Genesis", NULL, NULL},
302  {0x020, 0x00, PPC_UNKNOWN, "Powerstack (Series E)", NULL, NULL},
303  {0x040, 0x00, PPC_UNKNOWN, "Blackhawk (Powerstack)", NULL, NULL},
304  {0x050, 0x00, PPC_UNKNOWN, "Omaha (PowerStack II Pro3000)", NULL, NULL},
305  {0x060, 0x00, PPC_UNKNOWN, "Utah (Powerstack II Pro4000)", NULL, NULL},
306  {0x0A0, 0x00, PPC_UNKNOWN, "Powerstack (Series EX)", NULL, NULL},
307  {0x1E0, 0xE0, PPC_UNKNOWN, "Mesquite cPCI (MCP750)", mcp750_intmap, prep_pci_swizzle},
308  {0x1E0, 0xE1, PPC_UNKNOWN, "Sitka cPCI (MCPN750)", mcp750_intmap, prep_pci_swizzle},
309  {0x1E0, 0xE2, PPC_UNKNOWN, "Mesquite cPCI (MCP750) w/ HAC", mcp750_intmap, prep_pci_swizzle},
310  {0x1E0, 0xF6, PPC_UNKNOWN, "MTX Plus", NULL, NULL},
311  {0x1E0, 0xF7, PPC_UNKNOWN, "MTX w/o Parallel Port", mtx603_intmap, prep_pci_swizzle},
312  {0x1E0, 0xF8, PPC_UNKNOWN, "MTX w/ Parallel Port", mtx603_intmap, prep_pci_swizzle},
313  {0x1E0, 0xF9, PPC_604,     "MVME 2300", mvme23xx_intmap, prep_pci_swizzle},
314  {0x1E0, 0xFA, PPC_UNKNOWN, "MVME 2300SC/2600", mvme23xx_intmap, prep_pci_swizzle},
315  {0x1E0, 0xFB, PPC_UNKNOWN, "MVME 2600 with MVME712M", NULL, NULL},
316  {0x1E0, 0xFC, PPC_750,     "MVME 2600/2700 with MVME761", mvme27xx_intmap, prep_pci_swizzle},
317  {0x1E0, 0xFD, PPC_UNKNOWN, "MVME 3600 with MVME712M", NULL, NULL},
318  {0x1E0, 0xFE, PPC_UNKNOWN, "MVME 3600 with MVME761", NULL, NULL},
319  {0x1E0, 0xFF, PPC_UNKNOWN, "MVME 1600-001 or 1600-011", NULL, NULL},
320  {0x000, 0x00, PPC_UNKNOWN, ""},   /* end of probeable values for automatic scan */
321  {0x000, 0x00, PPC_UNKNOWN, "MVME 2100", mvme2100_intmap, prep_pci_swizzle},
322};
323
324prep_t currentPrepType;
325motorolaBoard currentBoard;
326
327prep_t checkPrepBoardType(RESIDUAL *res)
328{
329  prep_t PREP_type;
330  /* figure out what kind of prep workstation we are */
331  if ( res->ResidualLength != 0 ) {
332    if ( !strncmp((char*)res->VitalProductData.PrintableModel,"IBM",3) )
333      PREP_type = PREP_IBM;
334    else if (!strncmp((char*)res->VitalProductData.PrintableModel,
335                      "Radstone",8)){
336      PREP_type = PREP_Radstone;
337    }
338    else
339      PREP_type = PREP_Motorola;
340  }
341  else /* assume motorola if no residual (netboot?) */ {
342    PREP_type = PREP_Motorola;
343  }
344  currentPrepType = PREP_type;
345  return PREP_type;
346}
347
348motorolaBoard getMotorolaBoard(void)
349{
350/*
351 *  At least the MVME2100 does not have the CPU Type and Base Type Registers,
352 *  so it cannot be probed.
353 *
354 *  NOTE: Every path must set currentBoard.
355 */
356#if defined(mvme2100)
357  currentBoard = (motorolaBoard) MVME_2100;
358#else
359  unsigned char  cpu_type;
360  unsigned char  base_mod;
361  ppc_cpu_id_t   proc_type;
362  int            entry;
363  int            mot_entry = -1;
364
365  cpu_type  = inb(MOTOROLA_CPUTYPE_REG) & 0xF0;
366  base_mod  = inb(MOTOROLA_BASETYPE_REG);
367  proc_type = get_ppc_cpu_type ();
368
369  for (entry = 0; mot_boards[entry].cpu_type != 0; entry++) {
370    if ((mot_boards[entry].cpu_type & 0xff) != cpu_type)
371      continue;
372   
373    if ((mot_boards[entry].proc_type != PPC_UNKNOWN) &&
374        (mot_boards[entry].proc_type != proc_type))
375      /*
376       * IMD: processor type does not match
377       * (here we distinguish a MVME2300 and a MVME2400)
378       */
379      continue;
380
381    if (mot_boards[entry].base_type != base_mod)
382      continue;
383    else {
384      mot_entry = entry;
385      break;
386    }
387  }
388  if (mot_entry == -1) {
389    printk("Unknown motorola board Please update libbsp/powerpc/shared/motorola/motorola.c\n");
390    printk("cpu_type = %x\n", (unsigned) cpu_type);
391    printk("base_mod = %x\n", (unsigned) base_mod);
392    currentBoard = MOTOROLA_UNKNOWN;
393    return currentBoard;
394  }
395  currentBoard = (motorolaBoard) mot_entry;
396#endif
397  return currentBoard;
398}
399
400const char* motorolaBoardToString(motorolaBoard board)
401{
402  if (board == MOTOROLA_UNKNOWN) return "Unknown motorola board";
403  return (mot_boards[board].name);
404}
405
406const struct _int_map *motorolaIntMap(motorolaBoard board)
407{
408  if (board == MOTOROLA_UNKNOWN) return NULL;
409  /* printk( "IntMap board %d 0x%08x\n", board, mot_boards[board].intmap ); */
410  return mot_boards[board].intmap;
411}
412
413const void *motorolaIntSwizzle(motorolaBoard board)
414{
415  if (board == MOTOROLA_UNKNOWN) return NULL;
416  return (void *)mot_boards[board].swizzler;
417}
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