source: rtems/c/src/lib/libbsp/powerpc/shared/irq/irq_init.c @ 6be3405

4.104.11
Last change on this file since 6be3405 was 6be3405, checked in by Ralf Corsepius <ralf.corsepius@…>, on Dec 10, 2009 at 8:50:57 AM

2009-12-10 Ralf Corsépius <ralf.corsepius@…>

  • shared/irq/irq_init.c: Add missing initializer.
  • Property mode set to 100644
File size: 10.4 KB
Line 
1/* irq_init.c
2 *
3 *  This file contains the implementation of rtems initialization
4 *  related to interrupt handling.
5 *
6 *  CopyRight (C) 1999 valette@crf.canon.fr
7 *
8 * Enhanced by Jay Kulpinski <jskulpin@eng01.gdds.com>
9 * to make it valid for MVME2300 Motorola boards.
10 *
11 * Till Straumann <strauman@slac.stanford.edu>, 12/20/2001:
12 * Use the new interface to openpic_init
13 *
14 *  The license and distribution terms for this file may be
15 *  found in the file LICENSE in this distribution or at
16 *  http://www.rtems.com/license/LICENSE.
17 *
18 *  $Id$
19 */
20
21#include <libcpu/io.h>
22#include <libcpu/spr.h>
23#include <bsp/pci.h>
24#include <bsp/residual.h>
25#include <bsp/openpic.h>
26#include <bsp/irq.h>
27#include <bsp/irq_supp.h>
28#include <bsp.h>
29#include <bsp/motorola.h>
30#include <rtems/bspIo.h>
31
32typedef struct {
33  unsigned char bus;    /* few chance the PCI/ISA bridge is not on first bus but ... */
34  unsigned char device;
35  unsigned char function;
36} pci_isa_bridge_device;
37
38pci_isa_bridge_device* via_82c586 = 0;
39static pci_isa_bridge_device bridge;
40
41/*
42 * default on/off function
43 */
44static void nop_func(void){}
45/*
46 * default isOn function
47 */
48static int not_connected(void) {return 0;}
49/*
50 * default possible isOn function
51static int connected(void) {return 1;}
52 */
53
54static rtems_irq_connect_data           rtemsIrq[BSP_IRQ_NUMBER];
55static rtems_irq_global_settings        initial_config;
56static rtems_irq_connect_data           defaultIrq = {
57  /* vectorIdex,         hdl            , handle        , on            , off           , isOn */
58  0,                     nop_func       , NULL          , nop_func      , nop_func      , not_connected
59#ifdef BSP_SHARED_HANDLER_SUPPORT
60  , NULL /* next_handler */
61#endif
62};
63static rtems_irq_prio irqPrioTable[BSP_IRQ_NUMBER]={
64  /*
65   * actual priorities for interrupt :
66   *    0   means that only current interrupt is masked
67   *    255 means all other interrupts are masked
68   */
69  /*
70   * ISA interrupts.
71   * The second entry has a priority of 255 because
72   * it is the slave pic entry and should always remain
73   * unmasked.
74   */
75  0,0,
76  255,
77  0, 0, 0, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,
78  /*
79   * PCI Interrupts
80   */
81  8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, /* for raven prio 0 means unactive... */
82  /*
83   * Processor exceptions handled as interrupts
84   */
85  0
86};
87
88#if defined(mvme2100)
89static unsigned char mvme2100_openpic_initpolarities[16] = {
90    0,  /* Not used - should be disabled */
91    0,  /* DEC21143 Controller */
92    0,  /* PMC/PC-MIP Type I Slot 0 */
93    0,  /* PC-MIP Type I Slot 1 */
94    0,  /* PC-MIP Type II Slot 0 */
95    0,  /* PC-MIP Type II Slot 1 */
96    0,  /* Not used - should be disabled */
97    0,  /* PCI Expansion Interrupt A/Universe II (LINT0) */
98    0,  /* PCI Expansion Interrupt B/Universe II (LINT1) */
99    0,  /* PCI Expansion Interrupt C/Universe II (LINT2) */
100    0,  /* PCI Expansion Interrupt D/Universe II (LINT3) */
101    0,  /* Not used - should be disabled */
102    0,  /* Not used - should be disabled */
103    1,  /* 16550 UART */
104    0,  /* Front panel Abort Switch */
105    0,  /* RTC IRQ */
106};
107
108static unsigned char mvme2100_openpic_initsenses[] = {
109    0,  /* Not used - should be disabled */
110    1,  /* DEC21143 Controller */
111    1,  /* PMC/PC-MIP Type I Slot 0 */
112    1,  /* PC-MIP Type I Slot 1 */
113    1,  /* PC-MIP Type II Slot 0 */
114    1,  /* PC-MIP Type II Slot 1 */
115    0,  /* Not used - should be disabled */
116    1,  /* PCI Expansion Interrupt A/Universe II (LINT0) */
117    1,  /* PCI Expansion Interrupt B/Universe II (LINT1) */
118    1,  /* PCI Expansion Interrupt C/Universe II (LINT2) */
119    1,  /* PCI Expansion Interrupt D/Universe II (LINT3) */
120    0,  /* Not used - should be disabled */
121    0,  /* Not used - should be disabled */
122    1,  /* 16550 UART */
123    0,  /* Front panel Abort Switch */
124    1,  /* RTC IRQ */
125};
126#else
127static unsigned char mcp750_openpic_initpolarities[16] = {
128    1,  /* 8259 cascade */
129    0,  /* all the rest of them */
130};
131
132static unsigned char mcp750_openpic_initsenses[] = {
133    1,  /* MCP750_INT_PCB(8259) */
134    0,  /* MCP750_INT_FALCON_ECC_ERR */
135    1,  /* MCP750_INT_PCI_ETHERNET */
136    1,  /* MCP750_INT_PCI_PMC */
137    1,  /* MCP750_INT_PCI_WATCHDOG_TIMER1 */
138    1,  /* MCP750_INT_PCI_PRST_SIGNAL */
139    1,  /* MCP750_INT_PCI_FALL_SIGNAL */
140    1,  /* MCP750_INT_PCI_DEG_SIGNAL */
141    1,  /* MCP750_INT_PCI_BUS1_INTA */
142    1,  /* MCP750_INT_PCI_BUS1_INTB */
143    1,  /* MCP750_INT_PCI_BUS1_INTC */
144    1,  /* MCP750_INT_PCI_BUS1_INTD */
145    1,  /* MCP750_INT_PCI_BUS2_INTA */
146    1,  /* MCP750_INT_PCI_BUS2_INTB */
147    1,  /* MCP750_INT_PCI_BUS2_INTC */
148    1,  /* MCP750_INT_PCI_BUS2_INTD */
149};
150#endif
151
152void VIA_isa_bridge_interrupts_setup(void)
153{
154  pci_isa_bridge_device pci_dev;
155  uint32_t temp;
156  unsigned char tmp;
157  unsigned char maxBus;
158  unsigned found = 0;
159
160  maxBus = pci_bus_count();
161  pci_dev.function      = 0; /* Assumes the bidge is the first function */
162
163  for (pci_dev.bus = 0; pci_dev.bus < maxBus; pci_dev.bus++) {
164#ifdef SCAN_PCI_PRINT
165    printk("isa_bridge_interrupts_setup: Scanning bus %d\n", pci_dev.bus);
166#endif
167    for (pci_dev.device = 0; pci_dev.device < PCI_MAX_DEVICES; pci_dev.device++) {
168#ifdef SCAN_PCI_PRINT
169      printk("isa_bridge_interrupts_setup: Scanning device %d\n", pci_dev.device);
170#endif
171      pci_read_config_dword(pci_dev.bus, pci_dev.device,  pci_dev.function,
172                               PCI_VENDOR_ID, &temp);
173#ifdef SCAN_PCI_PRINT
174      printk("Vendor/device = %x\n", temp);
175#endif
176      if ((temp == (((unsigned short) PCI_VENDOR_ID_VIA) | (PCI_DEVICE_ID_VIA_82C586_0 << 16)))
177         ) {
178        bridge = pci_dev;
179        via_82c586 = &bridge;
180#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS
181        /*
182         * Should print : bus = 0, device = 11, function = 0 on a MCP750.
183         */
184        printk("Via PCI/ISA bridge found at bus = %d, device = %d, function = %d\n",
185               via_82c586->bus,
186               via_82c586->device,
187               via_82c586->function);
188#endif
189        found = 1;
190        goto loop_exit;
191
192      }
193    }
194  }
195loop_exit:
196  if (!found) BSP_panic("VIA_82C586 PCI/ISA bridge not found!n");
197
198  tmp = inb(0x810);
199  if  ( !(tmp & 0x2)) {
200#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS
201    printk("This is a second generation MCP750 board\n");
202    printk("We must reprogram the PCI/ISA bridge...\n");
203#endif
204    pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
205                         0x47,  &tmp);
206#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS
207    printk(" PCI ISA bridge control2 = %x\n", (unsigned) tmp);
208#endif
209    /*
210     * Enable 4D0/4D1 ISA interrupt level/edge config registers
211     */
212    tmp |= 0x20;
213    pci_write_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
214                          0x47, tmp);
215    /*
216     * Now program the ISA interrupt edge/level
217     */
218    tmp = ELCRS_INT9_LVL | ELCRS_INT10_LVL | ELCRS_INT11_LVL;
219    outb(tmp, ISA8259_S_ELCR);
220    tmp = ELCRM_INT5_LVL;
221    outb(tmp, ISA8259_M_ELCR);;
222    /*
223     * Set the Interrupt inputs to non-inverting level interrupt
224     */
225    pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
226                            0x54, &tmp);
227#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS
228    printk(" PCI ISA bridge PCI/IRQ Edge/Level Select = %x\n", (unsigned) tmp);
229#endif
230    tmp = 0;
231    pci_write_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
232                          0x54, tmp);
233  }
234  else {
235#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS
236    printk("This is a first generation MCP750 board\n");
237    printk("We just show the actual value used by PCI/ISA bridge\n");
238#endif
239    pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
240                         0x47,  &tmp);
241#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS
242    printk(" PCI ISA bridge control2 = %x\n", (unsigned) tmp);
243#endif
244    /*
245     * Show the Interrupt inputs inverting/non-inverting level status
246     */
247    pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
248                         0x54, &tmp);
249#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS
250    printk(" PCI ISA bridge PCI/IRQ Edge/Level Select = %x\n", (unsigned) tmp);
251#endif
252  }
253}
254
255  /*
256   * This code assumes the exceptions management setup has already
257   * been done. We just need to replace the exceptions that will
258   * be handled like interrupt. On mcp750/mpc750 and many PPC processors
259   * this means the decrementer exception and the external exception.
260   */
261void BSP_rtems_irq_mng_init(unsigned cpuId)
262{
263#if !defined(mvme2100)
264  int known_cpi_isa_bridge = 0;
265#endif
266  int i;
267
268  /*
269   * First initialize the Interrupt management hardware
270   */
271#if defined(mvme2100)
272#ifdef TRACE_IRQ_INIT
273  printk("Going to initialize EPIC interrupt controller (openpic compliant)\n");
274#endif
275  /* EPIC sources don't start at the regular place; define appropriate offset
276   * prior to initializing the PIC.
277   */
278  openpic_init(1, mvme2100_openpic_initpolarities, mvme2100_openpic_initsenses, 16, 16, BSP_bus_frequency);
279#else
280#ifdef TRACE_IRQ_INIT
281  printk("Going to initialize raven interrupt controller (openpic compliant)\n");
282#endif
283  openpic_init(1, mcp750_openpic_initpolarities, mcp750_openpic_initsenses, 0, 0, 0);
284#ifdef TRACE_IRQ_INIT
285  printk("Going to initialize the PCI/ISA bridge IRQ related setting (VIA 82C586)\n");
286#endif
287  if ( currentBoard == MESQUITE ) {
288    VIA_isa_bridge_interrupts_setup();
289    known_cpi_isa_bridge = 1;
290  }
291  if ( currentBoard == MVME_2300 ) {
292    /* nothing to do for W83C553 bridge */
293    known_cpi_isa_bridge = 1;
294  }
295  if ( currentBoard == MTX_WO_PP || currentBoard == MTX_W_PP ) {
296     /* W83C554, don't to anything at the moment.  gregm 11/6/2002 */
297     known_cpi_isa_bridge = 1;
298  }
299
300  if (!known_cpi_isa_bridge) {
301    printk("Please add code for PCI/ISA bridge init to libbsp/powerpc/shared/irq/irq_init.c\n");
302    printk("If your card works correctly please add a test and set known_cpi_isa_bridge to true\n");
303    printk("currentBoard = %i\n", currentBoard);
304  }
305#ifdef TRACE_IRQ_INIT
306  printk("Going to initialize the ISA PC legacy IRQ management hardware\n");
307#endif
308  BSP_i8259s_init();
309#endif
310
311  /*
312   * Initialize RTEMS management interrupt table
313   */
314    /*
315     * re-init the rtemsIrq table
316     */
317    for (i = 0; i < BSP_IRQ_NUMBER; i++) {
318      rtemsIrq[i]      = defaultIrq;
319      rtemsIrq[i].name = i;
320    }
321    /*
322     * Init initial Interrupt management config
323     */
324    initial_config.irqNb        = BSP_IRQ_NUMBER;
325    initial_config.defaultEntry = defaultIrq;
326    initial_config.irqHdlTbl    = rtemsIrq;
327    initial_config.irqBase      = BSP_LOWEST_OFFSET;
328    initial_config.irqPrioTbl   = irqPrioTable;
329
330    if (!BSP_rtems_irq_mngt_set(&initial_config)) {
331      /*
332       * put something here that will show the failure...
333       */
334      BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n");
335    }
336
337#ifdef TRACE_IRQ_INIT
338    printk("RTEMS IRQ management is now operational\n");
339#endif
340}
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