source: rtems/c/src/lib/libbsp/powerpc/shared/irq/irq.h @ f05b2ac

4.104.114.84.95
Last change on this file since f05b2ac was f05b2ac, checked in by Ralf Corsepius <ralf.corsepius@…>, on Apr 21, 2004 at 4:01:48 PM

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1/* irq.h
2 *
3 *  This include file describe the data structure and the functions implemented
4 *  by rtems to write interrupt handlers.
5 *
6 *  CopyRight (C) 1999 valette@crf.canon.fr
7 *
8 *  This code is heavilly inspired by the public specification of STREAM V2
9 *  that can be found at :
10 *
11 *      <http://www.chorus.com/Documentation/index.html> by following
12 *  the STREAM API Specification Document link.
13 *
14 *  The license and distribution terms for this file may be
15 *  found in found in the file LICENSE in this distribution or at
16 *  http://www.rtems.com/license/LICENSE.
17 *
18 *  $Id$
19 */
20
21#ifndef LIBBSP_POWERPC_MCP750_IRQ_IRQ_H
22#define LIBBSP_POWERPC_MCP750_IRQ_IRQ_H
23
24/*
25 * 8259 edge/level control definitions at VIA
26 */
27#define ISA8259_M_ELCR          0x4d0
28#define ISA8259_S_ELCR          0x4d1
29
30#define ELCRS_INT15_LVL         0x80
31#define ELCRS_INT14_LVL         0x40
32#define ELCRS_INT13_LVL         0x20
33#define ELCRS_INT12_LVL         0x10
34#define ELCRS_INT11_LVL         0x08
35#define ELCRS_INT10_LVL         0x04
36#define ELCRS_INT9_LVL          0x02
37#define ELCRS_INT8_LVL          0x01
38#define ELCRM_INT7_LVL          0x80
39#define ELCRM_INT6_LVL          0x40
40#define ELCRM_INT5_LVL          0x20
41#define ELCRM_INT4_LVL          0x10
42#define ELCRM_INT3_LVL          0x8
43#define ELCRM_INT2_LVL          0x4
44#define ELCRM_INT1_LVL          0x2
45#define ELCRM_INT0_LVL          0x1
46
47#define BSP_ASM_IRQ_VECTOR_BASE 0x0
48    /* PIC's command and mask registers */
49#define PIC_MASTER_COMMAND_IO_PORT              0x20    /* Master PIC command register */
50#define PIC_SLAVE_COMMAND_IO_PORT               0xa0    /* Slave PIC command register */
51#define PIC_MASTER_IMR_IO_PORT                  0x21    /* Master PIC Interrupt Mask Register */
52#define PIC_SLAVE_IMR_IO_PORT                   0xa1    /* Slave PIC Interrupt Mask Register */
53
54    /* Command for specific EOI (End Of Interrupt): Interrupt acknowledge */
55#define PIC_EOSI        0x60    /* End of Specific Interrupt (EOSI) */
56#define SLAVE_PIC_EOSI  0x62    /* End of Specific Interrupt (EOSI) for cascade */
57#define PIC_EOI         0x20    /* Generic End of Interrupt (EOI) */
58
59#ifndef ASM
60
61#ifdef __cplusplus
62extern "C" {
63#endif
64
65/*
66 * Symblolic IRQ names and related definitions.
67 */
68
69typedef enum {
70  /* Base vector for our ISA IRQ handlers. */
71  BSP_ISA_IRQ_VECTOR_BASE       =       BSP_ASM_IRQ_VECTOR_BASE,
72  /*
73   * ISA IRQ handler related definitions
74   */
75  BSP_ISA_IRQ_NUMBER            =       16,
76  BSP_ISA_IRQ_LOWEST_OFFSET     =       0,
77  BSP_ISA_IRQ_MAX_OFFSET        =       BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER - 1,
78  /*
79   * PCI IRQ handlers related definitions
80   * CAUTION : BSP_PCI_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
81   */
82  BSP_PCI_IRQ_NUMBER            =       16,
83  BSP_PCI_IRQ_LOWEST_OFFSET     =       BSP_ISA_IRQ_NUMBER,
84  BSP_PCI_IRQ_MAX_OFFSET        =       BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1,
85  /*
86   * PowerPc exceptions handled as interrupt where a rtems managed interrupt
87   * handler might be connected
88   */
89  BSP_PROCESSOR_IRQ_NUMBER      =       1,
90  BSP_PROCESSOR_IRQ_LOWEST_OFFSET =     BSP_PCI_IRQ_MAX_OFFSET + 1,
91  BSP_PROCESSOR_IRQ_MAX_OFFSET  =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1,
92  /* Misc vectors for OPENPIC irqs (IPI, timers)
93   */
94  BSP_MISC_IRQ_NUMBER           =       8,
95  BSP_MISC_IRQ_LOWEST_OFFSET    =       BSP_PROCESSOR_IRQ_MAX_OFFSET + 1,
96  BSP_MISC_IRQ_MAX_OFFSET       =       BSP_MISC_IRQ_LOWEST_OFFSET + BSP_MISC_IRQ_NUMBER - 1,
97  /*
98   * Summary
99   */
100  BSP_IRQ_NUMBER                =       BSP_MISC_IRQ_MAX_OFFSET + 1,
101  BSP_LOWEST_OFFSET             =       BSP_ISA_IRQ_LOWEST_OFFSET,
102  BSP_MAX_OFFSET                =       BSP_MISC_IRQ_MAX_OFFSET,
103    /*
104     * Some ISA IRQ symbolic name definition
105     */
106  BSP_ISA_PERIODIC_TIMER        =       0,
107
108  BSP_ISA_KEYBOARD              =       1,
109
110  BSP_ISA_UART_COM2_IRQ         =       3,
111
112  BSP_ISA_UART_COM1_IRQ         =       4,
113
114  BSP_ISA_RT_TIMER1             =       8,
115
116  BSP_ISA_RT_TIMER3             =       10,
117    /*
118     * Some PCI IRQ symbolic name definition
119     */
120  BSP_PCI_IRQ0                  =       BSP_PCI_IRQ_LOWEST_OFFSET,
121  BSP_PCI_ISA_BRIDGE_IRQ        =       BSP_PCI_IRQ0,
122    /*
123     * Some Processor execption handled as rtems IRQ symbolic name definition
124     */
125  BSP_DECREMENTER               =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET
126
127}rtems_irq_symbolic_name;
128
129/*
130 * Type definition for RTEMS managed interrupts
131 */
132typedef unsigned char  rtems_irq_prio;
133typedef unsigned short rtems_i8259_masks;
134
135extern  volatile rtems_i8259_masks i8259s_cache;
136
137struct  __rtems_irq_connect_data__;     /* forward declaratiuon */
138
139typedef void (*rtems_irq_hdl)           (void);
140typedef void (*rtems_irq_enable)        (const struct __rtems_irq_connect_data__*);
141typedef void (*rtems_irq_disable)       (const struct __rtems_irq_connect_data__*);
142typedef int  (*rtems_irq_is_enabled)    (const struct __rtems_irq_connect_data__*);
143
144typedef struct __rtems_irq_connect_data__ {
145      /*
146       * IRQ line
147       */
148      rtems_irq_symbolic_name   name;
149      /*
150       * handler. See comment on handler properties below in function prototype.
151       */
152      rtems_irq_hdl                     hdl;
153      /*
154       * function for enabling interrupts at device level (ONLY!).
155       * The BSP code will automatically enable it at i8259s level and openpic level.
156       * RATIONALE : anyway such code has to exist in current driver code.
157       * It is usually called immediately AFTER connecting the interrupt handler.
158       * RTEMS may well need such a function when restoring normal interrupt
159       * processing after a debug session.
160       *
161       */
162      rtems_irq_enable          on;
163      /*
164       * function for disabling interrupts at device level (ONLY!).
165       * The code will disable it at i8259s level. RATIONALE : anyway
166       * such code has to exist for clean shutdown. It is usually called
167       * BEFORE disconnecting the interrupt. RTEMS may well need such
168       * a function when disabling normal interrupt processing for
169       * a debug session. May well be a NOP function.
170       */
171      rtems_irq_disable         off;
172      /*
173       * function enabling to know what interrupt may currently occur
174       * if someone manipulates the i8259s interrupt mask without care...
175       */
176      rtems_irq_is_enabled      isOn;
177      /*
178       *  Set to -1 for vectors forced to have only 1 handler
179       */
180      void *next_handler;
181
182}rtems_irq_connect_data;
183
184typedef struct {
185  /*
186   * size of all the table fields (*Tbl) described below.
187   */
188  unsigned int                  irqNb;
189  /*
190   * Default handler used when disconnecting interrupts.
191   */
192  rtems_irq_connect_data        defaultEntry;
193  /*
194   * Table containing initials/current value.
195   */
196  rtems_irq_connect_data*       irqHdlTbl;
197  /*
198   * actual value of BSP_ISA_IRQ_VECTOR_BASE...
199   */
200  rtems_irq_symbolic_name       irqBase;
201  /*
202   * software priorities associated with interrupts.
203   * if irqPrio  [i]  >  intrPrio  [j]  it  means  that
204   * interrupt handler hdl connected for interrupt name i
205   * will  not be interrupted by the handler connected for interrupt j
206   * The interrupt source  will be physically masked at i8259 level.
207   */
208    rtems_irq_prio*             irqPrioTbl;
209}rtems_irq_global_settings;
210
211/*-------------------------------------------------------------------------+
212| Function Prototypes.
213+--------------------------------------------------------------------------*/
214/*
215 * ------------------------ Intel 8259 (or emulation) Mngt Routines -------
216 */
217
218/*
219 * function to disable a particular irq at 8259 level. After calling
220 * this function, even if the device asserts the interrupt line it will
221 * not be propagated further to the processor
222 */
223int BSP_irq_disable_at_i8259s        (const rtems_irq_symbolic_name irqLine);
224/*
225 * function to enable a particular irq at 8259 level. After calling
226 * this function, if the device asserts the interrupt line it will
227 * be propagated further to the processor
228 */
229int BSP_irq_enable_at_i8259s            (const rtems_irq_symbolic_name irqLine);
230/*
231 * function to acknoledge a particular irq at 8259 level. After calling
232 * this function, if a device asserts an enabled interrupt line it will
233 * be propagated further to the processor. Mainly usefull for people
234 * writting raw handlers as this is automagically done for rtems managed
235 * handlers.
236 */
237int BSP_irq_ack_at_i8259s               (const rtems_irq_symbolic_name irqLine);
238/*
239 * function to check if a particular irq is enabled at 8259 level. After calling
240 */
241int BSP_irq_enabled_at_i8259s           (const rtems_irq_symbolic_name irqLine);
242/*
243 * ------------------------ RTEMS Single Irq Handler Mngt Routines ----------------
244 */
245/*
246 * function to connect a particular irq handler. This hanlder will NOT be called
247 * directly as the result of the corresponding interrupt. Instead, a RTEMS
248 * irq prologue will be called that will :
249 *
250 *      1) save the C scratch registers,
251 *      2) switch to a interrupt stack if the interrupt is not nested,
252 *      3) store the current i8259s' interrupt masks
253 *      4) modify them to disable the current interrupt at 8259 level (and may
254 *      be others depending on software priorities)
255 *      5) aknowledge the i8259s',
256 *      6) demask the processor,
257 *      7) call the application handler
258 *
259 * As a result the hdl function provided
260 *
261 *      a) can perfectly be written is C,
262 *      b) may also well directly call the part of the RTEMS API that can be used
263 *      from interrupt level,
264 *      c) It only responsible for handling the jobs that need to be done at
265 *      the device level including (aknowledging/re-enabling the interrupt at device,
266 *      level, getting the data,...)
267 *
268 *      When returning from the function, the following will be performed by
269 *      the RTEMS irq epilogue :
270 *
271 *      1) masks the interrupts again,
272 *      2) restore the original i8259s' interrupt masks
273 *      3) switch back on the orinal stack if needed,
274 *      4) perform rescheduling when necessary,
275 *      5) restore the C scratch registers...
276 *      6) restore initial execution flow
277 *
278 */
279int BSP_install_rtems_irq_handler       (const rtems_irq_connect_data*);
280int BSP_install_rtems_shared_irq_handler  (const rtems_irq_connect_data*);
281
282#define BSP_SHARED_HANDLER_SUPPORT      1
283
284/*
285 * function to get the current RTEMS irq handler for ptr->name. It enables to
286 * define hanlder chain...
287 */
288int BSP_get_current_rtems_irq_handler   (rtems_irq_connect_data* ptr);
289/*
290 * function to get disconnect the RTEMS irq handler for ptr->name.
291 * This function checks that the value given is the current one for safety reason.
292 * The user can use the previous function to get it.
293 */
294int BSP_remove_rtems_irq_handler        (const rtems_irq_connect_data*);
295
296/*
297 * ------------------------ RTEMS Global Irq Handler Mngt Routines ----------------
298 */
299/*
300 * (Re) Initialize the RTEMS interrupt management.
301 *
302 * The result of calling this function will be the same as if each individual
303 * handler (config->irqHdlTbl[i].hdl)  different from "config->defaultEntry.hdl"
304 * has been individualy connected via
305 *      BSP_install_rtems_irq_handler(&config->irqHdlTbl[i])
306 * And each handler currently equal to config->defaultEntry.hdl
307 * has been previously disconnected via
308 *       BSP_remove_rtems_irq_handler (&config->irqHdlTbl[i])
309 *
310 * This is to say that all information given will be used and not just
311 * only the space.
312 *
313 * CAUTION : the various table address contained in config will be used
314 *           directly by the interrupt mangement code in order to save
315 *           data size so they must stay valid after the call => they should
316 *           not be modified or declared on a stack.
317 */
318
319int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config);
320/*
321 * (Re) get info on current RTEMS interrupt management.
322 */
323int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**);
324
325extern void BSP_rtems_irq_mng_init(unsigned cpuId);
326extern void BSP_i8259s_init(void);
327
328#ifdef __cplusplus
329}
330#endif
331
332#endif
333
334#endif
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