1 | /* irq.h |
---|
2 | * |
---|
3 | * This include file describe the data structure and the functions implemented |
---|
4 | * by rtems to write interrupt handlers. |
---|
5 | * |
---|
6 | * CopyRight (C) 1999 valette@crf.canon.fr |
---|
7 | * |
---|
8 | * This code is heavilly inspired by the public specification of STREAM V2 |
---|
9 | * that can be found at : |
---|
10 | * |
---|
11 | * <http://www.chorus.com/Documentation/index.html> by following |
---|
12 | * the STREAM API Specification Document link. |
---|
13 | * |
---|
14 | * The license and distribution terms for this file may be |
---|
15 | * found in found in the file LICENSE in this distribution or at |
---|
16 | * http://www.OARcorp.com/rtems/license.html. |
---|
17 | * |
---|
18 | * $Id$ |
---|
19 | */ |
---|
20 | |
---|
21 | #ifndef LIBBSP_POWERPC_MCP750_IRQ_IRQ_H |
---|
22 | #define LIBBSP_POWERPC_MCP750_IRQ_IRQ_H |
---|
23 | |
---|
24 | |
---|
25 | /* |
---|
26 | * 8259 edge/level control definitions at VIA |
---|
27 | */ |
---|
28 | #define ISA8259_M_ELCR 0x4d0 |
---|
29 | #define ISA8259_S_ELCR 0x4d1 |
---|
30 | |
---|
31 | #define ELCRS_INT15_LVL 0x80 |
---|
32 | #define ELCRS_INT14_LVL 0x40 |
---|
33 | #define ELCRS_INT13_LVL 0x20 |
---|
34 | #define ELCRS_INT12_LVL 0x10 |
---|
35 | #define ELCRS_INT11_LVL 0x08 |
---|
36 | #define ELCRS_INT10_LVL 0x04 |
---|
37 | #define ELCRS_INT9_LVL 0x02 |
---|
38 | #define ELCRS_INT8_LVL 0x01 |
---|
39 | #define ELCRM_INT7_LVL 0x80 |
---|
40 | #define ELCRM_INT6_LVL 0x40 |
---|
41 | #define ELCRM_INT5_LVL 0x20 |
---|
42 | #define ELCRM_INT4_LVL 0x10 |
---|
43 | #define ELCRM_INT3_LVL 0x8 |
---|
44 | #define ELCRM_INT2_LVL 0x4 |
---|
45 | #define ELCRM_INT1_LVL 0x2 |
---|
46 | #define ELCRM_INT0_LVL 0x1 |
---|
47 | |
---|
48 | #define BSP_ASM_IRQ_VECTOR_BASE 0x0 |
---|
49 | /* PIC's command and mask registers */ |
---|
50 | #define PIC_MASTER_COMMAND_IO_PORT 0x20 /* Master PIC command register */ |
---|
51 | #define PIC_SLAVE_COMMAND_IO_PORT 0xa0 /* Slave PIC command register */ |
---|
52 | #define PIC_MASTER_IMR_IO_PORT 0x21 /* Master PIC Interrupt Mask Register */ |
---|
53 | #define PIC_SLAVE_IMR_IO_PORT 0xa1 /* Slave PIC Interrupt Mask Register */ |
---|
54 | |
---|
55 | /* Command for specific EOI (End Of Interrupt): Interrupt acknowledge */ |
---|
56 | #define PIC_EOSI 0x60 /* End of Specific Interrupt (EOSI) */ |
---|
57 | #define SLAVE_PIC_EOSI 0x62 /* End of Specific Interrupt (EOSI) for cascade */ |
---|
58 | #define PIC_EOI 0x20 /* Generic End of Interrupt (EOI) */ |
---|
59 | |
---|
60 | #ifndef ASM |
---|
61 | |
---|
62 | |
---|
63 | /* |
---|
64 | * Symblolic IRQ names and related definitions. |
---|
65 | */ |
---|
66 | |
---|
67 | typedef enum { |
---|
68 | /* Base vector for our ISA IRQ handlers. */ |
---|
69 | BSP_ISA_IRQ_VECTOR_BASE = BSP_ASM_IRQ_VECTOR_BASE, |
---|
70 | /* |
---|
71 | * ISA IRQ handler related definitions |
---|
72 | */ |
---|
73 | BSP_ISA_IRQ_NUMBER = 16, |
---|
74 | BSP_ISA_IRQ_LOWEST_OFFSET = 0, |
---|
75 | BSP_ISA_IRQ_MAX_OFFSET = BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER - 1, |
---|
76 | /* |
---|
77 | * PCI IRQ handlers related definitions |
---|
78 | * CAUTION : BSP_PCI_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE |
---|
79 | */ |
---|
80 | BSP_PCI_IRQ_NUMBER = 16, |
---|
81 | BSP_PCI_IRQ_LOWEST_OFFSET = BSP_ISA_IRQ_NUMBER, |
---|
82 | BSP_PCI_IRQ_MAX_OFFSET = BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1, |
---|
83 | /* |
---|
84 | * PowerPc exceptions handled as interrupt where a rtems managed interrupt |
---|
85 | * handler might be connected |
---|
86 | */ |
---|
87 | BSP_PROCESSOR_IRQ_NUMBER = 1, |
---|
88 | BSP_PROCESSOR_IRQ_LOWEST_OFFSET = BSP_PCI_IRQ_MAX_OFFSET + 1, |
---|
89 | BSP_PROCESSOR_IRQ_MAX_OFFSET = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1, |
---|
90 | /* |
---|
91 | * Summary |
---|
92 | */ |
---|
93 | BSP_IRQ_NUMBER = BSP_PROCESSOR_IRQ_MAX_OFFSET + 1, |
---|
94 | BSP_LOWEST_OFFSET = BSP_ISA_IRQ_LOWEST_OFFSET, |
---|
95 | BSP_MAX_OFFSET = BSP_PROCESSOR_IRQ_MAX_OFFSET, |
---|
96 | /* |
---|
97 | * Some ISA IRQ symbolic name definition |
---|
98 | */ |
---|
99 | BSP_ISA_PERIODIC_TIMER = 0, |
---|
100 | |
---|
101 | BSP_ISA_KEYBOARD = 1, |
---|
102 | |
---|
103 | BSP_ISA_UART_COM2_IRQ = 3, |
---|
104 | |
---|
105 | BSP_ISA_UART_COM1_IRQ = 4, |
---|
106 | |
---|
107 | BSP_ISA_RT_TIMER1 = 8, |
---|
108 | |
---|
109 | BSP_ISA_RT_TIMER3 = 10, |
---|
110 | /* |
---|
111 | * Some PCI IRQ symbolic name definition |
---|
112 | */ |
---|
113 | BSP_PCI_IRQ0 = BSP_PCI_IRQ_LOWEST_OFFSET, |
---|
114 | BSP_PCI_ISA_BRIDGE_IRQ = BSP_PCI_IRQ0, |
---|
115 | /* |
---|
116 | * Some Processor execption handled as rtems IRQ symbolic name definition |
---|
117 | */ |
---|
118 | BSP_DECREMENTER = BSP_PROCESSOR_IRQ_LOWEST_OFFSET |
---|
119 | |
---|
120 | }rtems_irq_symbolic_name; |
---|
121 | |
---|
122 | |
---|
123 | |
---|
124 | |
---|
125 | /* |
---|
126 | * Type definition for RTEMS managed interrupts |
---|
127 | */ |
---|
128 | typedef unsigned char rtems_irq_prio; |
---|
129 | typedef unsigned short rtems_i8259_masks; |
---|
130 | |
---|
131 | extern volatile rtems_i8259_masks i8259s_cache; |
---|
132 | |
---|
133 | struct __rtems_irq_connect_data__; /* forward declaratiuon */ |
---|
134 | |
---|
135 | typedef void (*rtems_irq_hdl) (void); |
---|
136 | typedef void (*rtems_irq_enable) (const struct __rtems_irq_connect_data__*); |
---|
137 | typedef void (*rtems_irq_disable) (const struct __rtems_irq_connect_data__*); |
---|
138 | typedef int (*rtems_irq_is_enabled) (const struct __rtems_irq_connect_data__*); |
---|
139 | |
---|
140 | typedef struct __rtems_irq_connect_data__ { |
---|
141 | /* |
---|
142 | * IRQ line |
---|
143 | */ |
---|
144 | rtems_irq_symbolic_name name; |
---|
145 | /* |
---|
146 | * handler. See comment on handler properties below in function prototype. |
---|
147 | */ |
---|
148 | rtems_irq_hdl hdl; |
---|
149 | /* |
---|
150 | * function for enabling interrupts at device level (ONLY!). |
---|
151 | * The BSP code will automatically enable it at i8259s level and openpic level. |
---|
152 | * RATIONALE : anyway such code has to exist in current driver code. |
---|
153 | * It is usually called immediately AFTER connecting the interrupt handler. |
---|
154 | * RTEMS may well need such a function when restoring normal interrupt |
---|
155 | * processing after a debug session. |
---|
156 | * |
---|
157 | */ |
---|
158 | rtems_irq_enable on; |
---|
159 | /* |
---|
160 | * function for disabling interrupts at device level (ONLY!). |
---|
161 | * The code will disable it at i8259s level. RATIONALE : anyway |
---|
162 | * such code has to exist for clean shutdown. It is usually called |
---|
163 | * BEFORE disconnecting the interrupt. RTEMS may well need such |
---|
164 | * a function when disabling normal interrupt processing for |
---|
165 | * a debug session. May well be a NOP function. |
---|
166 | */ |
---|
167 | rtems_irq_disable off; |
---|
168 | /* |
---|
169 | * function enabling to know what interrupt may currently occur |
---|
170 | * if someone manipulates the i8259s interrupt mask without care... |
---|
171 | */ |
---|
172 | rtems_irq_is_enabled isOn; |
---|
173 | }rtems_irq_connect_data; |
---|
174 | |
---|
175 | typedef struct { |
---|
176 | /* |
---|
177 | * size of all the table fields (*Tbl) described below. |
---|
178 | */ |
---|
179 | unsigned int irqNb; |
---|
180 | /* |
---|
181 | * Default handler used when disconnecting interrupts. |
---|
182 | */ |
---|
183 | rtems_irq_connect_data defaultEntry; |
---|
184 | /* |
---|
185 | * Table containing initials/current value. |
---|
186 | */ |
---|
187 | rtems_irq_connect_data* irqHdlTbl; |
---|
188 | /* |
---|
189 | * actual value of BSP_ISA_IRQ_VECTOR_BASE... |
---|
190 | */ |
---|
191 | rtems_irq_symbolic_name irqBase; |
---|
192 | /* |
---|
193 | * software priorities associated with interrupts. |
---|
194 | * if irqPrio [i] > intrPrio [j] it means that |
---|
195 | * interrupt handler hdl connected for interrupt name i |
---|
196 | * will not be interrupted by the handler connected for interrupt j |
---|
197 | * The interrupt source will be physically masked at i8259 level. |
---|
198 | */ |
---|
199 | rtems_irq_prio* irqPrioTbl; |
---|
200 | }rtems_irq_global_settings; |
---|
201 | |
---|
202 | |
---|
203 | |
---|
204 | |
---|
205 | /*-------------------------------------------------------------------------+ |
---|
206 | | Function Prototypes. |
---|
207 | +--------------------------------------------------------------------------*/ |
---|
208 | /* |
---|
209 | * ------------------------ Intel 8259 (or emulation) Mngt Routines ------- |
---|
210 | */ |
---|
211 | |
---|
212 | /* |
---|
213 | * function to disable a particular irq at 8259 level. After calling |
---|
214 | * this function, even if the device asserts the interrupt line it will |
---|
215 | * not be propagated further to the processor |
---|
216 | */ |
---|
217 | int BSP_irq_disable_at_i8259s (const rtems_irq_symbolic_name irqLine); |
---|
218 | /* |
---|
219 | * function to enable a particular irq at 8259 level. After calling |
---|
220 | * this function, if the device asserts the interrupt line it will |
---|
221 | * be propagated further to the processor |
---|
222 | */ |
---|
223 | int BSP_irq_enable_at_i8259s (const rtems_irq_symbolic_name irqLine); |
---|
224 | /* |
---|
225 | * function to acknoledge a particular irq at 8259 level. After calling |
---|
226 | * this function, if a device asserts an enabled interrupt line it will |
---|
227 | * be propagated further to the processor. Mainly usefull for people |
---|
228 | * writting raw handlers as this is automagically done for rtems managed |
---|
229 | * handlers. |
---|
230 | */ |
---|
231 | int BSP_irq_ack_at_i8259s (const rtems_irq_symbolic_name irqLine); |
---|
232 | /* |
---|
233 | * function to check if a particular irq is enabled at 8259 level. After calling |
---|
234 | */ |
---|
235 | int BSP_irq_enabled_at_i8259s (const rtems_irq_symbolic_name irqLine); |
---|
236 | /* |
---|
237 | * ------------------------ RTEMS Single Irq Handler Mngt Routines ---------------- |
---|
238 | */ |
---|
239 | /* |
---|
240 | * function to connect a particular irq handler. This hanlder will NOT be called |
---|
241 | * directly as the result of the corresponding interrupt. Instead, a RTEMS |
---|
242 | * irq prologue will be called that will : |
---|
243 | * |
---|
244 | * 1) save the C scratch registers, |
---|
245 | * 2) switch to a interrupt stack if the interrupt is not nested, |
---|
246 | * 3) store the current i8259s' interrupt masks |
---|
247 | * 4) modify them to disable the current interrupt at 8259 level (and may |
---|
248 | * be others depending on software priorities) |
---|
249 | * 5) aknowledge the i8259s', |
---|
250 | * 6) demask the processor, |
---|
251 | * 7) call the application handler |
---|
252 | * |
---|
253 | * As a result the hdl function provided |
---|
254 | * |
---|
255 | * a) can perfectly be written is C, |
---|
256 | * b) may also well directly call the part of the RTEMS API that can be used |
---|
257 | * from interrupt level, |
---|
258 | * c) It only responsible for handling the jobs that need to be done at |
---|
259 | * the device level including (aknowledging/re-enabling the interrupt at device, |
---|
260 | * level, getting the data,...) |
---|
261 | * |
---|
262 | * When returning from the function, the following will be performed by |
---|
263 | * the RTEMS irq epilogue : |
---|
264 | * |
---|
265 | * 1) masks the interrupts again, |
---|
266 | * 2) restore the original i8259s' interrupt masks |
---|
267 | * 3) switch back on the orinal stack if needed, |
---|
268 | * 4) perform rescheduling when necessary, |
---|
269 | * 5) restore the C scratch registers... |
---|
270 | * 6) restore initial execution flow |
---|
271 | * |
---|
272 | */ |
---|
273 | int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*); |
---|
274 | /* |
---|
275 | * function to get the current RTEMS irq handler for ptr->name. It enables to |
---|
276 | * define hanlder chain... |
---|
277 | */ |
---|
278 | int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data* ptr); |
---|
279 | /* |
---|
280 | * function to get disconnect the RTEMS irq handler for ptr->name. |
---|
281 | * This function checks that the value given is the current one for safety reason. |
---|
282 | * The user can use the previous function to get it. |
---|
283 | */ |
---|
284 | int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data*); |
---|
285 | |
---|
286 | /* |
---|
287 | * ------------------------ RTEMS Global Irq Handler Mngt Routines ---------------- |
---|
288 | */ |
---|
289 | /* |
---|
290 | * (Re) Initialize the RTEMS interrupt management. |
---|
291 | * |
---|
292 | * The result of calling this function will be the same as if each individual |
---|
293 | * handler (config->irqHdlTbl[i].hdl) different from "config->defaultEntry.hdl" |
---|
294 | * has been individualy connected via |
---|
295 | * BSP_install_rtems_irq_handler(&config->irqHdlTbl[i]) |
---|
296 | * And each handler currently equal to config->defaultEntry.hdl |
---|
297 | * has been previously disconnected via |
---|
298 | * BSP_remove_rtems_irq_handler (&config->irqHdlTbl[i]) |
---|
299 | * |
---|
300 | * This is to say that all information given will be used and not just |
---|
301 | * only the space. |
---|
302 | * |
---|
303 | * CAUTION : the various table address contained in config will be used |
---|
304 | * directly by the interrupt mangement code in order to save |
---|
305 | * data size so they must stay valid after the call => they should |
---|
306 | * not be modified or declared on a stack. |
---|
307 | */ |
---|
308 | |
---|
309 | int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config); |
---|
310 | /* |
---|
311 | * (Re) get info on current RTEMS interrupt management. |
---|
312 | */ |
---|
313 | int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**); |
---|
314 | |
---|
315 | extern void BSP_rtems_irq_mng_init(unsigned cpuId); |
---|
316 | extern void BSP_i8259s_init(void); |
---|
317 | #endif |
---|
318 | |
---|
319 | #endif |
---|