source: rtems/c/src/lib/libbsp/powerpc/shared/irq/irq.h @ a77cd066

4.104.114.84.95
Last change on this file since a77cd066 was ae1f243, checked in by Joel Sherrill <joel.sherrill@…>, on Oct 22, 2003 at 4:24:05 PM

2003-10-22 Joel Sherrill <joel@…>

PR 510/bsps

  • irq/irq.h: Add extern C wrapper.
  • Property mode set to 100644
File size: 11.3 KB
Line 
1/* irq.h
2 *
3 *  This include file describe the data structure and the functions implemented
4 *  by rtems to write interrupt handlers.
5 *
6 *  CopyRight (C) 1999 valette@crf.canon.fr
7 *
8 *  This code is heavilly inspired by the public specification of STREAM V2
9 *  that can be found at :
10 *
11 *      <http://www.chorus.com/Documentation/index.html> by following
12 *  the STREAM API Specification Document link.
13 *
14 *  The license and distribution terms for this file may be
15 *  found in found in the file LICENSE in this distribution or at
16 *  http://www.rtems.com/license/LICENSE.
17 *
18 *  $Id$
19 */
20
21#ifndef LIBBSP_POWERPC_MCP750_IRQ_IRQ_H
22#define LIBBSP_POWERPC_MCP750_IRQ_IRQ_H
23
24
25/*
26 * 8259 edge/level control definitions at VIA
27 */
28#define ISA8259_M_ELCR          0x4d0
29#define ISA8259_S_ELCR          0x4d1
30
31#define ELCRS_INT15_LVL         0x80
32#define ELCRS_INT14_LVL         0x40
33#define ELCRS_INT13_LVL         0x20
34#define ELCRS_INT12_LVL         0x10
35#define ELCRS_INT11_LVL         0x08
36#define ELCRS_INT10_LVL         0x04
37#define ELCRS_INT9_LVL          0x02
38#define ELCRS_INT8_LVL          0x01
39#define ELCRM_INT7_LVL          0x80
40#define ELCRM_INT6_LVL          0x40
41#define ELCRM_INT5_LVL          0x20
42#define ELCRM_INT4_LVL          0x10
43#define ELCRM_INT3_LVL          0x8
44#define ELCRM_INT2_LVL          0x4
45#define ELCRM_INT1_LVL          0x2
46#define ELCRM_INT0_LVL          0x1
47
48#define BSP_ASM_IRQ_VECTOR_BASE 0x0
49    /* PIC's command and mask registers */
50#define PIC_MASTER_COMMAND_IO_PORT              0x20    /* Master PIC command register */
51#define PIC_SLAVE_COMMAND_IO_PORT               0xa0    /* Slave PIC command register */
52#define PIC_MASTER_IMR_IO_PORT                  0x21    /* Master PIC Interrupt Mask Register */
53#define PIC_SLAVE_IMR_IO_PORT                   0xa1    /* Slave PIC Interrupt Mask Register */
54
55    /* Command for specific EOI (End Of Interrupt): Interrupt acknowledge */
56#define PIC_EOSI        0x60    /* End of Specific Interrupt (EOSI) */
57#define SLAVE_PIC_EOSI  0x62    /* End of Specific Interrupt (EOSI) for cascade */
58#define PIC_EOI         0x20    /* Generic End of Interrupt (EOI) */
59
60#ifndef ASM
61
62#ifdef __cplusplus
63extern "C" {
64#endif
65
66
67/*
68 * Symblolic IRQ names and related definitions.
69 */
70
71typedef enum {
72  /* Base vector for our ISA IRQ handlers. */
73  BSP_ISA_IRQ_VECTOR_BASE       =       BSP_ASM_IRQ_VECTOR_BASE,
74  /*
75   * ISA IRQ handler related definitions
76   */
77  BSP_ISA_IRQ_NUMBER            =       16,
78  BSP_ISA_IRQ_LOWEST_OFFSET     =       0,
79  BSP_ISA_IRQ_MAX_OFFSET        =       BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER - 1,
80  /*
81   * PCI IRQ handlers related definitions
82   * CAUTION : BSP_PCI_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
83   */
84  BSP_PCI_IRQ_NUMBER            =       16,
85  BSP_PCI_IRQ_LOWEST_OFFSET     =       BSP_ISA_IRQ_NUMBER,
86  BSP_PCI_IRQ_MAX_OFFSET        =       BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1,
87  /*
88   * PowerPc exceptions handled as interrupt where a rtems managed interrupt
89   * handler might be connected
90   */
91  BSP_PROCESSOR_IRQ_NUMBER      =       1,
92  BSP_PROCESSOR_IRQ_LOWEST_OFFSET =     BSP_PCI_IRQ_MAX_OFFSET + 1,
93  BSP_PROCESSOR_IRQ_MAX_OFFSET  =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1,
94  /* Misc vectors for OPENPIC irqs (IPI, timers)
95   */
96  BSP_MISC_IRQ_NUMBER           =       8,
97  BSP_MISC_IRQ_LOWEST_OFFSET    =       BSP_PROCESSOR_IRQ_MAX_OFFSET + 1,
98  BSP_MISC_IRQ_MAX_OFFSET       =       BSP_MISC_IRQ_LOWEST_OFFSET + BSP_MISC_IRQ_NUMBER - 1,
99  /*
100   * Summary
101   */
102  BSP_IRQ_NUMBER                =       BSP_MISC_IRQ_MAX_OFFSET + 1,
103  BSP_LOWEST_OFFSET             =       BSP_ISA_IRQ_LOWEST_OFFSET,
104  BSP_MAX_OFFSET                =       BSP_MISC_IRQ_MAX_OFFSET,
105    /*
106     * Some ISA IRQ symbolic name definition
107     */       
108  BSP_ISA_PERIODIC_TIMER        =       0,
109
110  BSP_ISA_KEYBOARD              =       1,
111
112  BSP_ISA_UART_COM2_IRQ         =       3,
113
114  BSP_ISA_UART_COM1_IRQ         =       4,
115
116  BSP_ISA_RT_TIMER1             =       8,
117 
118  BSP_ISA_RT_TIMER3             =       10,
119    /*
120     * Some PCI IRQ symbolic name definition
121     */
122  BSP_PCI_IRQ0                  =       BSP_PCI_IRQ_LOWEST_OFFSET,
123  BSP_PCI_ISA_BRIDGE_IRQ        =       BSP_PCI_IRQ0,
124    /*
125     * Some Processor execption handled as rtems IRQ symbolic name definition
126     */
127  BSP_DECREMENTER               =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET
128 
129}rtems_irq_symbolic_name;
130
131   
132
133
134/*
135 * Type definition for RTEMS managed interrupts
136 */
137typedef unsigned char  rtems_irq_prio;
138typedef unsigned short rtems_i8259_masks;
139
140extern  volatile rtems_i8259_masks i8259s_cache;
141
142struct  __rtems_irq_connect_data__;     /* forward declaratiuon */
143
144typedef void (*rtems_irq_hdl)           (void);
145typedef void (*rtems_irq_enable)        (const struct __rtems_irq_connect_data__*);
146typedef void (*rtems_irq_disable)       (const struct __rtems_irq_connect_data__*);
147typedef int  (*rtems_irq_is_enabled)    (const struct __rtems_irq_connect_data__*);
148
149typedef struct __rtems_irq_connect_data__ {
150      /*
151       * IRQ line
152       */
153      rtems_irq_symbolic_name   name;
154      /*
155       * handler. See comment on handler properties below in function prototype.
156       */
157      rtems_irq_hdl                     hdl;
158      /*
159       * function for enabling interrupts at device level (ONLY!).
160       * The BSP code will automatically enable it at i8259s level and openpic level.
161       * RATIONALE : anyway such code has to exist in current driver code.
162       * It is usually called immediately AFTER connecting the interrupt handler.
163       * RTEMS may well need such a function when restoring normal interrupt
164       * processing after a debug session.
165       *
166       */
167      rtems_irq_enable          on;     
168      /*
169       * function for disabling interrupts at device level (ONLY!).
170       * The code will disable it at i8259s level. RATIONALE : anyway
171       * such code has to exist for clean shutdown. It is usually called
172       * BEFORE disconnecting the interrupt. RTEMS may well need such
173       * a function when disabling normal interrupt processing for
174       * a debug session. May well be a NOP function.
175       */
176      rtems_irq_disable         off;
177      /*
178       * function enabling to know what interrupt may currently occur
179       * if someone manipulates the i8259s interrupt mask without care...
180       */
181      rtems_irq_is_enabled      isOn;
182      /*
183       *  Set to -1 for vectors forced to have only 1 handler
184       */
185      void *next_handler;
186
187}rtems_irq_connect_data;
188
189typedef struct {
190  /*
191   * size of all the table fields (*Tbl) described below.
192   */
193  unsigned int                  irqNb;
194  /*
195   * Default handler used when disconnecting interrupts.
196   */
197  rtems_irq_connect_data        defaultEntry;
198  /*
199   * Table containing initials/current value.
200   */
201  rtems_irq_connect_data*       irqHdlTbl;
202  /*
203   * actual value of BSP_ISA_IRQ_VECTOR_BASE...
204   */
205  rtems_irq_symbolic_name       irqBase;
206  /*
207   * software priorities associated with interrupts.
208   * if irqPrio  [i]  >  intrPrio  [j]  it  means  that 
209   * interrupt handler hdl connected for interrupt name i
210   * will  not be interrupted by the handler connected for interrupt j
211   * The interrupt source  will be physically masked at i8259 level.
212   */
213    rtems_irq_prio*             irqPrioTbl;
214}rtems_irq_global_settings;
215
216
217
218
219/*-------------------------------------------------------------------------+
220| Function Prototypes.
221+--------------------------------------------------------------------------*/
222/*
223 * ------------------------ Intel 8259 (or emulation) Mngt Routines -------
224 */
225
226/*
227 * function to disable a particular irq at 8259 level. After calling
228 * this function, even if the device asserts the interrupt line it will
229 * not be propagated further to the processor
230 */
231int BSP_irq_disable_at_i8259s        (const rtems_irq_symbolic_name irqLine);
232/*
233 * function to enable a particular irq at 8259 level. After calling
234 * this function, if the device asserts the interrupt line it will
235 * be propagated further to the processor
236 */
237int BSP_irq_enable_at_i8259s            (const rtems_irq_symbolic_name irqLine);
238/*
239 * function to acknoledge a particular irq at 8259 level. After calling
240 * this function, if a device asserts an enabled interrupt line it will
241 * be propagated further to the processor. Mainly usefull for people
242 * writting raw handlers as this is automagically done for rtems managed
243 * handlers.
244 */
245int BSP_irq_ack_at_i8259s               (const rtems_irq_symbolic_name irqLine);
246/*
247 * function to check if a particular irq is enabled at 8259 level. After calling
248 */
249int BSP_irq_enabled_at_i8259s           (const rtems_irq_symbolic_name irqLine);
250/*
251 * ------------------------ RTEMS Single Irq Handler Mngt Routines ----------------
252 */
253/*
254 * function to connect a particular irq handler. This hanlder will NOT be called
255 * directly as the result of the corresponding interrupt. Instead, a RTEMS
256 * irq prologue will be called that will :
257 *
258 *      1) save the C scratch registers,
259 *      2) switch to a interrupt stack if the interrupt is not nested,
260 *      3) store the current i8259s' interrupt masks
261 *      4) modify them to disable the current interrupt at 8259 level (and may
262 *      be others depending on software priorities)
263 *      5) aknowledge the i8259s',
264 *      6) demask the processor,
265 *      7) call the application handler
266 *
267 * As a result the hdl function provided
268 *
269 *      a) can perfectly be written is C,
270 *      b) may also well directly call the part of the RTEMS API that can be used
271 *      from interrupt level,
272 *      c) It only responsible for handling the jobs that need to be done at
273 *      the device level including (aknowledging/re-enabling the interrupt at device,
274 *      level, getting the data,...)
275 *
276 *      When returning from the function, the following will be performed by
277 *      the RTEMS irq epilogue :
278 *
279 *      1) masks the interrupts again,
280 *      2) restore the original i8259s' interrupt masks
281 *      3) switch back on the orinal stack if needed,
282 *      4) perform rescheduling when necessary,
283 *      5) restore the C scratch registers...
284 *      6) restore initial execution flow
285 *
286 */
287int BSP_install_rtems_irq_handler       (const rtems_irq_connect_data*);
288int BSP_install_rtems_shared_irq_handler  (const rtems_irq_connect_data*);
289
290#define BSP_SHARED_HANDLER_SUPPORT      1
291
292/*
293 * function to get the current RTEMS irq handler for ptr->name. It enables to
294 * define hanlder chain...
295 */
296int BSP_get_current_rtems_irq_handler   (rtems_irq_connect_data* ptr);
297/*
298 * function to get disconnect the RTEMS irq handler for ptr->name.
299 * This function checks that the value given is the current one for safety reason.
300 * The user can use the previous function to get it.
301 */
302int BSP_remove_rtems_irq_handler        (const rtems_irq_connect_data*);
303
304/*
305 * ------------------------ RTEMS Global Irq Handler Mngt Routines ----------------
306 */
307/*
308 * (Re) Initialize the RTEMS interrupt management.
309 *
310 * The result of calling this function will be the same as if each individual
311 * handler (config->irqHdlTbl[i].hdl)  different from "config->defaultEntry.hdl"
312 * has been individualy connected via
313 *      BSP_install_rtems_irq_handler(&config->irqHdlTbl[i])
314 * And each handler currently equal to config->defaultEntry.hdl
315 * has been previously disconnected via
316 *       BSP_remove_rtems_irq_handler (&config->irqHdlTbl[i])
317 *
318 * This is to say that all information given will be used and not just
319 * only the space.
320 *
321 * CAUTION : the various table address contained in config will be used
322 *           directly by the interrupt mangement code in order to save
323 *           data size so they must stay valid after the call => they should
324 *           not be modified or declared on a stack.
325 */
326
327int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config);
328/*
329 * (Re) get info on current RTEMS interrupt management.
330 */
331int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**);
332 
333extern void BSP_rtems_irq_mng_init(unsigned cpuId);
334extern void BSP_i8259s_init(void);
335
336#ifdef __cplusplus
337}
338#endif
339
340#endif
341
342#endif
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