1 | /* |
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2 | * This software is Copyright (C) 1998 by T.sqware - all rights limited |
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3 | * It is provided in to the public domain "as is", can be freely modified |
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4 | * as far as this copyight notice is kept unchanged, but does not imply |
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5 | * an endorsement by T.sqware of the product in which it is included. |
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6 | */ |
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7 | |
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8 | #include <stdio.h> |
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9 | #include <bsp.h> |
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10 | #include <bsp/irq.h> |
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11 | #include <bsp/uart.h> |
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12 | #include <rtems/libio.h> |
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13 | #include <rtems/bspIo.h> |
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14 | #include <rtems/termiostypes.h> |
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15 | #include <termios.h> |
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16 | #include <assert.h> |
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17 | |
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18 | /* |
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19 | * Basic 16552 driver |
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20 | */ |
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21 | |
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22 | struct uart_data |
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23 | { |
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24 | unsigned long ioBase; |
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25 | int irq; |
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26 | int hwFlow; |
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27 | int baud; |
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28 | BSP_UartBreakCbRec breakCallback; |
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29 | int ioMode; |
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30 | }; |
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31 | |
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32 | /* |
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33 | * Initialization of BSP specific data. |
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34 | * The constants are pulled in from a BSP |
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35 | * specific file, whereas all of the code |
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36 | * in this file is generic and makes no |
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37 | * assumptions about addresses, irq vectors |
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38 | * etc... |
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39 | */ |
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40 | |
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41 | #define UART_UNSUPP ((unsigned long)(-1)) |
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42 | |
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43 | static struct uart_data uart_data[2] = { |
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44 | { |
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45 | #ifdef BSP_UART_IOBASE_COM1 |
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46 | BSP_UART_IOBASE_COM1, |
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47 | BSP_UART_COM1_IRQ, |
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48 | #else |
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49 | UART_UNSUPP, |
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50 | -1, |
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51 | #endif |
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52 | }, |
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53 | { |
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54 | #ifdef BSP_UART_IOBASE_COM2 |
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55 | BSP_UART_IOBASE_COM2, |
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56 | BSP_UART_COM2_IRQ, |
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57 | #else |
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58 | UART_UNSUPP, |
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59 | -1, |
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60 | #endif |
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61 | }, |
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62 | }; |
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63 | |
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64 | #define MAX_UARTS (sizeof(uart_data)/sizeof(uart_data[0])) |
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65 | #define SANITY_CHECK(uart) \ |
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66 | assert( MAX_UARTS > (unsigned)(uart) && uart_data[(uart)].ioBase != UART_UNSUPP ) |
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67 | /* |
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68 | * Macros to read/write register of uart, if configuration is |
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69 | * different just rewrite these macros |
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70 | */ |
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71 | |
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72 | static inline unsigned char |
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73 | uread(int uart, unsigned int reg) |
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74 | { |
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75 | return in_8((unsigned char*)(uart_data[uart].ioBase + reg)); |
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76 | } |
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77 | |
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78 | static inline void |
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79 | uwrite(int uart, int reg, unsigned int val) |
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80 | { |
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81 | out_8((unsigned char*)(uart_data[uart].ioBase + reg), val); |
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82 | } |
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83 | |
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84 | |
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85 | static void |
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86 | uartError(int uart, void *termiosPrivate) |
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87 | { |
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88 | unsigned char uartStatus, dummy; |
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89 | BSP_UartBreakCbProc h; |
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90 | |
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91 | uartStatus = uread(uart, LSR); |
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92 | dummy = uread(uart, RBR); |
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93 | |
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94 | #ifdef UARTDEBUG |
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95 | if (uartStatus & OE) |
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96 | printk("********* Over run Error **********\n"); |
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97 | if (uartStatus & PE) |
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98 | printk("********* Parity Error **********\n"); |
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99 | if (uartStatus & FE) |
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100 | printk("********* Framing Error **********\n"); |
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101 | if (uartStatus & BI) { |
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102 | printk("********* BREAK INTERRUPT *********\n"); |
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103 | #endif |
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104 | if ((h=uart_data[uart].breakCallback.handler)) { |
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105 | h(uart, |
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106 | (dummy<<8)|uartStatus, |
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107 | termiosPrivate, |
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108 | uart_data[uart].breakCallback.private); |
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109 | } |
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110 | #ifdef UARTDEBUG |
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111 | if (uartStatus & ERFIFO) |
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112 | printk("********* Error receive Fifo **********\n"); |
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113 | #endif |
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114 | } |
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115 | |
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116 | /* |
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117 | * Uart initialization, it is hardcoded to 8 bit, no parity, |
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118 | * one stop bit, FIFO, things to be changed |
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119 | * are baud rate and nad hw flow control, |
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120 | * and longest rx fifo setting |
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121 | */ |
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122 | void |
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123 | BSP_uart_init(int uart, int baud, int hwFlow) |
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124 | { |
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125 | unsigned char tmp; |
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126 | |
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127 | /* Sanity check */ |
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128 | SANITY_CHECK(uart); |
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129 | |
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130 | /* Make sure any printk activity drains before |
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131 | * re-initializing. |
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132 | */ |
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133 | while ( ! (uread(uart, LSR) & TEMT) ) |
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134 | ; |
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135 | |
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136 | switch(baud) |
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137 | { |
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138 | case 50: |
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139 | case 75: |
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140 | case 110: |
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141 | case 134: |
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142 | case 300: |
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143 | case 600: |
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144 | case 1200: |
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145 | case 2400: |
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146 | case 9600: |
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147 | case 19200: |
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148 | case 38400: |
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149 | case 57600: |
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150 | case 115200: |
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151 | break; |
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152 | default: |
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153 | assert(0); |
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154 | return; |
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155 | } |
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156 | |
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157 | /* Set DLAB bit to 1 */ |
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158 | uwrite(uart, LCR, DLAB); |
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159 | |
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160 | if ( (int)BSPBaseBaud <= 0 ) { |
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161 | /* Use current divisor assuming BSPBaseBaud gives us the current speed */ |
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162 | BSPBaseBaud = BSPBaseBaud ? -BSPBaseBaud : 9600; |
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163 | BSPBaseBaud *= ((uread(uart, DLM) << 8) | uread(uart, DLL)); |
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164 | } |
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165 | |
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166 | /* Set baud rate */ |
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167 | uwrite(uart, DLL, (BSPBaseBaud/baud) & 0xff); |
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168 | uwrite(uart, DLM, ((BSPBaseBaud/baud) >> 8) & 0xff); |
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169 | |
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170 | /* 8-bit, no parity , 1 stop */ |
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171 | uwrite(uart, LCR, CHR_8_BITS); |
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172 | |
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173 | /* Set DTR, RTS and OUT2 high */ |
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174 | uwrite(uart, MCR, DTR | RTS | OUT_2); |
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175 | |
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176 | /* Enable FIFO */ |
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177 | uwrite(uart, FCR, FIFO_EN | XMIT_RESET | RCV_RESET | RECEIVE_FIFO_TRIGGER12); |
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178 | |
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179 | /* Disable Interrupts */ |
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180 | uwrite(uart, IER, 0); |
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181 | |
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182 | /* Read status to clear them */ |
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183 | tmp = uread(uart, LSR); |
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184 | tmp = uread(uart, RBR); |
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185 | tmp = uread(uart, MSR); |
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186 | (void) tmp; /* avoid set but not used warning */ |
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187 | |
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188 | /* Remember state */ |
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189 | uart_data[uart].hwFlow = hwFlow; |
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190 | uart_data[uart].baud = baud; |
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191 | return; |
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192 | } |
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193 | |
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194 | /* |
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195 | * Set baud |
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196 | */ |
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197 | void |
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198 | BSP_uart_set_baud(int uart, int baud) |
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199 | { |
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200 | unsigned char mcr, ier; |
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201 | |
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202 | /* Sanity check */ |
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203 | SANITY_CHECK(uart); |
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204 | |
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205 | /* |
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206 | * This function may be called whenever TERMIOS parameters |
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207 | * are changed, so we have to make sure that baud change is |
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208 | * indeed required. |
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209 | */ |
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210 | |
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211 | if(baud == uart_data[uart].baud) |
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212 | { |
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213 | return; |
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214 | } |
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215 | |
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216 | mcr = uread(uart, MCR); |
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217 | ier = uread(uart, IER); |
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218 | |
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219 | BSP_uart_init(uart, baud, uart_data[uart].hwFlow); |
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220 | |
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221 | uwrite(uart, MCR, mcr); |
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222 | uwrite(uart, IER, ier); |
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223 | |
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224 | return; |
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225 | } |
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226 | |
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227 | /* |
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228 | * Enable/disable interrupts |
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229 | */ |
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230 | void |
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231 | BSP_uart_intr_ctrl(int uart, int cmd) |
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232 | { |
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233 | |
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234 | SANITY_CHECK(uart); |
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235 | |
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236 | switch(cmd) |
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237 | { |
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238 | case BSP_UART_INTR_CTRL_DISABLE: |
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239 | uwrite(uart, IER, INTERRUPT_DISABLE); |
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240 | break; |
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241 | case BSP_UART_INTR_CTRL_ENABLE: |
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242 | if(uart_data[uart].hwFlow) |
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243 | { |
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244 | uwrite(uart, IER, |
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245 | (RECEIVE_ENABLE | |
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246 | TRANSMIT_ENABLE | |
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247 | RECEIVER_LINE_ST_ENABLE | |
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248 | MODEM_ENABLE |
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249 | ) |
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250 | ); |
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251 | } |
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252 | else |
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253 | { |
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254 | uwrite(uart, IER, |
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255 | (RECEIVE_ENABLE | |
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256 | TRANSMIT_ENABLE | |
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257 | RECEIVER_LINE_ST_ENABLE |
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258 | ) |
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259 | ); |
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260 | } |
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261 | break; |
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262 | case BSP_UART_INTR_CTRL_TERMIOS: |
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263 | if(uart_data[uart].hwFlow) |
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264 | { |
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265 | uwrite(uart, IER, |
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266 | (RECEIVE_ENABLE | |
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267 | RECEIVER_LINE_ST_ENABLE | |
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268 | MODEM_ENABLE |
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269 | ) |
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270 | ); |
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271 | } |
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272 | else |
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273 | { |
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274 | uwrite(uart, IER, |
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275 | (RECEIVE_ENABLE | |
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276 | RECEIVER_LINE_ST_ENABLE |
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277 | ) |
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278 | ); |
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279 | } |
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280 | break; |
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281 | case BSP_UART_INTR_CTRL_GDB: |
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282 | uwrite(uart, IER, RECEIVE_ENABLE); |
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283 | break; |
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284 | default: |
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285 | assert(0); |
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286 | break; |
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287 | } |
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288 | |
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289 | return; |
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290 | } |
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291 | |
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292 | void |
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293 | BSP_uart_throttle(int uart) |
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294 | { |
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295 | unsigned int mcr; |
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296 | |
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297 | SANITY_CHECK(uart); |
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298 | |
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299 | if(!uart_data[uart].hwFlow) |
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300 | { |
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301 | /* Should not happen */ |
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302 | assert(0); |
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303 | return; |
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304 | } |
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305 | mcr = uread (uart, MCR); |
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306 | /* RTS down */ |
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307 | mcr &= ~RTS; |
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308 | uwrite(uart, MCR, mcr); |
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309 | |
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310 | return; |
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311 | } |
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312 | |
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313 | void |
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314 | BSP_uart_unthrottle(int uart) |
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315 | { |
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316 | unsigned int mcr; |
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317 | |
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318 | SANITY_CHECK(uart); |
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319 | |
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320 | if(!uart_data[uart].hwFlow) |
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321 | { |
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322 | /* Should not happen */ |
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323 | assert(0); |
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324 | return; |
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325 | } |
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326 | mcr = uread (uart, MCR); |
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327 | /* RTS up */ |
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328 | mcr |= RTS; |
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329 | uwrite(uart, MCR, mcr); |
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330 | |
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331 | return; |
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332 | } |
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333 | |
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334 | /* |
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335 | * Status function, -1 if error |
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336 | * detected, 0 if no received chars available, |
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337 | * 1 if received char available, 2 if break |
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338 | * is detected, it will eat break and error |
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339 | * chars. It ignores overruns - we cannot do |
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340 | * anything about - it execpt count statistics |
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341 | * and we are not counting it. |
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342 | */ |
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343 | int |
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344 | BSP_uart_polled_status(int uart) |
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345 | { |
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346 | unsigned char val; |
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347 | |
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348 | SANITY_CHECK(uart); |
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349 | |
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350 | val = uread(uart, LSR); |
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351 | |
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352 | if(val & BI) |
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353 | { |
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354 | /* BREAK found, eat character */ |
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355 | uread(uart, RBR); |
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356 | return BSP_UART_STATUS_BREAK; |
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357 | } |
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358 | |
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359 | if((val & (DR | OE | FE)) == 1) |
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360 | { |
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361 | /* No error, character present */ |
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362 | return BSP_UART_STATUS_CHAR; |
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363 | } |
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364 | |
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365 | if((val & (DR | OE | FE)) == 0) |
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366 | { |
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367 | /* Nothing */ |
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368 | return BSP_UART_STATUS_NOCHAR; |
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369 | } |
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370 | |
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371 | /* |
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372 | * Framing or parity error |
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373 | * eat character |
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374 | */ |
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375 | uread(uart, RBR); |
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376 | |
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377 | return BSP_UART_STATUS_ERROR; |
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378 | } |
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379 | |
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380 | /* |
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381 | * Polled mode write function |
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382 | */ |
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383 | void |
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384 | BSP_uart_polled_write(int uart, int val) |
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385 | { |
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386 | unsigned char val1; |
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387 | |
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388 | /* Sanity check */ |
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389 | SANITY_CHECK(uart); |
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390 | |
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391 | for(;;) |
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392 | { |
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393 | if((val1=uread(uart, LSR)) & THRE) |
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394 | { |
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395 | break; |
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396 | } |
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397 | } |
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398 | |
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399 | if(uart_data[uart].hwFlow) |
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400 | { |
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401 | for(;;) |
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402 | { |
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403 | if(uread(uart, MSR) & CTS) |
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404 | { |
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405 | break; |
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406 | } |
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407 | } |
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408 | } |
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409 | |
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410 | uwrite(uart, THR, val & 0xff); |
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411 | |
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412 | return; |
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413 | } |
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414 | |
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415 | void |
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416 | BSP_output_char_via_serial(const char val) |
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417 | { |
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418 | BSP_uart_polled_write(BSPConsolePort, val); |
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419 | if (val == '\n') BSP_uart_polled_write(BSPConsolePort,'\r'); |
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420 | } |
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421 | |
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422 | /* |
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423 | * Polled mode read function |
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424 | */ |
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425 | int |
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426 | BSP_uart_polled_read(int uart) |
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427 | { |
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428 | unsigned char val; |
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429 | |
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430 | SANITY_CHECK(uart); |
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431 | |
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432 | for(;;) |
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433 | { |
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434 | if(uread(uart, LSR) & DR) |
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435 | { |
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436 | break; |
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437 | } |
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438 | } |
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439 | |
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440 | val = uread(uart, RBR); |
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441 | |
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442 | return (int)(val & 0xff); |
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443 | } |
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444 | |
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445 | unsigned |
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446 | BSP_poll_char_via_serial() |
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447 | { |
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448 | return BSP_uart_polled_read(BSPConsolePort); |
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449 | } |
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450 | |
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451 | static void |
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452 | uart_noop(const rtems_irq_connect_data *unused) |
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453 | { |
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454 | return; |
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455 | } |
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456 | |
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457 | /* note that the IRQ names contain _ISA_ for legacy |
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458 | * reasons. They can be any interrupt, depending |
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459 | * on the particular BSP... |
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460 | */ |
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461 | |
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462 | static int |
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463 | uart_isr_is_on(const rtems_irq_connect_data *irq) |
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464 | { |
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465 | int uart; |
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466 | |
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467 | uart = (irq->name == BSP_UART_COM1_IRQ) ? |
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468 | BSP_UART_COM1 : BSP_UART_COM2; |
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469 | |
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470 | return uread(uart,IER); |
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471 | } |
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472 | |
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473 | static int |
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474 | doit(int uart, rtems_irq_hdl handler, int (*p)(const rtems_irq_connect_data*)) |
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475 | { |
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476 | rtems_irq_connect_data d={0}; |
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477 | d.name = uart_data[uart].irq; |
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478 | d.off = d.on = uart_noop; |
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479 | d.isOn = uart_isr_is_on; |
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480 | d.hdl = handler; |
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481 | return p(&d); |
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482 | } |
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483 | |
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484 | int |
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485 | BSP_uart_install_isr(int uart, rtems_irq_hdl handler) |
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486 | { |
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487 | /* Using shared interrupts by default might break things.. the |
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488 | * shared IRQ installer uses malloc() and if a BSP had called this |
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489 | * during early init it might not work... |
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490 | */ |
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491 | #ifdef BSP_UART_USE_SHARED_IRQS |
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492 | return doit(uart, handler, BSP_install_rtems_shared_irq_handler); |
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493 | #else |
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494 | return doit(uart, handler, BSP_install_rtems_irq_handler); |
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495 | #endif |
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496 | } |
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497 | |
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498 | int |
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499 | BSP_uart_remove_isr(int uart, rtems_irq_hdl handler) |
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500 | { |
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501 | return doit(uart, handler, BSP_remove_rtems_irq_handler); |
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502 | } |
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503 | |
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504 | /* ================ Termios support =================*/ |
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505 | |
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506 | static volatile int termios_stopped_com[2] = {0,0}; |
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507 | static volatile int termios_tx_active_com[2] = {0,0}; |
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508 | static void* termios_ttyp_com[2] = {NULL,NULL}; |
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509 | static char termios_tx_hold_com[2] = {0,0}; |
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510 | static volatile char termios_tx_hold_valid_com[2] = {0,0}; |
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511 | |
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512 | /* |
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513 | * Set channel parameters |
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514 | */ |
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515 | void |
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516 | BSP_uart_termios_set(int uart, void *p) |
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517 | { |
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518 | struct rtems_termios_tty *ttyp = p; |
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519 | unsigned char val; |
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520 | SANITY_CHECK(uart); |
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521 | |
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522 | if(uart_data[uart].hwFlow) |
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523 | { |
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524 | val = uread(uart, MSR); |
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525 | |
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526 | termios_stopped_com[uart] = (val & CTS) ? 0 : 1; |
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527 | } |
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528 | else |
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529 | { |
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530 | termios_stopped_com[uart] = 0; |
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531 | } |
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532 | termios_tx_active_com[uart] = 0; |
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533 | termios_ttyp_com[uart] = ttyp; |
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534 | termios_tx_hold_com[uart] = 0; |
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535 | termios_tx_hold_valid_com[uart] = 0; |
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536 | |
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537 | uart_data[uart].ioMode = ttyp->device.outputUsesInterrupts; |
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538 | |
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539 | return; |
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540 | } |
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541 | |
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542 | ssize_t |
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543 | BSP_uart_termios_write_polled(int minor, const char *buf, size_t len) |
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544 | { |
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545 | int uart=minor; /* could differ, theoretically */ |
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546 | int nwrite; |
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547 | const char *b = buf; |
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548 | |
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549 | for (nwrite=0 ; nwrite < len ; nwrite++) { |
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550 | BSP_uart_polled_write(uart, *b++); |
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551 | } |
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552 | return nwrite; |
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553 | } |
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554 | |
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555 | ssize_t |
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556 | BSP_uart_termios_write_com(int minor, const char *buf, size_t len) |
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557 | { |
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558 | int uart=minor; /* could differ, theoretically */ |
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559 | |
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560 | if(len <= 0) |
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561 | { |
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562 | return 0; |
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563 | } |
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564 | |
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565 | /* If the TX buffer is busy - something is royally screwed up */ |
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566 | /* assert((uread(BSP_UART_COM1, LSR) & THRE) != 0); */ |
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567 | |
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568 | if(termios_stopped_com[uart]) |
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569 | { |
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570 | /* CTS low */ |
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571 | termios_tx_hold_com[uart] = *buf; |
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572 | termios_tx_hold_valid_com[uart] = 1; |
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573 | return 0; |
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574 | } |
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575 | |
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576 | /* Write character */ |
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577 | uwrite(uart, THR, *buf & 0xff); |
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578 | |
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579 | /* Enable interrupts if necessary */ |
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580 | if(!termios_tx_active_com[uart] && uart_data[uart].hwFlow) |
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581 | { |
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582 | termios_tx_active_com[uart] = 1; |
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583 | uwrite(uart, IER, |
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584 | (RECEIVE_ENABLE | |
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585 | TRANSMIT_ENABLE | |
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586 | RECEIVER_LINE_ST_ENABLE | |
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587 | MODEM_ENABLE |
---|
588 | ) |
---|
589 | ); |
---|
590 | } |
---|
591 | else if(!termios_tx_active_com[uart]) |
---|
592 | { |
---|
593 | termios_tx_active_com[uart] = 1; |
---|
594 | uwrite(uart, IER, |
---|
595 | (RECEIVE_ENABLE | |
---|
596 | TRANSMIT_ENABLE | |
---|
597 | RECEIVER_LINE_ST_ENABLE |
---|
598 | ) |
---|
599 | ); |
---|
600 | } |
---|
601 | |
---|
602 | return 0; |
---|
603 | } |
---|
604 | |
---|
605 | int |
---|
606 | BSP_uart_termios_read_com(int uart) |
---|
607 | { |
---|
608 | int off = (int)0; |
---|
609 | char buf[40]; |
---|
610 | rtems_interrupt_level l; |
---|
611 | |
---|
612 | /* read bytes */ |
---|
613 | while (( off < sizeof(buf) ) && ( uread(uart, LSR) & DR )) { |
---|
614 | buf[off++] = uread(uart, RBR); |
---|
615 | } |
---|
616 | |
---|
617 | /* write out data */ |
---|
618 | if ( off > 0 ) { |
---|
619 | rtems_termios_enqueue_raw_characters(termios_ttyp_com[uart], buf, off); |
---|
620 | } |
---|
621 | |
---|
622 | /* enable receive interrupts */ |
---|
623 | rtems_interrupt_disable(l); |
---|
624 | uwrite(uart, IER, uread(uart, IER) | (RECEIVE_ENABLE | RECEIVER_LINE_ST_ENABLE)); |
---|
625 | rtems_interrupt_enable(l); |
---|
626 | |
---|
627 | return ( EOF ); |
---|
628 | } |
---|
629 | |
---|
630 | static void |
---|
631 | BSP_uart_termios_isr_com(int uart) |
---|
632 | { |
---|
633 | unsigned char buf[40]; |
---|
634 | unsigned char val, ier; |
---|
635 | int off, ret, vect; |
---|
636 | |
---|
637 | off = 0; |
---|
638 | |
---|
639 | for(;;) |
---|
640 | { |
---|
641 | vect = uread(uart, IIR) & 0xf; |
---|
642 | |
---|
643 | switch(vect) |
---|
644 | { |
---|
645 | case MODEM_STATUS : |
---|
646 | val = uread(uart, MSR); |
---|
647 | if(uart_data[uart].hwFlow) |
---|
648 | { |
---|
649 | if(val & CTS) |
---|
650 | { |
---|
651 | /* CTS high */ |
---|
652 | termios_stopped_com[uart] = 0; |
---|
653 | if(termios_tx_hold_valid_com[uart]) |
---|
654 | { |
---|
655 | termios_tx_hold_valid_com[uart] = 0; |
---|
656 | BSP_uart_termios_write_com(uart, &termios_tx_hold_com[uart], |
---|
657 | 1); |
---|
658 | } |
---|
659 | } |
---|
660 | else |
---|
661 | { |
---|
662 | /* CTS low */ |
---|
663 | termios_stopped_com[uart] = 1; |
---|
664 | } |
---|
665 | } |
---|
666 | break; |
---|
667 | case NO_MORE_INTR : |
---|
668 | /* No more interrupts */ |
---|
669 | if(off != 0) |
---|
670 | { |
---|
671 | /* Update rx buffer */ |
---|
672 | rtems_termios_enqueue_raw_characters(termios_ttyp_com[uart], |
---|
673 | (char *)buf, |
---|
674 | off); |
---|
675 | } |
---|
676 | return; |
---|
677 | case TRANSMITTER_HODING_REGISTER_EMPTY : |
---|
678 | /* |
---|
679 | * TX holding empty: we have to disable these interrupts |
---|
680 | * if there is nothing more to send. |
---|
681 | */ |
---|
682 | |
---|
683 | ret = rtems_termios_dequeue_characters(termios_ttyp_com[uart], 1); |
---|
684 | |
---|
685 | /* If nothing else to send disable interrupts */ |
---|
686 | if(ret == 0 && uart_data[uart].hwFlow) |
---|
687 | { |
---|
688 | uwrite(uart, IER, |
---|
689 | (RECEIVE_ENABLE | |
---|
690 | RECEIVER_LINE_ST_ENABLE | |
---|
691 | MODEM_ENABLE |
---|
692 | ) |
---|
693 | ); |
---|
694 | termios_tx_active_com[uart] = 0; |
---|
695 | } |
---|
696 | else if(ret == 0) |
---|
697 | { |
---|
698 | uwrite(uart, IER, |
---|
699 | (RECEIVE_ENABLE | |
---|
700 | RECEIVER_LINE_ST_ENABLE |
---|
701 | ) |
---|
702 | ); |
---|
703 | termios_tx_active_com[uart] = 0; |
---|
704 | } |
---|
705 | break; |
---|
706 | case RECEIVER_DATA_AVAIL : |
---|
707 | case CHARACTER_TIMEOUT_INDICATION: |
---|
708 | if ( uart_data[uart].ioMode == TERMIOS_TASK_DRIVEN ) |
---|
709 | { |
---|
710 | /* ensure interrupts are enabled */ |
---|
711 | if ( (ier = uread(uart,IER)) & RECEIVE_ENABLE ) |
---|
712 | { |
---|
713 | /* disable interrupts and notify termios */ |
---|
714 | ier &= ~(RECEIVE_ENABLE | RECEIVER_LINE_ST_ENABLE); |
---|
715 | uwrite(uart, IER, ier); |
---|
716 | rtems_termios_rxirq_occured(termios_ttyp_com[uart]); |
---|
717 | } |
---|
718 | } |
---|
719 | else |
---|
720 | { |
---|
721 | /* RX data ready */ |
---|
722 | assert(off < sizeof(buf)); |
---|
723 | while ( off < sizeof(buf) && ( DR & uread(uart, LSR) ) ) |
---|
724 | buf[off++] = uread(uart, RBR); |
---|
725 | } |
---|
726 | break; |
---|
727 | case RECEIVER_ERROR: |
---|
728 | /* RX error: eat character */ |
---|
729 | uartError(uart, termios_ttyp_com[uart]); |
---|
730 | break; |
---|
731 | default: |
---|
732 | /* Should not happen */ |
---|
733 | assert(0); |
---|
734 | return; |
---|
735 | } |
---|
736 | } |
---|
737 | } |
---|
738 | |
---|
739 | /* |
---|
740 | * XXX - Note that this can now be one isr with the uart |
---|
741 | * passed as the parameter. |
---|
742 | */ |
---|
743 | void |
---|
744 | BSP_uart_termios_isr_com1(void *unused) |
---|
745 | { |
---|
746 | BSP_uart_termios_isr_com(BSP_UART_COM1); |
---|
747 | } |
---|
748 | |
---|
749 | void |
---|
750 | BSP_uart_termios_isr_com2(void *unused) |
---|
751 | { |
---|
752 | BSP_uart_termios_isr_com(BSP_UART_COM2); |
---|
753 | } |
---|
754 | |
---|
755 | /* retrieve 'break' handler info */ |
---|
756 | int |
---|
757 | BSP_uart_get_break_cb(int uart, rtems_libio_ioctl_args_t *arg) |
---|
758 | { |
---|
759 | BSP_UartBreakCb cb=arg->buffer; |
---|
760 | unsigned long flags; |
---|
761 | SANITY_CHECK(uart); |
---|
762 | rtems_interrupt_disable(flags); |
---|
763 | *cb = uart_data[uart].breakCallback; |
---|
764 | rtems_interrupt_enable(flags); |
---|
765 | arg->ioctl_return=0; |
---|
766 | return RTEMS_SUCCESSFUL; |
---|
767 | } |
---|
768 | |
---|
769 | /* install 'break' handler */ |
---|
770 | int |
---|
771 | BSP_uart_set_break_cb(int uart, rtems_libio_ioctl_args_t *arg) |
---|
772 | { |
---|
773 | BSP_UartBreakCb cb=arg->buffer; |
---|
774 | unsigned long flags; |
---|
775 | SANITY_CHECK(uart); |
---|
776 | rtems_interrupt_disable(flags); |
---|
777 | uart_data[uart].breakCallback = *cb; |
---|
778 | rtems_interrupt_enable(flags); |
---|
779 | arg->ioctl_return=0; |
---|
780 | return RTEMS_SUCCESSFUL; |
---|
781 | } |
---|