1 | /* |
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2 | * These routines handle the external exception. Multiple ISRs occur off |
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3 | * of this one interrupt. |
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4 | * |
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5 | * COPYRIGHT (c) 1989-2008. |
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6 | * On-Line Applications Research Corporation (OAR). |
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7 | * |
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8 | * The license and distribution terms for this file may in |
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9 | * the file LICENSE in this distribution or at |
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10 | * http://www.rtems.com/license/LICENSE. |
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11 | * |
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12 | * $Id$ |
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13 | */ |
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14 | |
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15 | #include <bsp.h> |
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16 | #include <rtems/chain.h> |
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17 | #include <rtems/bspIo.h> |
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18 | #include <assert.h> |
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19 | |
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20 | #include <stdio.h> /* for sprintf */ |
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21 | |
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22 | /* |
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23 | * Proto types for this file |
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24 | */ |
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25 | |
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26 | rtems_isr external_exception_ISR ( |
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27 | rtems_vector_number vector /* IN */ |
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28 | ); |
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29 | |
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30 | #define NUM_LIRQ_HANDLERS 20 |
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31 | #define NUM_LIRQ ( MAX_BOARD_IRQS - PPC_IRQ_LAST ) |
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32 | |
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33 | /* |
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34 | * Structure to for one of possible multiple interrupt handlers for |
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35 | * a given interrupt. |
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36 | */ |
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37 | typedef struct |
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38 | { |
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39 | rtems_chain_node Node; |
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40 | rtems_isr_entry handler; /* isr routine */ |
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41 | rtems_vector_number vector; /* vector number */ |
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42 | } EE_ISR_Type; |
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43 | |
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44 | /* Note: The following will not work if we add a method to remove |
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45 | * handlers at a later time. |
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46 | */ |
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47 | EE_ISR_Type ISR_Nodes [NUM_LIRQ_HANDLERS]; |
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48 | uint16_t Nodes_Used; |
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49 | rtems_chain_control ISR_Array [NUM_LIRQ]; |
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50 | |
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51 | /* XXX */ |
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52 | void init_irq_data_register(void); |
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53 | |
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54 | void Init_EE_mask_init(void) |
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55 | { |
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56 | } |
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57 | |
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58 | /* |
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59 | * This routine installs one of multiple ISRs for the general purpose |
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60 | * inerrupt. |
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61 | */ |
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62 | rtems_isr_entry set_EE_vector( |
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63 | rtems_isr_entry handler, /* isr routine */ |
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64 | rtems_vector_number vector /* vector number */ |
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65 | ) |
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66 | { |
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67 | uint16_t vec_idx = vector - Score_IRQ_First; |
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68 | uint32_t index; |
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69 | |
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70 | assert (Nodes_Used < NUM_LIRQ_HANDLERS); |
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71 | |
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72 | /* |
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73 | * If we have already installed this handler for this vector, then |
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74 | * just reset it. |
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75 | */ |
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76 | |
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77 | for ( index=0 ; index <= Nodes_Used ; index++ ) { |
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78 | if ( ISR_Nodes[index].vector == vector && |
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79 | ISR_Nodes[index].handler == handler ) |
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80 | return NULL; |
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81 | } |
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82 | |
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83 | /* |
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84 | * Doing things in this order makes them more atomic |
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85 | */ |
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86 | |
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87 | Nodes_Used++; |
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88 | |
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89 | index = Nodes_Used - 1; |
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90 | |
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91 | ISR_Nodes[index].handler = handler; |
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92 | ISR_Nodes[index].vector = vector; |
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93 | |
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94 | /* printf( "Vector Index: %04x, Vector: %d (%x)\n", |
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95 | vec_idx, vector, vector); */ |
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96 | |
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97 | rtems_chain_append( &ISR_Array[vec_idx], &ISR_Nodes[index].Node ); |
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98 | |
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99 | /* |
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100 | * Unmask the interrupt. |
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101 | */ |
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102 | unmask_irq( vec_idx ); |
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103 | |
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104 | return NULL; |
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105 | } |
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106 | |
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107 | /* |
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108 | * This interrupt service routine is called for an External Exception. |
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109 | */ |
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110 | rtems_isr external_exception_ISR ( |
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111 | rtems_vector_number vector /* IN */ |
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112 | ) |
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113 | { |
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114 | uint16_t index; |
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115 | EE_ISR_Type *node; |
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116 | uint16_t value; |
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117 | #if (HAS_PMC_PSC8) |
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118 | uint16_t PMC_irq; |
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119 | uint16_t check_irq; |
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120 | uint16_t status_word; |
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121 | #endif |
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122 | |
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123 | index = read_and_clear_irq(); |
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124 | if ( index >= NUM_LIRQ ) { |
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125 | printk( "ERROR:: Invalid interrupt number (%02x)\n", index ); |
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126 | return; |
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127 | } |
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128 | |
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129 | #if (HAS_PMC_PSC8) |
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130 | PMC_irq = SCORE603E_PCI_IRQ_0 - SCORE603E_IRQ00; |
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131 | |
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132 | if (index == PMC_irq) { |
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133 | status_word = read_and_clear_PMC_irq( index ); |
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134 | |
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135 | for (check_irq=SCORE603E_IRQ16; check_irq<=SCORE603E_IRQ19; check_irq++) { |
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136 | if ( Is_PMC_IRQ( check_irq, status_word )) { |
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137 | index = check_irq - SCORE603E_IRQ00; |
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138 | node = (EE_ISR_Type *)(ISR_Array[ index ].first); |
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139 | |
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140 | if ( rtems_chain_is_tail( &ISR_Array[ index ], (void *)node ) ) { |
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141 | printk ("ERROR:: check %d interrupt %02d has no isr\n", check_irq, index); |
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142 | value = get_irq_mask(); |
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143 | printk(" Mask = %02x\n", value); |
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144 | } |
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145 | while ( !rtems_chain_is_tail( &ISR_Array[ index ], (void *)node ) ) { |
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146 | (*node->handler)( node->vector ); |
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147 | node = (EE_ISR_Type *) node->Node.next; |
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148 | } |
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149 | } |
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150 | } |
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151 | } |
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152 | else |
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153 | #endif |
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154 | { |
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155 | node = (EE_ISR_Type *)(ISR_Array[ index ].first); |
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156 | if ( rtems_chain_is_tail( &ISR_Array[ index ], (void *)node ) ) { |
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157 | printk( "ERROR:: interrupt %02x has no isr\n", index); |
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158 | value = get_irq_mask(); |
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159 | printk(" Mask = %02x\n", value); |
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160 | return; |
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161 | } |
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162 | while ( !rtems_chain_is_tail( &ISR_Array[ index ], (void *)node ) ) { |
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163 | (*node->handler)( node->vector ); |
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164 | node = (EE_ISR_Type *) node->Node.next; |
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165 | } |
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166 | } |
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167 | |
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168 | } |
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