1 | /* genpvec.c |
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2 | * |
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3 | * These routines handle the external exception. Multiple ISRs occur off |
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4 | * of this one interrupt. |
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5 | * |
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6 | * COPYRIGHT (c) 1989-1997. |
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7 | * On-Line Applications Research Corporation (OAR). |
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8 | * Copyright assigned to U.S. Government, 1994. |
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9 | * |
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10 | * The license and distribution terms for this file may in |
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11 | * the file LICENSE in this distribution or at |
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12 | * http://www.OARcorp.com/rtems/license.html. |
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13 | * |
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14 | * $Id$ |
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15 | */ |
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16 | |
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17 | #include <bsp.h> |
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18 | #include <chain.h> |
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19 | #include <assert.h> |
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20 | |
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21 | #include <stdio.h> /* for sprintf */ |
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22 | |
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23 | |
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24 | /* |
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25 | * Proto types for this file |
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26 | */ |
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27 | |
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28 | rtems_isr external_exception_ISR ( |
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29 | rtems_vector_number vector /* IN */ |
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30 | ); |
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31 | |
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32 | #define NUM_LIRQ_HANDLERS 20 |
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33 | #define NUM_LIRQ ( MAX_BOARD_IRQS - PPC_IRQ_LAST ) |
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34 | |
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35 | /* |
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36 | * Structure to for one of possible multiple interrupt handlers for |
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37 | * a given interrupt. |
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38 | */ |
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39 | typedef struct |
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40 | { |
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41 | Chain_Node Node; |
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42 | rtems_isr_entry handler; /* isr routine */ |
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43 | rtems_vector_number vector; /* vector number */ |
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44 | } EE_ISR_Type; |
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45 | |
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46 | |
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47 | /* Note: The following will not work if we add a method to remove |
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48 | * handlers at a later time. |
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49 | */ |
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50 | EE_ISR_Type ISR_Nodes [NUM_LIRQ_HANDLERS]; |
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51 | rtems_unsigned16 Nodes_Used; |
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52 | Chain_Control ISR_Array [NUM_LIRQ]; |
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53 | |
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54 | /* XXX */ |
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55 | void init_irq_data_register(); |
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56 | |
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57 | void initialize_external_exception_vector () |
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58 | { |
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59 | int i; |
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60 | rtems_isr_entry previous_isr; |
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61 | rtems_status_code status; |
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62 | |
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63 | Nodes_Used = 0; |
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64 | |
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65 | /* |
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66 | * Mask out all interupts until they have a handler installed. |
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67 | */ |
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68 | |
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69 | for (i=0; i <NUM_LIRQ; i++) |
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70 | Chain_Initialize_empty( &ISR_Array[i] ); |
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71 | |
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72 | init_irq_data_register(); |
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73 | |
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74 | /* |
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75 | * Install external_exception_ISR () as the handler for |
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76 | * the General Purpose Interrupt. |
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77 | */ |
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78 | status = rtems_interrupt_catch( external_exception_ISR, |
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79 | PPC_IRQ_EXTERNAL, (rtems_isr_entry *) &previous_isr ); |
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80 | } |
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81 | |
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82 | void Init_EE_mask_init() { |
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83 | ; |
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84 | } |
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85 | |
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86 | /* |
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87 | * This routine installs one of multiple ISRs for the general purpose |
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88 | * inerrupt. |
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89 | */ |
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90 | rtems_isr_entry set_EE_vector( |
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91 | rtems_isr_entry handler, /* isr routine */ |
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92 | rtems_vector_number vector /* vector number */ |
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93 | ) |
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94 | { |
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95 | rtems_unsigned16 vec_idx = vector - Score_IRQ_First; |
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96 | rtems_unsigned32 index; |
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97 | |
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98 | assert (Nodes_Used < NUM_LIRQ_HANDLERS); |
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99 | |
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100 | /* |
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101 | * If we have already installed this handler for this vector, then |
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102 | * just reset it. |
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103 | */ |
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104 | |
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105 | for ( index=0 ; index <= Nodes_Used ; index++ ) { |
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106 | if ( ISR_Nodes[index].vector == vector && |
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107 | ISR_Nodes[index].handler == handler ) |
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108 | return NULL; |
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109 | } |
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110 | |
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111 | /* |
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112 | * Doing things in this order makes them more atomic |
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113 | */ |
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114 | |
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115 | Nodes_Used++; |
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116 | |
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117 | index = Nodes_Used - 1; |
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118 | |
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119 | ISR_Nodes[index].handler = handler; |
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120 | ISR_Nodes[index].vector = vector; |
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121 | |
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122 | /* printf( "Vector Index: %04x, Vector: %d (%x)\n", |
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123 | vec_idx, vector, vector); */ |
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124 | |
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125 | Chain_Append( &ISR_Array[vec_idx], &ISR_Nodes[index].Node ); |
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126 | |
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127 | /* |
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128 | * Unmask the interrupt. |
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129 | */ |
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130 | unmask_irq( vec_idx ); |
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131 | |
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132 | return NULL; |
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133 | } |
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134 | |
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135 | /* |
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136 | * This interrupt service routine is called for an External Exception. |
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137 | */ |
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138 | rtems_isr external_exception_ISR ( |
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139 | rtems_vector_number vector /* IN */ |
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140 | ) |
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141 | { |
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142 | rtems_unsigned16 index; |
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143 | EE_ISR_Type *node; |
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144 | rtems_unsigned16 value; |
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145 | char err_msg[100]; |
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146 | #if (HAS_PMC_PSC8) |
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147 | rtems_unsigned16 PMC_irq; |
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148 | rtems_unsigned16 check_irq; |
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149 | rtems_unsigned16 status_word; |
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150 | #endif |
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151 | |
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152 | index = read_and_clear_irq(); |
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153 | if ( index >= NUM_LIRQ ) { |
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154 | sprintf( err_msg, "ERROR:: Invalid interrupt number (%02x)\n", index ); |
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155 | DEBUG_puts( err_msg ); |
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156 | return; |
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157 | } |
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158 | |
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159 | #if (HAS_PMC_PSC8) |
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160 | PMC_irq = SCORE603E_PCI_IRQ_0 - SCORE603E_IRQ00; |
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161 | |
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162 | if (index == PMC_irq) { |
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163 | status_word = read_and_clear_PMC_irq( index ); |
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164 | |
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165 | for (check_irq=SCORE603E_IRQ16; check_irq<=SCORE603E_IRQ19; check_irq++) { |
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166 | if ( Is_PMC_IRQ( check_irq, status_word )) { |
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167 | index = check_irq - SCORE603E_IRQ00; |
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168 | node = (EE_ISR_Type *)(ISR_Array[ index ].first); |
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169 | |
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170 | if ( _Chain_Is_tail( &ISR_Array[ index ], (void *)node ) ) { |
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171 | sprintf(err_msg,"ERROR:: check %d interrupt %02d has no isr\n", |
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172 | check_irq, index); |
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173 | DEBUG_puts( err_msg); |
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174 | value = get_irq_mask(); |
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175 | sprintf(err_msg," Mask = %02x\n", value); |
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176 | DEBUG_puts( err_msg); |
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177 | } |
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178 | while ( !_Chain_Is_tail( &ISR_Array[ index ], (void *)node ) ) { |
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179 | (*node->handler)( node->vector ); |
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180 | node = (EE_ISR_Type *) node->Node.next; |
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181 | } |
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182 | } |
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183 | } |
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184 | } |
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185 | else |
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186 | #endif |
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187 | { |
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188 | node = (EE_ISR_Type *)(ISR_Array[ index ].first); |
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189 | if ( _Chain_Is_tail( &ISR_Array[ index ], (void *)node ) ) { |
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190 | sprintf(err_msg,"ERROR:: interrupt %02x has no isr\n", index); |
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191 | DEBUG_puts( err_msg); |
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192 | value = get_irq_mask(); |
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193 | sprintf(err_msg," Mask = %02x\n", value); |
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194 | DEBUG_puts( err_msg); |
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195 | return; |
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196 | } |
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197 | while ( !_Chain_Is_tail( &ISR_Array[ index ], (void *)node ) ) { |
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198 | (*node->handler)( node->vector ); |
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199 | node = (EE_ISR_Type *) node->Node.next; |
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200 | } |
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201 | } |
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202 | |
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203 | } |
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204 | |
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205 | |
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206 | |
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