source: rtems/c/src/lib/libbsp/powerpc/score603e/startup/genpvec.c @ 1004c3c1

4.104.115
Last change on this file since 1004c3c1 was 1004c3c1, checked in by Joel Sherrill <joel.sherrill@…>, on Oct 2, 2008 at 2:26:17 PM

2008-10-02 Joel Sherrill <joel.sherrill@…>

  • PCI_bus/PCI.c, PCI_bus/PCI.h, PCI_bus/flash.c, console/85c30.h, console/console.c, console/consolebsp.h, console/tbl85c30.c, include/gen2.h, irq/FPGA.c, irq/irq.c, irq/irq.h, irq/irq_init.c, pci/no_host_bridge.c, startup/bspclean.c, startup/bspstart.c, startup/genpvec.c, startup/vmeintr.c: File head clean up.
  • Property mode set to 100644
File size: 4.7 KB
Line 
1/*
2 *  These routines handle the external exception.  Multiple ISRs occur off
3 *  of this one interrupt.
4 *
5 *  COPYRIGHT (c) 1989-2008.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  The license and distribution terms for this file may in
9 *  the file LICENSE in this distribution or at
10 *  http://www.rtems.com/license/LICENSE.
11 *
12 *  $Id$
13 */
14
15#include <bsp.h>
16#include <rtems/chain.h>
17#include <rtems/bspIo.h>
18#include <assert.h>
19
20#include <stdio.h> /* for sprintf */
21
22/*
23 * Proto types for this file
24 */
25
26rtems_isr external_exception_ISR (
27  rtems_vector_number   vector                                  /* IN  */
28);
29
30#define   NUM_LIRQ_HANDLERS   20
31#define   NUM_LIRQ            ( MAX_BOARD_IRQS - PPC_IRQ_LAST )
32
33/*
34 * Structure to for one of possible multiple interrupt handlers for
35 * a given interrupt.
36 */
37typedef struct
38{
39  rtems_chain_node    Node;
40  rtems_isr_entry     handler;                  /* isr routine        */
41  rtems_vector_number vector;                   /* vector number      */
42} EE_ISR_Type;
43
44/* Note:  The following will not work if we add a method to remove
45 *        handlers at a later time.
46 */
47  EE_ISR_Type         ISR_Nodes [NUM_LIRQ_HANDLERS];
48  uint16_t            Nodes_Used;
49  rtems_chain_control ISR_Array  [NUM_LIRQ];
50
51/* XXX */
52void init_irq_data_register(void);
53
54#if 0
55void initialize_external_exception_vector (void)
56{
57  int i;
58  rtems_isr_entry previous_isr;
59  rtems_status_code status;
60
61  Nodes_Used = 0;
62
63  /*
64   * Mask out all interupts until they have a handler installed.
65   */
66
67  for (i=0; i <NUM_LIRQ; i++)
68    rtems_chain_initialize_empty( &ISR_Array[i] );
69
70  init_irq_data_register();
71
72  /*
73   * Install external_exception_ISR () as the handler for
74   *  the General Purpose Interrupt.
75   */
76  status = rtems_interrupt_catch( external_exception_ISR,
77           PPC_IRQ_EXTERNAL, (rtems_isr_entry *) &previous_isr );
78}
79#endif
80
81void Init_EE_mask_init(void)
82{
83}
84
85/*
86 *  This routine installs one of multiple ISRs for the general purpose
87 *  inerrupt.
88 */
89rtems_isr_entry  set_EE_vector(
90  rtems_isr_entry     handler,      /* isr routine        */
91  rtems_vector_number vector        /* vector number      */
92)
93{
94  uint16_t         vec_idx  = vector - Score_IRQ_First;
95  uint32_t         index;
96
97  assert  (Nodes_Used < NUM_LIRQ_HANDLERS);
98
99  /*
100   *  If we have already installed this handler for this vector, then
101   *  just reset it.
102   */
103
104  for ( index=0 ; index <= Nodes_Used ; index++ ) {
105    if ( ISR_Nodes[index].vector == vector &&
106         ISR_Nodes[index].handler == handler )
107      return NULL;
108  }
109
110  /*
111   *  Doing things in this order makes them more atomic
112   */
113
114  Nodes_Used++;
115
116  index = Nodes_Used - 1;
117
118  ISR_Nodes[index].handler = handler;
119  ISR_Nodes[index].vector  = vector;
120
121  /* printf( "Vector Index: %04x, Vector: %d (%x)\n",
122          vec_idx, vector, vector); */
123
124  rtems_chain_append( &ISR_Array[vec_idx], &ISR_Nodes[index].Node );
125
126  /*
127   * Unmask the interrupt.
128   */
129  unmask_irq( vec_idx );
130
131  return NULL;
132}
133
134/*
135 * This interrupt service routine is called for an External Exception.
136 */
137rtems_isr external_exception_ISR (
138  rtems_vector_number   vector             /* IN  */
139)
140{
141 uint16_t            index;
142 EE_ISR_Type         *node;
143 uint16_t            value;
144#if (HAS_PMC_PSC8)
145 uint16_t            PMC_irq;
146 uint16_t            check_irq;
147 uint16_t            status_word;
148#endif
149
150 index = read_and_clear_irq();
151 if ( index >= NUM_LIRQ ) {
152   printk( "ERROR:: Invalid interrupt number (%02x)\n", index );
153   return;
154 }
155
156#if (HAS_PMC_PSC8)
157  PMC_irq = SCORE603E_PCI_IRQ_0 - SCORE603E_IRQ00;
158
159  if (index ==  PMC_irq) {
160    status_word = read_and_clear_PMC_irq( index );
161
162    for (check_irq=SCORE603E_IRQ16; check_irq<=SCORE603E_IRQ19; check_irq++) {
163      if ( Is_PMC_IRQ( check_irq, status_word )) {
164        index = check_irq - SCORE603E_IRQ00;
165        node = (EE_ISR_Type *)(ISR_Array[ index ].first);
166
167        if ( rtems_chain_is_tail( &ISR_Array[ index ], (void *)node ) ) {
168          printk ("ERROR:: check %d interrupt %02d has no isr\n", check_irq, index);
169          value = get_irq_mask();
170          printk("        Mask = %02x\n", value);
171        }
172        while ( !rtems_chain_is_tail( &ISR_Array[ index ], (void *)node ) ) {
173          (*node->handler)( node->vector );
174          node = (EE_ISR_Type *) node->Node.next;
175        }
176      }
177    }
178  }
179  else
180#endif
181  {
182    node = (EE_ISR_Type *)(ISR_Array[ index ].first);
183    if ( rtems_chain_is_tail( &ISR_Array[ index ], (void *)node ) ) {
184      printk( "ERROR:: interrupt %02x has no isr\n", index);
185      value = get_irq_mask();
186      printk("        Mask = %02x\n", value);
187      return;
188    }
189    while ( !rtems_chain_is_tail( &ISR_Array[ index ], (void *)node ) ) {
190     (*node->handler)( node->vector );
191     node = (EE_ISR_Type *) node->Node.next;
192    }
193  }
194
195}
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