source: rtems/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c @ f05b2ac

4.104.114.84.95
Last change on this file since f05b2ac was f05b2ac, checked in by Ralf Corsepius <ralf.corsepius@…>, on 04/21/04 at 16:01:48

Remove duplicate white lines.

  • Property mode set to 100644
File size: 6.3 KB
Line 
1/*  bspstart.c
2 *
3 *  This set of routines starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before any of these are invoked.
7 *
8 *  COPYRIGHT (c) 1989-1997.
9 *  On-Line Applications Research Corporation (OAR).
10 *
11 *  The license and distribution terms for this file may in
12 *  the file LICENSE in this distribution or at
13 *  http://www.rtems.com/license/LICENSE.
14 *
15 *  $Id:
16 */
17
18#include <string.h>
19
20#include <bsp.h>
21#include <rtems/libio.h>
22#include <rtems/libcsupport.h>
23
24/*
25 *  The original table from the application and our copy of it with
26 *  some changes.
27 */
28
29extern rtems_configuration_table  Configuration;
30rtems_configuration_table         BSP_Configuration;
31rtems_cpu_table                   Cpu_table;
32uint32_t                          bsp_isr_level;
33
34/*
35 *  Use the shared implementations of the following routines
36 */
37
38void bsp_postdriver_hook(void);
39void bsp_libc_init( void *, uint32_t, int );
40
41/*PAGE
42 *
43 *  bsp_pretasking_hook
44 *
45 *  BSP pretasking hook.  Called just before drivers are initialized.
46 *  Used to setup libc and install any BSP extensions.
47 */
48
49void bsp_pretasking_hook(void)
50{
51  extern int end;
52  uint32_t         heap_start;
53  uint32_t         heap_size;
54
55  heap_start = (uint32_t) &end;
56  if (heap_start & (CPU_ALIGNMENT-1))
57    heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
58
59  heap_size = BSP_Configuration.work_space_start - (void *)&end;
60  heap_size &= 0xfffffff0;  /* keep it as a multiple of 16 bytes */
61
62  bsp_libc_init((void *) heap_start, heap_size, 0);
63
64#ifdef RTEMS_DEBUG
65  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
66#endif
67}
68
69/*PAGE
70 *
71 *  bsp_predriver_hook
72 *
73 *  Before drivers are setup initialize interupt vectors.
74 */
75
76void init_RTC();
77void initialize_PMC();
78
79void bsp_predriver_hook(void)
80{
81  init_RTC();
82
83  init_PCI();
84  initialize_universe();
85  initialize_PCI_bridge ();
86
87#if (HAS_PMC_PSC8)
88  initialize_PMC();
89#endif
90
91 /*
92  * Initialize Bsp General purpose vector table.
93  */
94 initialize_external_exception_vector();
95
96#if (0)
97  /*
98   * XXX - Modify this to write a 48000000 (loop to self) command
99   *       to each interrupt location.  This is better for debug.
100   */
101 bsp_spurious_initialize();
102#endif
103
104}
105
106/*PAGE
107 *
108 *  initialize_PMC
109 */
110
111void initialize_PMC() {
112  volatile uint32_t         *PMC_addr;
113  uint8_t          data;
114
115#if (0) /* First Values sent */
116  /*
117   * set PMC base address.
118   */
119  PMC_addr  = SCORE603E_PCI_DEVICE_ADDRESS( 0x14 );
120  *PMC_addr = (SCORE603E_PCI_REGISTER_BASE >> 24) & 0x3f;
121
122  /*
123   * Clear status, enable SERR and memory space only.
124   */
125  PMC_addr = SCORE603E_PCI_DEVICE_ADDRESS( 0x4 );
126  *PMC_addr = 0x0201ff37;
127
128  /*
129   * Bit 0 and 1 HI cause Medium Loopback to occur.
130   */
131  PMC_addr = (volatile uint32_t*)
132        SCORE603E_PMC_SERIAL_ADDRESS( 0x100000 );
133  data = *PMC_addr;
134  /*   *PMC_addr = data | 0x3;  */
135  *PMC_addr = data & 0xfc;
136
137#endif
138
139#if (1)
140
141  /*
142   * Clear status, enable SERR and memory space only.
143   */
144  PMC_addr = SCORE603E_PCI_DEVICE_ADDRESS( 0x4 );
145  *PMC_addr = 0x020080cc;
146
147  /*
148   * set PMC base address.
149   */
150  PMC_addr  = SCORE603E_PCI_DEVICE_ADDRESS( 0x14 );
151  *PMC_addr = (SCORE603E_PCI_REGISTER_BASE >> 24) & 0x3f;
152
153  PMC_addr = (volatile uint32_t*)
154      SCORE603E_PMC_SERIAL_ADDRESS( 0x100000 );
155  data = *PMC_addr;
156  *PMC_addr = data & 0xfc;
157
158#endif
159}
160
161/*PAGE
162 *
163 *  SCORE603e_bsp_postdriver_hook
164 *
165 *  Standard post driver hook plus some BSP specific stuff.
166 */
167
168void SCORE603e_bsp_postdriver_hook(void)
169{
170  extern void Init_EE_mask_init(void);
171
172  bsp_postdriver_hook();
173
174  Init_EE_mask_init();
175}
176
177void bsp_set_trap_vectors( void );
178
179/*PAGE
180 *
181 *  bsp_start
182 *
183 *  This routine does the bulk of the system initialization.
184 */
185
186void bsp_start( void )
187{
188  unsigned char *work_space_start;
189  unsigned int  msr_value = 0x0000;
190  volatile uint32_t         *ptr;
191
192  rtems_bsp_delay( 1000 );
193
194  /*
195   *  Zero out lots of memory
196   */
197
198  memset(
199    &end,
200    0,
201    (unsigned char *)&RAM_END - (unsigned char *) &end
202  );
203
204  /*
205   *  There are multiple ROM monitors available for this board.
206   */
207#if (SCORE603E_USE_SDS)
208
209  /*
210   * Write instruction for Unconditional Branch to ROM vector.
211   */
212
213   Code = 0x4bf00002;
214   for (Address = 0x100; Address <= 0xe00; Address += 0x100) {
215     A_Vector = (uint32_t*)Address;
216     Code = 0x4bf00002 + Address;
217     *A_Vector = Code;
218   }
219
220   for (Address = 0x1000; Address <= 0x1400; Address += 0x100) {
221     A_Vector = (uint32_t*)Address;
222     Code = 0x4bf00002 + Address;
223     *A_Vector = Code;
224   }
225
226  Cpu_table.exceptions_in_RAM = TRUE;
227  msr_value = 0x2030;
228
229#elif (SCORE603E_USE_OPEN_FIRMWARE)
230  Cpu_table.exceptions_in_RAM = TRUE;
231  msr_value = 0x2030;
232
233#elif (SCORE603E_USE_NONE)
234  Cpu_table.exceptions_in_RAM = TRUE;
235  msr_value = 0x2030;
236  _CPU_MSR_SET( msr_value );
237  bsp_set_trap_vectors();
238
239#elif (SCORE603E_USE_DINK)
240  Cpu_table.exceptions_in_RAM = TRUE;
241  msr_value = 0x2030;
242  _CPU_MSR_SET( msr_value );
243
244  /*
245   * Override the DINK error on a Decrementor interrupt.
246   */
247  /* org    dec_vector  - rfi */
248  ptr = (uint32_t*)0x900;
249  *ptr = 0x4c000064;
250
251#else
252#error "SCORE603E BSPSTART.C -- what ROM monitor are you using"
253#endif
254
255  _CPU_MSR_SET( msr_value );
256
257  /*
258   *  Need to "allocate" the memory for the RTEMS Workspace and
259   *  tell the RTEMS configuration where it is.  This memory is
260   *  not malloc'ed.  It is just "pulled from the air".
261   */
262
263  work_space_start =
264    (unsigned char *)&RAM_END - BSP_Configuration.work_space_size;
265
266  if ( work_space_start <= (unsigned char *)&end ) {
267    DEBUG_puts( "bspstart: Not enough RAM!!!\n" );
268    bsp_cleanup();
269  }
270
271  BSP_Configuration.work_space_start = work_space_start;
272
273  /*
274   *  initialize the CPU table for this BSP
275   */
276
277  /* Cpu_table.exceptions_in_RAM was set above */
278  Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
279  Cpu_table.predriver_hook  = bsp_predriver_hook;   /* Init vectors    */
280  Cpu_table.postdriver_hook = SCORE603e_bsp_postdriver_hook;
281  Cpu_table.clicks_per_usec = 66 / 4;  /* XXX get from linkcmds */
282  Cpu_table.do_zero_of_workspace = TRUE;
283  Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
284  Cpu_table.idle_task_stack_size = (3 * STACK_MINIMUM_SIZE);
285
286#if ( PPC_USE_DATA_CACHE )
287  instruction_cache_enable ();
288  data_cache_enable ();
289#endif
290}
Note: See TracBrowser for help on using the repository browser.