source: rtems/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c @ eba2e4f

4.104.114.84.95
Last change on this file since eba2e4f was eba2e4f, checked in by Joel Sherrill <joel.sherrill@…>, on 11/01/00 at 21:19:23

2000-11-01 Joel Sherrill <joel@…>

  • startup/bspstart.c: assoc.h, error.h, libio_.h, libio.h, and libcsupport.h moved from libc to lib/include/rtems and now must be referenced as <rtems/XXX.h>. Header file order was cleaned up while doing this.
  • Property mode set to 100644
File size: 6.4 KB
Line 
1/*  bspstart.c
2 *
3 *  This set of routines starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before any of these are invoked.
7 *
8 *  COPYRIGHT (c) 1989-1997.
9 *  On-Line Applications Research Corporation (OAR).
10 *  Copyright assigned to U.S. Government, 1994.
11 *
12 *  The license and distribution terms for this file may in
13 *  the file LICENSE in this distribution or at
14 *  http://www.OARcorp.com/rtems/license.html.
15 *
16 *  $Id:
17 */
18
19#include <string.h>
20
21#include <bsp.h>
22#include <rtems/libio.h>
23#include <rtems/libcsupport.h>
24
25/*
26 *  The original table from the application and our copy of it with
27 *  some changes.
28 */
29 
30extern rtems_configuration_table  Configuration;
31rtems_configuration_table         BSP_Configuration;
32rtems_cpu_table                   Cpu_table;
33rtems_unsigned32                  bsp_isr_level;
34
35/*
36 *  Use the shared implementations of the following routines
37 */
38
39void bsp_postdriver_hook(void);
40void bsp_libc_init( void *, unsigned32, int );
41
42/*PAGE
43 *
44 *  bsp_pretasking_hook
45 *
46 *  BSP pretasking hook.  Called just before drivers are initialized.
47 *  Used to setup libc and install any BSP extensions.
48 */
49
50void bsp_pretasking_hook(void)
51{
52  extern int end;
53  rtems_unsigned32 heap_start;
54  rtems_unsigned32 heap_size;
55
56  heap_start = (rtems_unsigned32) &end;
57  if (heap_start & (CPU_ALIGNMENT-1))
58    heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
59
60  heap_size = BSP_Configuration.work_space_start - (void *)&end;
61  heap_size &= 0xfffffff0;  /* keep it as a multiple of 16 bytes */
62
63  bsp_libc_init((void *) heap_start, heap_size, 0);
64
65#ifdef RTEMS_DEBUG
66  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
67#endif
68}
69
70/*PAGE
71 *
72 *  bsp_predriver_hook
73 *
74 *  Before drivers are setup initialize interupt vectors.
75 */
76
77void init_RTC();
78void initialize_PMC();
79
80void bsp_predriver_hook(void)
81{
82  init_RTC();
83
84  init_PCI();
85  initialize_universe();
86  initialize_PCI_bridge ();
87
88#if (HAS_PMC_PSC8)
89  initialize_PMC();
90#endif
91
92 /*
93  * Initialize Bsp General purpose vector table.
94  */
95 initialize_external_exception_vector();
96
97#if (0)
98  /*
99   * XXX - Modify this to write a 48000000 (loop to self) command
100   *       to each interrupt location.  This is better for debug.
101   */
102 bsp_spurious_initialize();
103#endif
104
105}
106
107/*PAGE
108 *
109 *  initialize_PMC
110 */
111
112void initialize_PMC() {
113  volatile rtems_unsigned32 *PMC_addr;
114  rtems_unsigned8  data;
115
116#if (0) /* First Values sent */
117  /*
118   * set PMC base address.
119   */
120  PMC_addr  = SCORE603E_PCI_DEVICE_ADDRESS( 0x14 );
121  *PMC_addr = (SCORE603E_PCI_REGISTER_BASE >> 24) & 0x3f;
122
123  /*
124   * Clear status, enable SERR and memory space only.
125   */
126  PMC_addr = SCORE603E_PCI_DEVICE_ADDRESS( 0x4 );
127  *PMC_addr = 0x0201ff37;
128
129  /*
130   * Bit 0 and 1 HI cause Medium Loopback to occur.
131   */
132  PMC_addr = (volatile rtems_unsigned32 *)
133        SCORE603E_PMC_SERIAL_ADDRESS( 0x100000 );
134  data = *PMC_addr;
135  /*   *PMC_addr = data | 0x3;  */
136  *PMC_addr = data & 0xfc;
137
138#endif
139
140
141#if (1)
142
143  /*
144   * Clear status, enable SERR and memory space only.
145   */
146  PMC_addr = SCORE603E_PCI_DEVICE_ADDRESS( 0x4 );
147  *PMC_addr = 0x020080cc;
148
149  /*
150   * set PMC base address.
151   */
152  PMC_addr  = SCORE603E_PCI_DEVICE_ADDRESS( 0x14 );
153  *PMC_addr = (SCORE603E_PCI_REGISTER_BASE >> 24) & 0x3f;
154
155  PMC_addr = (volatile rtems_unsigned32 *)
156      SCORE603E_PMC_SERIAL_ADDRESS( 0x100000 );
157  data = *PMC_addr;
158  *PMC_addr = data & 0xfc;
159
160#endif
161}
162
163
164
165/*PAGE
166 *
167 *  SCORE603e_bsp_postdriver_hook
168 *
169 *  Standard post driver hook plus some BSP specific stuff.
170 */
171 
172void SCORE603e_bsp_postdriver_hook(void)
173{
174  extern void Init_EE_mask_init(void);
175
176  bsp_postdriver_hook();
177
178  Init_EE_mask_init();
179}
180
181void bsp_set_trap_vectors( void );
182
183/*PAGE
184 *
185 *  bsp_start
186 *
187 *  This routine does the bulk of the system initialization.
188 */
189
190void bsp_start( void )
191{
192  unsigned char *work_space_start;
193  unsigned int  msr_value = 0x0000;
194  volatile rtems_unsigned32 *ptr;
195
196  delay( 1000 );
197
198  /*
199   *  Zero out lots of memory
200   */
201
202  memset(
203    &end,
204    0,
205    (unsigned char *)&RAM_END - (unsigned char *) &end
206  );
207
208  /*
209   *  There are multiple ROM monitors available for this board. 
210   */
211#if (SCORE603E_USE_SDS)
212
213  /*
214   * Write instruction for Unconditional Branch to ROM vector.
215   */
216   
217   Code = 0x4bf00002;         
218   for (Address = 0x100; Address <= 0xe00; Address += 0x100) {
219     A_Vector = (unsigned32    *)Address;
220     Code = 0x4bf00002 + Address;
221     *A_Vector = Code;
222   }
223   
224   for (Address = 0x1000; Address <= 0x1400; Address += 0x100) {
225     A_Vector = (unsigned32    *)Address;
226     Code = 0x4bf00002 + Address;
227     *A_Vector = Code;
228   }
229   
230  Cpu_table.exceptions_in_RAM = TRUE;
231  msr_value = 0x2030;
232
233#elif (SCORE603E_USE_OPEN_FIRMWARE)
234  Cpu_table.exceptions_in_RAM = TRUE;
235  msr_value = 0x2030;
236
237#elif (SCORE603E_USE_NONE)
238  Cpu_table.exceptions_in_RAM = TRUE;
239  msr_value = 0x2030;
240  _CPU_MSR_SET( msr_value );
241  bsp_set_trap_vectors();
242
243#elif (SCORE603E_USE_DINK)
244  Cpu_table.exceptions_in_RAM = TRUE;
245  msr_value = 0x2030;
246  _CPU_MSR_SET( msr_value );
247
248  /*
249   * Override the DINK error on a Decrementor interrupt.
250   */
251  /* org    dec_vector  - rfi */
252  ptr = (rtems_unsigned32 *)0x900;
253  *ptr = 0x4c000064;
254
255#else
256#error "SCORE603E BSPSTART.C -- what ROM monitor are you using"
257#endif
258
259  _CPU_MSR_SET( msr_value );
260
261  /*
262   *  Need to "allocate" the memory for the RTEMS Workspace and
263   *  tell the RTEMS configuration where it is.  This memory is
264   *  not malloc'ed.  It is just "pulled from the air".
265   */
266
267  work_space_start =
268    (unsigned char *)&RAM_END - BSP_Configuration.work_space_size;
269
270  if ( work_space_start <= (unsigned char *)&end ) {
271    DEBUG_puts( "bspstart: Not enough RAM!!!\n" );
272    bsp_cleanup();
273  }
274
275  BSP_Configuration.work_space_start = work_space_start;
276
277  /*
278   *  initialize the CPU table for this BSP
279   */
280
281  /* Cpu_table.exceptions_in_RAM was set above */
282  Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
283  Cpu_table.predriver_hook  = bsp_predriver_hook;   /* Init vectors    */
284  Cpu_table.postdriver_hook = SCORE603e_bsp_postdriver_hook;
285  Cpu_table.clicks_per_usec = 66 / 4;  /* XXX get from linkcmds */
286  Cpu_table.do_zero_of_workspace = TRUE;
287  Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
288  Cpu_table.idle_task_stack_size = (3 * STACK_MINIMUM_SIZE);
289
290#if ( PPC_USE_DATA_CACHE )
291  instruction_cache_enable ();
292  data_cache_enable ();
293#endif
294}
295
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