1 | /* bspstart.c |
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2 | * |
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3 | * This set of routines starts the application. It includes application, |
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4 | * board, and monitor specific initialization and configuration. |
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5 | * The generic CPU dependent initialization has been performed |
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6 | * before any of these are invoked. |
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7 | * |
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8 | * COPYRIGHT (c) 1989-2007. |
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9 | * On-Line Applications Research Corporation (OAR). |
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10 | * |
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11 | * The license and distribution terms for this file may in |
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12 | * the file LICENSE in this distribution or at |
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13 | * http://www.rtems.com/license/LICENSE. |
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14 | * |
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15 | * $Id: |
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16 | */ |
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17 | |
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18 | #include <string.h> |
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19 | |
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20 | #include <bsp.h> |
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21 | #include <rtems/bspIo.h> |
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22 | #include <rtems/libio.h> |
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23 | #include <libcpu/cpuIdent.h> |
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24 | #define DEBUG 1 |
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25 | |
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26 | /* |
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27 | * Where the heap starts; is used by bsp_pretasking_hook; |
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28 | */ |
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29 | unsigned int BSP_heap_start; |
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30 | |
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31 | /* |
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32 | * PCI Bus Frequency |
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33 | */ |
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34 | unsigned int BSP_bus_frequency; /* XXX - Set this based upon the Score board */ |
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35 | |
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36 | /* |
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37 | * processor clock frequency |
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38 | */ |
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39 | unsigned int BSP_processor_frequency; /* XXX - Set this based upon the Score board */ |
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40 | |
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41 | /* |
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42 | * Time base divisior (how many tick for 1 second). |
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43 | */ |
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44 | unsigned int BSP_time_base_divisor = 1000; /* XXX - Just a guess */ |
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45 | |
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46 | extern unsigned long __rtems_end[]; |
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47 | |
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48 | /* |
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49 | * Driver configuration parameters |
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50 | */ |
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51 | uint32_t bsp_clicks_per_usec; |
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52 | |
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53 | void BSP_panic(char *s) |
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54 | { |
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55 | printk("%s PANIC %s\n",_RTEMS_version, s); |
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56 | __asm__ __volatile ("sc"); |
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57 | } |
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58 | |
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59 | void _BSP_Fatal_error(unsigned int v) |
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60 | { |
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61 | printk("%s PANIC ERROR %x\n",_RTEMS_version, v); |
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62 | __asm__ __volatile ("sc"); |
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63 | } |
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64 | |
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65 | /* |
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66 | * bsp_predriver_hook |
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67 | * |
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68 | * Before drivers are setup initialize interupt vectors. |
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69 | */ |
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70 | |
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71 | void init_RTC(); |
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72 | void initialize_PMC(); |
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73 | |
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74 | void bsp_predriver_hook(void) |
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75 | { |
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76 | #if DEBUG |
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77 | printk("bsp_predriver_hook: init_RTC\n"); |
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78 | #endif |
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79 | init_RTC(); |
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80 | init_PCI(); |
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81 | initialize_universe(); |
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82 | |
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83 | #if DEBUG |
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84 | printk("bsp_predriver_hook: initialize_PCI_bridge\n"); |
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85 | #endif |
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86 | initialize_PCI_bridge (); |
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87 | |
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88 | #if (HAS_PMC_PSC8) |
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89 | #if DEBUG |
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90 | printk("bsp_predriver_hook: initialize_PMC\n"); |
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91 | #endif |
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92 | initialize_PMC(); |
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93 | #endif |
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94 | |
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95 | #if 0 |
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96 | /* |
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97 | * Initialize Bsp General purpose vector table. |
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98 | */ |
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99 | #if DEBUG |
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100 | printk("bsp_predriver_hook: initialize_external_exception_vector\n"); |
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101 | #endif |
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102 | initialize_external_exception_vector(); |
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103 | #endif |
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104 | |
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105 | #if (0) |
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106 | /* |
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107 | * XXX - Modify this to write a 48000000 (loop to self) command |
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108 | * to each interrupt location. This is better for debug. |
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109 | */ |
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110 | #if DEBUG |
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111 | printk("bsp_predriver_hook: bsp_spurious_initialize\n"); |
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112 | #endif |
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113 | bsp_spurious_initialize(); |
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114 | #endif |
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115 | |
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116 | ShowBATS(); |
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117 | |
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118 | #if DEBUG |
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119 | printk("bsp_predriver_hook: End of routine\n"); |
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120 | #endif |
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121 | |
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122 | } |
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123 | |
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124 | /*PAGE |
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125 | * |
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126 | * initialize_PMC |
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127 | */ |
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128 | |
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129 | void initialize_PMC() { |
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130 | volatile uint32_t *PMC_addr; |
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131 | uint8_t data; |
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132 | |
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133 | #if (0) /* First Values sent */ |
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134 | /* |
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135 | * set PMC base address. |
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136 | */ |
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137 | PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x14 ); |
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138 | *PMC_addr = (BSP_PCI_REGISTER_BASE >> 24) & 0x3f; |
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139 | |
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140 | /* |
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141 | * Clear status, enable SERR and memory space only. |
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142 | */ |
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143 | PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x4 ); |
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144 | *PMC_addr = 0x0201ff37; |
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145 | |
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146 | /* |
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147 | * Bit 0 and 1 HI cause Medium Loopback to occur. |
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148 | */ |
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149 | PMC_addr = (volatile uint32_t*) |
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150 | BSP_PMC_SERIAL_ADDRESS( 0x100000 ); |
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151 | data = *PMC_addr; |
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152 | /* *PMC_addr = data | 0x3; */ |
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153 | *PMC_addr = data & 0xfc; |
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154 | |
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155 | #endif |
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156 | |
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157 | #if (1) |
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158 | |
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159 | /* |
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160 | * Clear status, enable SERR and memory space only. |
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161 | */ |
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162 | #if DEBUG |
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163 | printk("initialize_PMC: set Device Address 0x4 \n"); |
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164 | ShowBATS(); |
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165 | #endif |
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166 | PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x4 ); |
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167 | *PMC_addr = 0x020080cc; |
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168 | |
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169 | /* |
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170 | * set PMC base address. |
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171 | */ |
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172 | #if DEBUG |
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173 | printk("initialize_PMC: set Device Address 0x14 \n"); |
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174 | ShowBATS(); |
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175 | #endif |
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176 | PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x14 ); |
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177 | *PMC_addr = (BSP_PCI_REGISTER_BASE >> 24) & 0x3f; |
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178 | |
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179 | #if DEBUG |
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180 | printk("initialize_PMC: set PMC Serial Address 0x100000\n"); |
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181 | #endif |
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182 | PMC_addr = (volatile uint32_t*) |
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183 | BSP_PMC_SERIAL_ADDRESS( 0x100000 ); |
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184 | data = *PMC_addr; |
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185 | *PMC_addr = data & 0xfc; |
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186 | |
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187 | #endif |
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188 | } |
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189 | |
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190 | /*PAGE |
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191 | * |
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192 | * bsp_postdriver_hook |
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193 | * |
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194 | * Standard post driver hook plus some BSP specific stuff. |
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195 | */ |
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196 | |
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197 | void bsp_postdriver_hook(void) |
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198 | { |
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199 | extern void Init_EE_mask_init(void); |
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200 | extern void open_dev_console(void); |
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201 | |
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202 | #if DEBUG |
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203 | printk("bsp_postdriver_hook: initialize libio\n"); |
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204 | #endif |
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205 | if (rtems_libio_supp_helper) |
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206 | (*rtems_libio_supp_helper)(); |
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207 | ShowBATS(); |
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208 | |
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209 | #if DEBUG |
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210 | printk("bsp_postdriver_hook: Init_EE_mask_init\n"); |
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211 | #endif |
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212 | Init_EE_mask_init(); |
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213 | ShowBATS(); |
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214 | #if DEBUG |
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215 | printk("bsp_postdriver_hook: Finished procedure\n"); |
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216 | #endif |
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217 | } |
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218 | |
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219 | void bsp_set_trap_vectors( void ); |
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220 | |
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221 | /*PAGE |
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222 | * |
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223 | * bsp_start |
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224 | * |
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225 | * This routine does the bulk of the system initialization. |
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226 | */ |
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227 | |
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228 | void bsp_start( void ) |
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229 | { |
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230 | unsigned int msr_value = 0x0000; |
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231 | uint32_t intrStackStart; |
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232 | uint32_t intrStackSize; |
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233 | volatile uint32_t *ptr; |
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234 | ppc_cpu_id_t myCpu; |
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235 | ppc_cpu_revision_t myCpuRevision; |
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236 | |
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237 | rtems_bsp_delay( 1000 ); |
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238 | |
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239 | /* |
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240 | * Zero out lots of memory |
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241 | */ |
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242 | #if DEBUG |
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243 | printk("bsp_start: Zero out lots of memory\n"); |
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244 | ShowBATS(); |
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245 | #endif |
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246 | |
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247 | memset( |
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248 | &end, |
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249 | 0, |
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250 | (unsigned char *)&RAM_END - (unsigned char *) &end |
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251 | ); |
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252 | |
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253 | BSP_processor_frequency = 266000000; |
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254 | BSP_bus_frequency = 66000000; |
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255 | |
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256 | /* |
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257 | * Get CPU identification dynamically. Note that the get_ppc_cpu_type() |
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258 | * function store the result in global variables so that it can be used |
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259 | * later... |
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260 | */ |
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261 | myCpu = get_ppc_cpu_type(); |
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262 | myCpuRevision = get_ppc_cpu_revision(); |
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263 | |
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264 | /* |
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265 | * Initialize the interrupt related settings. |
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266 | */ |
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267 | intrStackStart = (uint32_t) __rtems_end + BSP_INIT_STACK_SIZE; |
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268 | intrStackSize = rtems_configuration_get_interrupt_stack_size(); |
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269 | BSP_heap_start = intrStackStart + intrStackSize; |
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270 | |
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271 | /* |
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272 | * Initialize default raw exception handlers. |
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273 | */ |
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274 | printk("ppc_exc_initialize\n"); |
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275 | ppc_exc_initialize( |
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276 | PPC_INTERRUPT_DISABLE_MASK_DEFAULT, |
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277 | intrStackStart, |
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278 | intrStackSize |
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279 | ); |
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280 | |
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281 | /* |
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282 | * There are multiple ROM monitors available for this board. |
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283 | */ |
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284 | #if (SCORE603E_USE_SDS) |
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285 | #if DEBUG |
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286 | printk("bsp_start: USE SDS\n"); |
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287 | #endif |
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288 | |
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289 | |
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290 | /* |
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291 | * Write instruction for Unconditional Branch to ROM vector. |
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292 | */ |
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293 | |
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294 | Code = 0x4bf00002; |
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295 | for (Address = 0x100; Address <= 0xe00; Address += 0x100) { |
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296 | A_Vector = (uint32_t*)Address; |
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297 | Code = 0x4bf00002 + Address; |
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298 | *A_Vector = Code; |
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299 | } |
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300 | |
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301 | for (Address = 0x1000; Address <= 0x1400; Address += 0x100) { |
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302 | A_Vector = (uint32_t*)Address; |
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303 | Code = 0x4bf00002 + Address; |
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304 | *A_Vector = Code; |
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305 | } |
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306 | |
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307 | msr_value = 0x2030; |
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308 | |
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309 | #elif (SCORE603E_USE_OPEN_FIRMWARE) |
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310 | #if DEBUG |
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311 | printk("bsp_start: USE OPEN FIRMWARE\n"); |
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312 | #endif |
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313 | msr_value = 0x2030; |
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314 | |
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315 | #elif (SCORE603E_USE_NONE) |
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316 | #if DEBUG |
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317 | printk("bsp_start: USE NONE\n"); |
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318 | #endif |
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319 | msr_value = 0x2030; |
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320 | _CPU_MSR_SET( msr_value ); |
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321 | bsp_set_trap_vectors(); |
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322 | |
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323 | #elif (SCORE603E_USE_DINK) |
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324 | #if DEBUG |
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325 | printk("bsp_start: USE DINK\n"); |
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326 | #endif |
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327 | msr_value = 0x2030; |
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328 | _CPU_MSR_SET( msr_value ); |
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329 | |
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330 | /* |
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331 | * Override the DINK error on a Decrementor interrupt. |
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332 | */ |
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333 | /* org dec_vector - rfi */ |
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334 | ptr = (uint32_t*)0x900; |
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335 | *ptr = 0x4c000064; |
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336 | |
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337 | #else |
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338 | #if DEBUG |
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339 | printk("bsp_start: ERROR unknow ROM Monitor\n"); |
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340 | #endif |
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341 | #error "SCORE603E BSPSTART.C -- what ROM monitor are you using" |
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342 | #endif |
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343 | |
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344 | _CPU_MSR_SET( msr_value ); |
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345 | |
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346 | /* |
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347 | * initialize the device driver parameters |
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348 | */ |
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349 | #if DEBUG |
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350 | printk("bsp_start: set clicks poer usec\n"); |
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351 | #endif |
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352 | bsp_clicks_per_usec = 66 / 4; /* XXX get from linkcmds */ |
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353 | |
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354 | #if ( PPC_USE_DATA_CACHE ) |
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355 | #if DEBUG |
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356 | printk("bsp_start: cache_enable\n"); |
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357 | #endif |
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358 | instruction_cache_enable (); |
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359 | data_cache_enable (); |
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360 | #if DEBUG |
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361 | printk("bsp_start: END PPC_USE_DATA_CACHE\n"); |
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362 | #endif |
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363 | #endif |
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364 | #if DEBUG |
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365 | printk("bsp_start: end BSPSTART\n"); |
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366 | ShowBATS(); |
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367 | #endif |
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368 | } |
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