source: rtems/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c @ 3f0cfc5

4.104.114.84.9
Last change on this file since 3f0cfc5 was 3f0cfc5, checked in by Joel Sherrill <joel.sherrill@…>, on Mar 11, 2007 at 3:24:18 PM

2007-03-11 Joel Sherrill <joel@…>

  • startup/bspstart.c: Remove assignments of Cpu_table.do_zero_of_workspace to TRUE since TRUE is the default value in boot_card.c
  • Property mode set to 100644
File size: 6.9 KB
Line 
1/*  bspstart.c
2 *
3 *  This set of routines starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before any of these are invoked.
7 *
8 *  COPYRIGHT (c) 1989-1997.
9 *  On-Line Applications Research Corporation (OAR).
10 *
11 *  The license and distribution terms for this file may in
12 *  the file LICENSE in this distribution or at
13 *  http://www.rtems.com/license/LICENSE.
14 *
15 *  $Id:
16 */
17
18#include <string.h>
19
20#include <bsp.h>
21#include <rtems/libio.h>
22#include <rtems/libcsupport.h>
23#include <rtems/bspIo.h>
24
25/*
26 * PCI Bus Frequency
27 */
28unsigned int BSP_bus_frequency;  /* XXX - Set this based upon the Score board */
29
30/*
31 * processor clock frequency
32 */
33unsigned int BSP_processor_frequency; /* XXX - Set this based upon the Score board */
34
35/*
36 * Time base divisior (how many tick for 1 second).
37 */
38unsigned int BSP_time_base_divisor = 1000;  /* XXX - Just a guess */
39
40/*
41 *  The original table from the application and our copy of it with
42 *  some changes.
43 */
44
45extern rtems_configuration_table  Configuration;
46rtems_configuration_table         BSP_Configuration;
47rtems_cpu_table                   Cpu_table;
48uint32_t                          bsp_isr_level;
49
50void BSP_panic(char *s)
51{
52  printk("%s PANIC %s\n",_RTEMS_version, s);
53  __asm__ __volatile ("sc");
54}
55
56void _BSP_Fatal_error(unsigned int v)
57{
58  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
59  __asm__ __volatile ("sc");
60}
61
62/*
63 *  Use the shared implementations of the following routines
64 */
65
66void bsp_postdriver_hook(void);
67void bsp_libc_init( void *, uint32_t, int );
68
69/*PAGE
70 *
71 *  bsp_pretasking_hook
72 *
73 *  BSP pretasking hook.  Called just before drivers are initialized.
74 *  Used to setup libc and install any BSP extensions.
75 */
76
77void bsp_pretasking_hook(void)
78{
79  extern int end;
80  uint32_t         heap_start;
81  uint32_t         heap_size;
82
83  heap_start = (uint32_t) &end;
84  if (heap_start & (CPU_ALIGNMENT-1))
85    heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
86
87  heap_size = BSP_Configuration.work_space_start - (void *)&end;
88  heap_size &= 0xfffffff0;  /* keep it as a multiple of 16 bytes */
89
90  bsp_libc_init((void *) heap_start, heap_size, 0);
91
92#ifdef RTEMS_DEBUG
93  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
94#endif
95}
96
97/*PAGE
98 *
99 *  bsp_predriver_hook
100 *
101 *  Before drivers are setup initialize interupt vectors.
102 */
103
104void init_RTC();
105void initialize_PMC();
106
107void bsp_predriver_hook(void)
108{
109  init_RTC();
110/*   XXX - What Does this now ????
111  init_PCI();
112  initialize_universe();
113*/
114
115  initialize_PCI_bridge ();
116
117#if (HAS_PMC_PSC8)
118  initialize_PMC();
119#endif
120
121 /*
122  * Initialize Bsp General purpose vector table.
123  */
124 initialize_external_exception_vector();
125
126#if (0)
127  /*
128   * XXX - Modify this to write a 48000000 (loop to self) command
129   *       to each interrupt location.  This is better for debug.
130   */
131 bsp_spurious_initialize();
132#endif
133
134}
135
136/*PAGE
137 *
138 *  initialize_PMC
139 */
140
141void initialize_PMC() {
142  volatile uint32_t         *PMC_addr;
143  uint8_t          data;
144
145#if (0) /* First Values sent */
146  /*
147   * set PMC base address.
148   */
149  PMC_addr  = BSP_PCI_DEVICE_ADDRESS( 0x14 );
150  *PMC_addr = (BSP_PCI_REGISTER_BASE >> 24) & 0x3f;
151
152  /*
153   * Clear status, enable SERR and memory space only.
154   */
155  PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x4 );
156  *PMC_addr = 0x0201ff37;
157
158  /*
159   * Bit 0 and 1 HI cause Medium Loopback to occur.
160   */
161  PMC_addr = (volatile uint32_t*)
162        BSP_PMC_SERIAL_ADDRESS( 0x100000 );
163  data = *PMC_addr;
164  /*   *PMC_addr = data | 0x3;  */
165  *PMC_addr = data & 0xfc;
166
167#endif
168
169#if (1)
170
171  /*
172   * Clear status, enable SERR and memory space only.
173   */
174  PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x4 );
175  *PMC_addr = 0x020080cc;
176
177  /*
178   * set PMC base address.
179   */
180  PMC_addr  = BSP_PCI_DEVICE_ADDRESS( 0x14 );
181  *PMC_addr = (BSP_PCI_REGISTER_BASE >> 24) & 0x3f;
182
183  PMC_addr = (volatile uint32_t*)
184      BSP_PMC_SERIAL_ADDRESS( 0x100000 );
185  data = *PMC_addr;
186  *PMC_addr = data & 0xfc;
187
188#endif
189}
190
191/*PAGE
192 *
193 *  SCORE603e_bsp_postdriver_hook
194 *
195 *  Standard post driver hook plus some BSP specific stuff.
196 */
197
198void SCORE603e_bsp_postdriver_hook(void)
199{
200  extern void Init_EE_mask_init(void);
201
202  bsp_postdriver_hook();
203
204  Init_EE_mask_init();
205}
206
207void bsp_set_trap_vectors( void );
208
209/*PAGE
210 *
211 *  bsp_start
212 *
213 *  This routine does the bulk of the system initialization.
214 */
215
216void bsp_start( void )
217{
218  unsigned char *work_space_start;
219  unsigned int  msr_value = 0x0000;
220  volatile uint32_t         *ptr;
221
222  rtems_bsp_delay( 1000 );
223
224  /*
225   *  Zero out lots of memory
226   */
227
228  memset(
229    &end,
230    0,
231    (unsigned char *)&RAM_END - (unsigned char *) &end
232  );
233
234  BSP_processor_frequency = 266000000;
235  BSP_bus_frequency       =  66000000;
236
237  /*
238   *  There are multiple ROM monitors available for this board.
239   */
240#if (SCORE603E_USE_SDS)
241
242  /*
243   * Write instruction for Unconditional Branch to ROM vector.
244   */
245
246   Code = 0x4bf00002;
247   for (Address = 0x100; Address <= 0xe00; Address += 0x100) {
248     A_Vector = (uint32_t*)Address;
249     Code = 0x4bf00002 + Address;
250     *A_Vector = Code;
251   }
252
253   for (Address = 0x1000; Address <= 0x1400; Address += 0x100) {
254     A_Vector = (uint32_t*)Address;
255     Code = 0x4bf00002 + Address;
256     *A_Vector = Code;
257   }
258
259  Cpu_table.exceptions_in_RAM = TRUE;
260  msr_value = 0x2030;
261
262#elif (SCORE603E_USE_OPEN_FIRMWARE)
263  Cpu_table.exceptions_in_RAM = TRUE;
264  msr_value = 0x2030;
265
266#elif (SCORE603E_USE_NONE)
267  Cpu_table.exceptions_in_RAM = TRUE;
268  msr_value = 0x2030;
269  _CPU_MSR_SET( msr_value );
270  bsp_set_trap_vectors();
271
272#elif (SCORE603E_USE_DINK)
273  Cpu_table.exceptions_in_RAM = TRUE;
274  msr_value = 0x2030;
275  _CPU_MSR_SET( msr_value );
276
277  /*
278   * Override the DINK error on a Decrementor interrupt.
279   */
280  /* org    dec_vector  - rfi */
281  ptr = (uint32_t*)0x900;
282  *ptr = 0x4c000064;
283
284#else
285#error "SCORE603E BSPSTART.C -- what ROM monitor are you using"
286#endif
287
288  _CPU_MSR_SET( msr_value );
289
290  /*
291   *  Need to "allocate" the memory for the RTEMS Workspace and
292   *  tell the RTEMS configuration where it is.  This memory is
293   *  not malloc'ed.  It is just "pulled from the air".
294   */
295
296  work_space_start =
297    (unsigned char *)&RAM_END - BSP_Configuration.work_space_size;
298
299  if ( work_space_start <= (unsigned char *)&end ) {
300    DEBUG_puts( "bspstart: Not enough RAM!!!\n" );
301    bsp_cleanup();
302  }
303
304  BSP_Configuration.work_space_start = work_space_start;
305
306  /*
307   *  initialize the CPU table for this BSP
308   */
309
310  /* Cpu_table.exceptions_in_RAM was set above */
311  Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
312  Cpu_table.predriver_hook  = bsp_predriver_hook;   /* Init vectors    */
313  Cpu_table.postdriver_hook = SCORE603e_bsp_postdriver_hook;
314  Cpu_table.clicks_per_usec = 66 / 4;  /* XXX get from linkcmds */
315  Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
316  Cpu_table.idle_task_stack_size = (3 * STACK_MINIMUM_SIZE);
317
318#if ( PPC_USE_DATA_CACHE )
319  instruction_cache_enable ();
320  data_cache_enable ();
321#endif
322}
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