1 | /* bspstart.c |
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2 | * |
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3 | * This set of routines starts the application. It includes application, |
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4 | * board, and monitor specific initialization and configuration. |
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5 | * The generic CPU dependent initialization has been performed |
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6 | * before any of these are invoked. |
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7 | * |
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8 | * COPYRIGHT (c) 1989-2010. |
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9 | * On-Line Applications Research Corporation (OAR). |
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10 | * |
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11 | * The license and distribution terms for this file may be |
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12 | * found in the file LICENSE in this distribution or at |
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13 | * http://www.rtems.com/license/LICENSE. |
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14 | * |
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15 | * $Id$ |
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16 | */ |
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17 | |
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18 | #include <string.h> |
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19 | |
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20 | #include <bsp.h> |
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21 | #include <rtems/libio.h> |
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22 | #include <rtems/libcsupport.h> |
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23 | #include <rtems/bspIo.h> |
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24 | #include <libcpu/cpuIdent.h> |
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25 | #include <bsp/irq.h> |
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26 | |
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27 | #define DEBUG 0 |
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28 | |
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29 | /* |
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30 | * Where the heap starts; is used by bsp_pretasking_hook; |
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31 | */ |
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32 | unsigned int BSP_heap_start; |
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33 | |
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34 | /* |
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35 | * PCI Bus Frequency |
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36 | */ |
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37 | unsigned int BSP_bus_frequency; |
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38 | |
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39 | /* |
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40 | * processor clock frequency |
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41 | */ |
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42 | unsigned int BSP_processor_frequency; |
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43 | |
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44 | /* |
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45 | * Time base divisior (how many tick for 1 second). |
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46 | * Note: Calibrated with an application using a 20ms timer and |
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47 | * a scope. |
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48 | */ |
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49 | unsigned int BSP_time_base_divisor = 3960; |
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50 | |
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51 | /* |
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52 | * Driver configuration parameters |
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53 | */ |
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54 | uint32_t bsp_clicks_per_usec; |
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55 | |
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56 | /* |
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57 | * Memory on this board. |
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58 | */ |
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59 | extern char RamSize[]; |
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60 | uint32_t BSP_mem_size; |
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61 | |
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62 | extern unsigned long __rtems_end[]; |
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63 | |
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64 | void BSP_panic(char *s) |
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65 | { |
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66 | printk("%s PANIC %s\n",_RTEMS_version, s); |
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67 | __asm__ __volatile ("sc"); |
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68 | } |
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69 | |
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70 | void _BSP_Fatal_error(unsigned int v) |
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71 | { |
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72 | printk("%s PANIC ERROR %x\n",_RTEMS_version, v); |
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73 | __asm__ __volatile ("sc"); |
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74 | } |
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75 | |
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76 | /* |
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77 | * Use the shared implementations of the following routines |
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78 | */ |
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79 | |
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80 | void bsp_libc_init( void *, uint32_t, int ); |
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81 | |
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82 | /*PAGE |
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83 | * |
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84 | * bsp_predriver_hook |
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85 | * |
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86 | * Before drivers are setup initialize interupt vectors. |
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87 | */ |
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88 | |
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89 | void init_RTC(void); |
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90 | void initialize_PMC(void); |
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91 | |
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92 | void bsp_predriver_hook(void) |
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93 | { |
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94 | init_PCI(); |
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95 | initialize_universe(); |
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96 | |
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97 | #if DEBUG |
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98 | printk("bsp_predriver_hook: initialize_PCI_bridge\n"); |
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99 | #endif |
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100 | initialize_PCI_bridge (); |
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101 | |
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102 | #if (HAS_PMC_PSC8) |
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103 | #if DEBUG |
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104 | printk("bsp_predriver_hook: initialize_PMC\n"); |
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105 | #endif |
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106 | initialize_PMC(); |
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107 | #endif |
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108 | |
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109 | #if DEBUG |
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110 | printk("bsp_predriver_hook: End of routine\n"); |
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111 | #endif |
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112 | |
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113 | } |
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114 | |
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115 | /*PAGE |
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116 | * |
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117 | * initialize_PMC |
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118 | */ |
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119 | |
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120 | void initialize_PMC(void) { |
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121 | volatile uint32_t *PMC_addr; |
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122 | uint32_t data; |
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123 | |
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124 | /* |
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125 | * Clear status, enable SERR and memory space only. |
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126 | */ |
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127 | PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x4 ); |
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128 | *PMC_addr = 0x020080cc; |
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129 | #if DEBUG |
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130 | printk("initialize_PMC: 0x%x = 0x%x\n", PMC_addr, 0x020080cc); |
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131 | #endif |
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132 | |
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133 | /* |
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134 | * set PMC base address. |
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135 | */ |
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136 | PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x14 ); |
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137 | *PMC_addr = (BSP_PCI_REGISTER_BASE >> 24) & 0x3f; |
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138 | #if DEBUG |
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139 | printk("initialize_PMC: 0x%x = 0x%x\n", PMC_addr, ((BSP_PCI_REGISTER_BASE >> 24) & 0x3f)); |
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140 | #endif |
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141 | |
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142 | PMC_addr = (volatile uint32_t*) |
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143 | BSP_PMC_SERIAL_ADDRESS( 0x100000 ); |
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144 | data = *PMC_addr; |
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145 | #if DEBUG |
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146 | printk("initialize_PMC: Read 0x%x (0x%x)\n", PMC_addr, data ); |
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147 | printk("initialize_PMC: Read 0x%x (0x%x)\n", PMC_addr, data & 0xfc ); |
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148 | #endif |
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149 | *PMC_addr = data & 0xfc; |
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150 | } |
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151 | |
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152 | /*PAGE |
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153 | * |
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154 | * bsp_start |
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155 | * |
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156 | * This routine does the bulk of the system initialization. |
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157 | */ |
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158 | |
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159 | void bsp_start( void ) |
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160 | { |
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161 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
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162 | unsigned int msr_value = 0x0000; |
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163 | uintptr_t intrStackStart; |
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164 | uintptr_t intrStackSize; |
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165 | ppc_cpu_id_t myCpu; |
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166 | ppc_cpu_revision_t myCpuRevision; |
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167 | |
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168 | rtems_bsp_delay( 1000 ); |
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169 | |
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170 | /* |
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171 | * Zero out lots of memory |
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172 | */ |
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173 | #if DEBUG |
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174 | printk("bsp_start: Zero out lots of memory\n"); |
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175 | #endif |
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176 | |
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177 | BSP_processor_frequency = 266000000; |
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178 | BSP_bus_frequency = 66000000; |
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179 | |
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180 | /* |
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181 | * Get CPU identification dynamically. Note that the get_ppc_cpu_type() |
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182 | * function store the result in global variables so that it can be used |
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183 | * later... |
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184 | */ |
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185 | myCpu = get_ppc_cpu_type(); |
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186 | myCpuRevision = get_ppc_cpu_revision(); |
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187 | printk("Cpu: 0x%x Revision: %d\n", myCpu, myCpuRevision); |
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188 | printk("Cpu %s\n", get_ppc_cpu_type_name(myCpu) ); |
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189 | |
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190 | /* |
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191 | * Initialize the interrupt related settings. |
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192 | */ |
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193 | intrStackStart = (uintptr_t) __rtems_end; |
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194 | intrStackSize = rtems_configuration_get_interrupt_stack_size(); |
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195 | printk("Interrupt Stack Start: 0x%x Size: 0x%x Heap Start: 0x%x\n", |
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196 | intrStackStart, intrStackSize, BSP_heap_start |
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197 | ); |
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198 | |
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199 | BSP_mem_size = (uint32_t) RamSize; |
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200 | printk("BSP_mem_size: %p\n", RamSize ); |
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201 | |
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202 | /* |
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203 | * Initialize default raw exception handlers. |
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204 | */ |
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205 | sc = ppc_exc_initialize( |
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206 | PPC_INTERRUPT_DISABLE_MASK_DEFAULT, |
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207 | intrStackStart, |
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208 | intrStackSize |
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209 | ); |
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210 | if (sc != RTEMS_SUCCESSFUL) { |
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211 | BSP_panic("cannot initialize exceptions"); |
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212 | } |
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213 | |
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214 | msr_value = 0x2030; |
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215 | _CPU_MSR_SET( msr_value ); |
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216 | __asm__ volatile("sync; isync"); |
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217 | |
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218 | /* |
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219 | * initialize the device driver parameters |
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220 | */ |
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221 | #if DEBUG |
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222 | printk("bsp_start: set clicks poer usec\n"); |
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223 | #endif |
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224 | bsp_clicks_per_usec = 66 / 4; |
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225 | |
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226 | #if BSP_DATA_CACHE_ENABLED |
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227 | #if DEBUG |
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228 | printk("bsp_start: cache_enable\n"); |
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229 | #endif |
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230 | instruction_cache_enable (); |
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231 | data_cache_enable (); |
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232 | #if DEBUG |
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233 | printk("bsp_start: END BSP_DATA_CACHE_ENABLED\n"); |
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234 | #endif |
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235 | #endif |
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236 | |
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237 | /* |
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238 | * Initalize RTEMS IRQ system |
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239 | */ |
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240 | #if DEBUG |
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241 | printk("bspstart: Call BSP_rtems_irq_mng_init\n"); |
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242 | #endif |
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243 | BSP_rtems_irq_mng_init(0); |
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244 | |
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245 | #if DEBUG |
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246 | printk("bsp_start: end BSPSTART\n"); |
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247 | ShowBATS(); |
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248 | #endif |
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249 | } |
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