source: rtems/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c @ 28f398e7

4.104.114.95
Last change on this file since 28f398e7 was 07e9642c, checked in by Joel Sherrill <joel.sherrill@…>, on 11/28/07 at 21:44:46

2007-11-28 Joel Sherrill <joel.sherrill@…>

  • startup/bspstart.c: Eliminate PowerPC specific elements from the CPU Table. They have been replaced with variables named bsp_XXX as needed.
  • Property mode set to 100644
File size: 7.0 KB
Line 
1/*  bspstart.c
2 *
3 *  This set of routines starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before any of these are invoked.
7 *
8 *  COPYRIGHT (c) 1989-2007.
9 *  On-Line Applications Research Corporation (OAR).
10 *
11 *  The license and distribution terms for this file may in
12 *  the file LICENSE in this distribution or at
13 *  http://www.rtems.com/license/LICENSE.
14 *
15 *  $Id:
16 */
17
18#include <string.h>
19
20#include <bsp.h>
21#include <rtems/libio.h>
22#include <rtems/libcsupport.h>
23#include <rtems/bspIo.h>
24
25/*
26 * PCI Bus Frequency
27 */
28unsigned int BSP_bus_frequency;  /* XXX - Set this based upon the Score board */
29
30/*
31 * processor clock frequency
32 */
33unsigned int BSP_processor_frequency; /* XXX - Set this based upon the Score board */
34
35/*
36 * Time base divisior (how many tick for 1 second).
37 */
38unsigned int BSP_time_base_divisor = 1000;  /* XXX - Just a guess */
39
40/*
41 *  Driver configuration parameters
42 */
43uint32_t   bsp_clicks_per_usec;
44
45/*
46 *  The original table from the application and our copy of it with
47 *  some changes.
48 */
49
50extern rtems_configuration_table  Configuration;
51rtems_configuration_table         BSP_Configuration;
52rtems_cpu_table                   Cpu_table;
53uint32_t                          bsp_isr_level;
54
55void BSP_panic(char *s)
56{
57  printk("%s PANIC %s\n",_RTEMS_version, s);
58  __asm__ __volatile ("sc");
59}
60
61void _BSP_Fatal_error(unsigned int v)
62{
63  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
64  __asm__ __volatile ("sc");
65}
66
67/*
68 *  Use the shared implementations of the following routines
69 */
70
71void bsp_postdriver_hook(void);
72void bsp_libc_init( void *, uint32_t, int );
73
74/*PAGE
75 *
76 *  bsp_pretasking_hook
77 *
78 *  BSP pretasking hook.  Called just before drivers are initialized.
79 *  Used to setup libc and install any BSP extensions.
80 */
81
82void bsp_pretasking_hook(void)
83{
84  extern int end;
85  uint32_t         heap_start;
86  uint32_t         heap_size;
87
88  heap_start = (uint32_t) &end;
89  if (heap_start & (CPU_ALIGNMENT-1))
90    heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
91
92  heap_size = BSP_Configuration.work_space_start - (void *)&end;
93  heap_size &= 0xfffffff0;  /* keep it as a multiple of 16 bytes */
94
95  bsp_libc_init((void *) heap_start, heap_size, 0);
96
97#ifdef RTEMS_DEBUG
98  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
99#endif
100}
101
102/*PAGE
103 *
104 *  bsp_predriver_hook
105 *
106 *  Before drivers are setup initialize interupt vectors.
107 */
108
109void init_RTC();
110void initialize_PMC();
111
112void bsp_predriver_hook(void)
113{
114  init_RTC();
115/*   XXX - What Does this now ????
116  init_PCI();
117  initialize_universe();
118*/
119
120  initialize_PCI_bridge ();
121
122#if (HAS_PMC_PSC8)
123  initialize_PMC();
124#endif
125
126 /*
127  * Initialize Bsp General purpose vector table.
128  */
129 initialize_external_exception_vector();
130
131#if (0)
132  /*
133   * XXX - Modify this to write a 48000000 (loop to self) command
134   *       to each interrupt location.  This is better for debug.
135   */
136 bsp_spurious_initialize();
137#endif
138
139}
140
141/*PAGE
142 *
143 *  initialize_PMC
144 */
145
146void initialize_PMC() {
147  volatile uint32_t         *PMC_addr;
148  uint8_t          data;
149
150#if (0) /* First Values sent */
151  /*
152   * set PMC base address.
153   */
154  PMC_addr  = BSP_PCI_DEVICE_ADDRESS( 0x14 );
155  *PMC_addr = (BSP_PCI_REGISTER_BASE >> 24) & 0x3f;
156
157  /*
158   * Clear status, enable SERR and memory space only.
159   */
160  PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x4 );
161  *PMC_addr = 0x0201ff37;
162
163  /*
164   * Bit 0 and 1 HI cause Medium Loopback to occur.
165   */
166  PMC_addr = (volatile uint32_t*)
167        BSP_PMC_SERIAL_ADDRESS( 0x100000 );
168  data = *PMC_addr;
169  /*   *PMC_addr = data | 0x3;  */
170  *PMC_addr = data & 0xfc;
171
172#endif
173
174#if (1)
175
176  /*
177   * Clear status, enable SERR and memory space only.
178   */
179  PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x4 );
180  *PMC_addr = 0x020080cc;
181
182  /*
183   * set PMC base address.
184   */
185  PMC_addr  = BSP_PCI_DEVICE_ADDRESS( 0x14 );
186  *PMC_addr = (BSP_PCI_REGISTER_BASE >> 24) & 0x3f;
187
188  PMC_addr = (volatile uint32_t*)
189      BSP_PMC_SERIAL_ADDRESS( 0x100000 );
190  data = *PMC_addr;
191  *PMC_addr = data & 0xfc;
192
193#endif
194}
195
196/*PAGE
197 *
198 *  SCORE603e_bsp_postdriver_hook
199 *
200 *  Standard post driver hook plus some BSP specific stuff.
201 */
202
203void SCORE603e_bsp_postdriver_hook(void)
204{
205  extern void Init_EE_mask_init(void);
206
207  bsp_postdriver_hook();
208
209  Init_EE_mask_init();
210}
211
212void bsp_set_trap_vectors( void );
213
214/*PAGE
215 *
216 *  bsp_start
217 *
218 *  This routine does the bulk of the system initialization.
219 */
220
221void bsp_start( void )
222{
223  unsigned char *work_space_start;
224  unsigned int  msr_value = 0x0000;
225  volatile uint32_t         *ptr;
226
227  rtems_bsp_delay( 1000 );
228
229  /*
230   *  Zero out lots of memory
231   */
232
233  memset(
234    &end,
235    0,
236    (unsigned char *)&RAM_END - (unsigned char *) &end
237  );
238
239  BSP_processor_frequency = 266000000;
240  BSP_bus_frequency       =  66000000;
241
242  /*
243   *  There are multiple ROM monitors available for this board.
244   */
245#if (SCORE603E_USE_SDS)
246
247  /*
248   * Write instruction for Unconditional Branch to ROM vector.
249   */
250
251   Code = 0x4bf00002;
252   for (Address = 0x100; Address <= 0xe00; Address += 0x100) {
253     A_Vector = (uint32_t*)Address;
254     Code = 0x4bf00002 + Address;
255     *A_Vector = Code;
256   }
257
258   for (Address = 0x1000; Address <= 0x1400; Address += 0x100) {
259     A_Vector = (uint32_t*)Address;
260     Code = 0x4bf00002 + Address;
261     *A_Vector = Code;
262   }
263
264  Cpu_table.exceptions_in_RAM = TRUE;
265  msr_value = 0x2030;
266
267#elif (SCORE603E_USE_OPEN_FIRMWARE)
268  Cpu_table.exceptions_in_RAM = TRUE;
269  msr_value = 0x2030;
270
271#elif (SCORE603E_USE_NONE)
272  Cpu_table.exceptions_in_RAM = TRUE;
273  msr_value = 0x2030;
274  _CPU_MSR_SET( msr_value );
275  bsp_set_trap_vectors();
276
277#elif (SCORE603E_USE_DINK)
278  Cpu_table.exceptions_in_RAM = TRUE;
279  msr_value = 0x2030;
280  _CPU_MSR_SET( msr_value );
281
282  /*
283   * Override the DINK error on a Decrementor interrupt.
284   */
285  /* org    dec_vector  - rfi */
286  ptr = (uint32_t*)0x900;
287  *ptr = 0x4c000064;
288
289#else
290#error "SCORE603E BSPSTART.C -- what ROM monitor are you using"
291#endif
292
293  _CPU_MSR_SET( msr_value );
294
295  /*
296   *  Need to "allocate" the memory for the RTEMS Workspace and
297   *  tell the RTEMS configuration where it is.  This memory is
298   *  not malloc'ed.  It is just "pulled from the air".
299   */
300
301  work_space_start =
302    (unsigned char *)&RAM_END - BSP_Configuration.work_space_size;
303
304  if ( work_space_start <= (unsigned char *)&end ) {
305    printk( "bspstart: Not enough RAM!!!\n" );
306    bsp_cleanup();
307  }
308
309  BSP_Configuration.work_space_start = work_space_start;
310
311  /*
312   *  initialize the CPU table for this BSP
313   */
314
315  /* Cpu_table.exceptions_in_RAM was set above */
316  Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
317  Cpu_table.predriver_hook  = bsp_predriver_hook;   /* Init vectors    */
318  Cpu_table.postdriver_hook = SCORE603e_bsp_postdriver_hook;
319  Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
320  Cpu_table.idle_task_stack_size = (3 * STACK_MINIMUM_SIZE);
321
322  bsp_clicks_per_usec = 66 / 4;  /* XXX get from linkcmds */
323
324#if ( PPC_USE_DATA_CACHE )
325  instruction_cache_enable ();
326  data_cache_enable ();
327#endif
328}
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