source: rtems/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c @ b1e8a58

4.115
Last change on this file since b1e8a58 was b1e8a58, checked in by Sebastian Huber <sebastian.huber@…>, on 11/14/12 at 08:57:55

bsps/powerpc: Exception initialization error is fatal

  • Property mode set to 100644
File size: 5.0 KB
RevLine 
[42b6dd2a]1/*  bspstart.c
2 *
[9c448e1]3 *  This set of routines starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before any of these are invoked.
7 *
[c5833ef8]8 *  COPYRIGHT (c) 1989-2010.
[9c448e1]9 *  On-Line Applications Research Corporation (OAR).
10 *
[42b6dd2a]11 *  The license and distribution terms for this file may be
12 *  found in the file LICENSE in this distribution or at
[b14e2f2]13 *  http://www.rtems.com/license/LICENSE.
[9c448e1]14 */
15
[eba2e4f]16#include <string.h>
17
[9c448e1]18#include <bsp.h>
[a714cb4]19#include <rtems/libio.h>
[42b6dd2a]20#include <rtems/libcsupport.h>
21#include <rtems/bspIo.h>
[40e7ae2]22#include <libcpu/cpuIdent.h>
[c5833ef8]23#include <bsp/irq.h>
[42b6dd2a]24
25#define DEBUG 0
[40e7ae2]26
27/*
28 * Where the heap starts; is used by bsp_pretasking_hook;
29 */
30unsigned int BSP_heap_start;
[bb41881e]31
32/*
33 * PCI Bus Frequency
34 */
[ac7af4a]35unsigned int BSP_bus_frequency;
[bb41881e]36
37/*
38 * processor clock frequency
39 */
[ac7af4a]40unsigned int BSP_processor_frequency;
[bb41881e]41
42/*
43 * Time base divisior (how many tick for 1 second).
[9f6aaf7]44 * Note: Calibrated with an application using a 20ms timer and
45 * a scope.
[bb41881e]46 */
[9f6aaf7]47unsigned int BSP_time_base_divisor = 3960;
[9c448e1]48
[07e9642c]49/*
50 *  Driver configuration parameters
51 */
52uint32_t   bsp_clicks_per_usec;
53
[42b6dd2a]54/*
55 * Memory on this board.
56 */
57extern char RamSize[];
58uint32_t BSP_mem_size;
59
60extern unsigned long __rtems_end[];
61
[bb41881e]62void BSP_panic(char *s)
63{
64  printk("%s PANIC %s\n",_RTEMS_version, s);
65  __asm__ __volatile ("sc");
66}
67
68void _BSP_Fatal_error(unsigned int v)
69{
70  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
71  __asm__ __volatile ("sc");
72}
73
[42b6dd2a]74/*PAGE
75 *
[9c448e1]76 *  bsp_predriver_hook
77 *
78 *  Before drivers are setup initialize interupt vectors.
[6128a4a]79 */
[9c448e1]80
[42b6dd2a]81void init_RTC(void);
82void initialize_PMC(void);
[9c448e1]83
84void bsp_predriver_hook(void)
85{
[42b6dd2a]86  init_PCI();
87  initialize_universe();
88
89  #if DEBUG
90    printk("bsp_predriver_hook: initialize_PCI_bridge\n");
91  #endif
92  initialize_PCI_bridge ();
[9c448e1]93
94#if (HAS_PMC_PSC8)
[40e7ae2]95  #if DEBUG
96    printk("bsp_predriver_hook: initialize_PMC\n");
97  #endif
[9c448e1]98  initialize_PMC();
99#endif
100
[40e7ae2]101  #if DEBUG
102    printk("bsp_predriver_hook: End of routine\n");
103  #endif
104
[9c448e1]105}
106
107/*PAGE
108 *
109 *  initialize_PMC
110 */
111
[42b6dd2a]112void initialize_PMC(void) {
[3d50574]113  volatile uint32_t     *PMC_addr;
114  uint32_t               data;
[9c448e1]115
116  /*
117   * Clear status, enable SERR and memory space only.
118   */
[f309cda]119  PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x4 );
[3d50574]120  *PMC_addr = 0x020080cc;
[40e7ae2]121  #if DEBUG
[3d50574]122    printk("initialize_PMC: 0x%x = 0x%x\n", PMC_addr, 0x020080cc);
[40e7ae2]123  #endif
[9c448e1]124
125  /*
126   * set PMC base address.
127   */
[f309cda]128  PMC_addr  = BSP_PCI_DEVICE_ADDRESS( 0x14 );
129  *PMC_addr = (BSP_PCI_REGISTER_BASE >> 24) & 0x3f;
[40e7ae2]130  #if DEBUG
[3d50574]131    printk("initialize_PMC: 0x%x = 0x%x\n", PMC_addr, ((BSP_PCI_REGISTER_BASE >> 24) & 0x3f));
[40e7ae2]132  #endif
[3d50574]133
[40e7ae2]134   PMC_addr = (volatile uint32_t*)
[f309cda]135      BSP_PMC_SERIAL_ADDRESS( 0x100000 );
[9c448e1]136  data = *PMC_addr;
[3d50574]137  #if DEBUG
138    printk("initialize_PMC: Read 0x%x (0x%x)\n", PMC_addr, data );
139    printk("initialize_PMC: Read 0x%x (0x%x)\n", PMC_addr, data & 0xfc );
140  #endif
[9c448e1]141  *PMC_addr = data & 0xfc;
142}
143
144/*PAGE
145 *
146 *  bsp_start
147 *
148 *  This routine does the bulk of the system initialization.
149 */
150
151void bsp_start( void )
152{
[5ce16e9]153  unsigned int         msr_value = 0x0000;
[2d2de4eb]154  uintptr_t            intrStackStart;
155  uintptr_t            intrStackSize;
[5ce16e9]156  ppc_cpu_id_t         myCpu;
157  ppc_cpu_revision_t   myCpuRevision;
[42b6dd2a]158
[3d5bd91b]159  rtems_bsp_delay( 1000 );
[9c448e1]160
161  /*
162   *  Zero out lots of memory
163   */
[40e7ae2]164  #if DEBUG
165    printk("bsp_start: Zero out lots of memory\n");
166  #endif
[9c448e1]167
[bb41881e]168  BSP_processor_frequency = 266000000;
169  BSP_bus_frequency       =  66000000;
170
[40e7ae2]171  /*
172   * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
[ac7af4a]173   * function store the result in global variables so that it can be used
[40e7ae2]174   * later...
175   */
176  myCpu         = get_ppc_cpu_type();
177  myCpuRevision = get_ppc_cpu_revision();
[3d50574]178  printk("Cpu: 0x%x  Revision: %d\n", myCpu, myCpuRevision);
179  printk("Cpu %s\n", get_ppc_cpu_type_name(myCpu) );
[40e7ae2]180
181  /*
182   * Initialize the interrupt related settings.
183   */
[2d2de4eb]184  intrStackStart = (uintptr_t) __rtems_end;
[40e7ae2]185  intrStackSize = rtems_configuration_get_interrupt_stack_size();
[42b6dd2a]186  printk("Interrupt Stack Start: 0x%x Size: 0x%x  Heap Start: 0x%x\n",
187    intrStackStart, intrStackSize, BSP_heap_start
188  );
[387a69a]189
[c5833ef8]190  BSP_mem_size = (uint32_t) RamSize;
191  printk("BSP_mem_size: %p\n", RamSize );
[40e7ae2]192
193  /*
194   * Initialize default raw exception handlers.
195   */
[b1e8a58]196  ppc_exc_initialize(
[40e7ae2]197    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
198    intrStackStart,
199    intrStackSize
200  );
[9c448e1]201
202  msr_value = 0x2030;
203  _CPU_MSR_SET( msr_value );
[d3463aed]204  __asm__ volatile("sync; isync");
[9c448e1]205
206  /*
[d34d8692]207   *  initialize the device driver parameters
[9c448e1]208   */
[40e7ae2]209  #if DEBUG
210    printk("bsp_start: set clicks poer usec\n");
211  #endif
[42b6dd2a]212  bsp_clicks_per_usec = 66 / 4;
213
[353be08]214  #if BSP_DATA_CACHE_ENABLED
[42b6dd2a]215    #if DEBUG
216      printk("bsp_start: cache_enable\n");
217    #endif
218    instruction_cache_enable ();
219    data_cache_enable ();
220    #if DEBUG
[353be08]221      printk("bsp_start: END BSP_DATA_CACHE_ENABLED\n");
[42b6dd2a]222    #endif
[40e7ae2]223  #endif
[3d50574]224
[42b6dd2a]225  /*
226   * Initalize RTEMS IRQ system
227   */
[ac7af4a]228  #if DEBUG
[42b6dd2a]229    printk("bspstart: Call BSP_rtems_irq_mng_init\n");
230  #endif
231  BSP_rtems_irq_mng_init(0);
[ac7af4a]232
[40e7ae2]233  #if DEBUG
234    printk("bsp_start: end BSPSTART\n");
[42b6dd2a]235    ShowBATS();
[40e7ae2]236  #endif
[9c448e1]237}
Note: See TracBrowser for help on using the repository browser.