[9c448e1] | 1 | /* bspstart.c |
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| 2 | * |
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| 3 | * This set of routines starts the application. It includes application, |
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| 4 | * board, and monitor specific initialization and configuration. |
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| 5 | * The generic CPU dependent initialization has been performed |
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| 6 | * before any of these are invoked. |
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| 7 | * |
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| 8 | * COPYRIGHT (c) 1989-1997. |
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| 9 | * On-Line Applications Research Corporation (OAR). |
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| 10 | * |
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| 11 | * The license and distribution terms for this file may in |
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| 12 | * the file LICENSE in this distribution or at |
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[b14e2f2] | 13 | * http://www.rtems.com/license/LICENSE. |
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[9c448e1] | 14 | * |
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[6128a4a] | 15 | * $Id: |
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[9c448e1] | 16 | */ |
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| 17 | |
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[eba2e4f] | 18 | #include <string.h> |
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| 19 | |
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[9c448e1] | 20 | #include <bsp.h> |
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| 21 | #include <rtems/libio.h> |
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[eba2e4f] | 22 | #include <rtems/libcsupport.h> |
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[bb41881e] | 23 | #include <rtems/bspIo.h> |
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| 24 | |
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| 25 | /* |
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| 26 | * PCI Bus Frequency |
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| 27 | */ |
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| 28 | unsigned int BSP_bus_frequency; /* XXX - Set this based upon the Score board */ |
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| 29 | |
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| 30 | /* |
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| 31 | * processor clock frequency |
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| 32 | */ |
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| 33 | unsigned int BSP_processor_frequency; /* XXX - Set this based upon the Score board */ |
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| 34 | |
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| 35 | /* |
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| 36 | * Time base divisior (how many tick for 1 second). |
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| 37 | */ |
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| 38 | unsigned int BSP_time_base_divisor = 1000; /* XXX - Just a guess */ |
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[9c448e1] | 39 | |
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| 40 | /* |
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| 41 | * The original table from the application and our copy of it with |
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| 42 | * some changes. |
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| 43 | */ |
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[6128a4a] | 44 | |
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[9c448e1] | 45 | extern rtems_configuration_table Configuration; |
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| 46 | rtems_configuration_table BSP_Configuration; |
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| 47 | rtems_cpu_table Cpu_table; |
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[dac4208] | 48 | uint32_t bsp_isr_level; |
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[9c448e1] | 49 | |
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[bb41881e] | 50 | void BSP_panic(char *s) |
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| 51 | { |
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| 52 | printk("%s PANIC %s\n",_RTEMS_version, s); |
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| 53 | __asm__ __volatile ("sc"); |
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| 54 | } |
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| 55 | |
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| 56 | void _BSP_Fatal_error(unsigned int v) |
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| 57 | { |
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| 58 | printk("%s PANIC ERROR %x\n",_RTEMS_version, v); |
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| 59 | __asm__ __volatile ("sc"); |
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| 60 | } |
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| 61 | |
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[9c448e1] | 62 | /* |
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| 63 | * Use the shared implementations of the following routines |
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| 64 | */ |
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| 65 | |
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| 66 | void bsp_postdriver_hook(void); |
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[dac4208] | 67 | void bsp_libc_init( void *, uint32_t, int ); |
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[9c448e1] | 68 | |
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| 69 | /*PAGE |
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| 70 | * |
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| 71 | * bsp_pretasking_hook |
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| 72 | * |
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| 73 | * BSP pretasking hook. Called just before drivers are initialized. |
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| 74 | * Used to setup libc and install any BSP extensions. |
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| 75 | */ |
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| 76 | |
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| 77 | void bsp_pretasking_hook(void) |
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| 78 | { |
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| 79 | extern int end; |
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[dac4208] | 80 | uint32_t heap_start; |
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| 81 | uint32_t heap_size; |
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[9c448e1] | 82 | |
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[dac4208] | 83 | heap_start = (uint32_t) &end; |
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[9c448e1] | 84 | if (heap_start & (CPU_ALIGNMENT-1)) |
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| 85 | heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1); |
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| 86 | |
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| 87 | heap_size = BSP_Configuration.work_space_start - (void *)&end; |
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| 88 | heap_size &= 0xfffffff0; /* keep it as a multiple of 16 bytes */ |
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| 89 | |
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| 90 | bsp_libc_init((void *) heap_start, heap_size, 0); |
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| 91 | |
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| 92 | #ifdef RTEMS_DEBUG |
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| 93 | rtems_debug_enable( RTEMS_DEBUG_ALL_MASK ); |
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| 94 | #endif |
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| 95 | } |
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| 96 | |
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| 97 | /*PAGE |
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| 98 | * |
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| 99 | * bsp_predriver_hook |
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| 100 | * |
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| 101 | * Before drivers are setup initialize interupt vectors. |
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[6128a4a] | 102 | */ |
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[9c448e1] | 103 | |
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| 104 | void init_RTC(); |
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| 105 | void initialize_PMC(); |
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| 106 | |
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| 107 | void bsp_predriver_hook(void) |
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| 108 | { |
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| 109 | init_RTC(); |
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[bb41881e] | 110 | /* XXX - What Does this now ???? |
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[9c448e1] | 111 | init_PCI(); |
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| 112 | initialize_universe(); |
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[bb41881e] | 113 | */ |
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| 114 | |
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[9c448e1] | 115 | initialize_PCI_bridge (); |
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| 116 | |
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| 117 | #if (HAS_PMC_PSC8) |
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| 118 | initialize_PMC(); |
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| 119 | #endif |
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| 120 | |
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[6128a4a] | 121 | /* |
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[9c448e1] | 122 | * Initialize Bsp General purpose vector table. |
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| 123 | */ |
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| 124 | initialize_external_exception_vector(); |
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| 125 | |
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| 126 | #if (0) |
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[6128a4a] | 127 | /* |
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[9c448e1] | 128 | * XXX - Modify this to write a 48000000 (loop to self) command |
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| 129 | * to each interrupt location. This is better for debug. |
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| 130 | */ |
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| 131 | bsp_spurious_initialize(); |
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| 132 | #endif |
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| 133 | |
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| 134 | } |
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| 135 | |
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| 136 | /*PAGE |
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| 137 | * |
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| 138 | * initialize_PMC |
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| 139 | */ |
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| 140 | |
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| 141 | void initialize_PMC() { |
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[dac4208] | 142 | volatile uint32_t *PMC_addr; |
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| 143 | uint8_t data; |
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[9c448e1] | 144 | |
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| 145 | #if (0) /* First Values sent */ |
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| 146 | /* |
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| 147 | * set PMC base address. |
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| 148 | */ |
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[f309cda] | 149 | PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x14 ); |
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| 150 | *PMC_addr = (BSP_PCI_REGISTER_BASE >> 24) & 0x3f; |
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[9c448e1] | 151 | |
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| 152 | /* |
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| 153 | * Clear status, enable SERR and memory space only. |
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| 154 | */ |
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[f309cda] | 155 | PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x4 ); |
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[9c448e1] | 156 | *PMC_addr = 0x0201ff37; |
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| 157 | |
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| 158 | /* |
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| 159 | * Bit 0 and 1 HI cause Medium Loopback to occur. |
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| 160 | */ |
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[dac4208] | 161 | PMC_addr = (volatile uint32_t*) |
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[f309cda] | 162 | BSP_PMC_SERIAL_ADDRESS( 0x100000 ); |
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[9c448e1] | 163 | data = *PMC_addr; |
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| 164 | /* *PMC_addr = data | 0x3; */ |
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| 165 | *PMC_addr = data & 0xfc; |
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| 166 | |
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| 167 | #endif |
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| 168 | |
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| 169 | #if (1) |
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| 170 | |
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| 171 | /* |
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| 172 | * Clear status, enable SERR and memory space only. |
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| 173 | */ |
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[f309cda] | 174 | PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x4 ); |
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[9c448e1] | 175 | *PMC_addr = 0x020080cc; |
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| 176 | |
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| 177 | /* |
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| 178 | * set PMC base address. |
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| 179 | */ |
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[f309cda] | 180 | PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x14 ); |
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| 181 | *PMC_addr = (BSP_PCI_REGISTER_BASE >> 24) & 0x3f; |
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[9c448e1] | 182 | |
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[dac4208] | 183 | PMC_addr = (volatile uint32_t*) |
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[f309cda] | 184 | BSP_PMC_SERIAL_ADDRESS( 0x100000 ); |
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[9c448e1] | 185 | data = *PMC_addr; |
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| 186 | *PMC_addr = data & 0xfc; |
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| 187 | |
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| 188 | #endif |
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| 189 | } |
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| 190 | |
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| 191 | /*PAGE |
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| 192 | * |
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| 193 | * SCORE603e_bsp_postdriver_hook |
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| 194 | * |
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| 195 | * Standard post driver hook plus some BSP specific stuff. |
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| 196 | */ |
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[6128a4a] | 197 | |
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[9c448e1] | 198 | void SCORE603e_bsp_postdriver_hook(void) |
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| 199 | { |
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[c819ea4] | 200 | extern void Init_EE_mask_init(void); |
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[9c448e1] | 201 | |
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| 202 | bsp_postdriver_hook(); |
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| 203 | |
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| 204 | Init_EE_mask_init(); |
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| 205 | } |
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| 206 | |
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| 207 | void bsp_set_trap_vectors( void ); |
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| 208 | |
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| 209 | /*PAGE |
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| 210 | * |
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| 211 | * bsp_start |
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| 212 | * |
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| 213 | * This routine does the bulk of the system initialization. |
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| 214 | */ |
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| 215 | |
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| 216 | void bsp_start( void ) |
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| 217 | { |
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| 218 | unsigned char *work_space_start; |
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| 219 | unsigned int msr_value = 0x0000; |
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[dac4208] | 220 | volatile uint32_t *ptr; |
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[9c448e1] | 221 | |
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[3d5bd91b] | 222 | rtems_bsp_delay( 1000 ); |
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[9c448e1] | 223 | |
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| 224 | /* |
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| 225 | * Zero out lots of memory |
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| 226 | */ |
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| 227 | |
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| 228 | memset( |
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| 229 | &end, |
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| 230 | 0, |
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| 231 | (unsigned char *)&RAM_END - (unsigned char *) &end |
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| 232 | ); |
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| 233 | |
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[bb41881e] | 234 | BSP_processor_frequency = 266000000; |
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| 235 | BSP_bus_frequency = 66000000; |
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| 236 | |
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[9c448e1] | 237 | /* |
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[6128a4a] | 238 | * There are multiple ROM monitors available for this board. |
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[9c448e1] | 239 | */ |
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| 240 | #if (SCORE603E_USE_SDS) |
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| 241 | |
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[6128a4a] | 242 | /* |
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[9c448e1] | 243 | * Write instruction for Unconditional Branch to ROM vector. |
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| 244 | */ |
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[6128a4a] | 245 | |
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| 246 | Code = 0x4bf00002; |
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| 247 | for (Address = 0x100; Address <= 0xe00; Address += 0x100) { |
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[dac4208] | 248 | A_Vector = (uint32_t*)Address; |
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[9c448e1] | 249 | Code = 0x4bf00002 + Address; |
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| 250 | *A_Vector = Code; |
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| 251 | } |
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[6128a4a] | 252 | |
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| 253 | for (Address = 0x1000; Address <= 0x1400; Address += 0x100) { |
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[dac4208] | 254 | A_Vector = (uint32_t*)Address; |
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[9c448e1] | 255 | Code = 0x4bf00002 + Address; |
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| 256 | *A_Vector = Code; |
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| 257 | } |
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[6128a4a] | 258 | |
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[9c448e1] | 259 | Cpu_table.exceptions_in_RAM = TRUE; |
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| 260 | msr_value = 0x2030; |
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| 261 | |
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| 262 | #elif (SCORE603E_USE_OPEN_FIRMWARE) |
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| 263 | Cpu_table.exceptions_in_RAM = TRUE; |
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| 264 | msr_value = 0x2030; |
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| 265 | |
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| 266 | #elif (SCORE603E_USE_NONE) |
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| 267 | Cpu_table.exceptions_in_RAM = TRUE; |
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| 268 | msr_value = 0x2030; |
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| 269 | _CPU_MSR_SET( msr_value ); |
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| 270 | bsp_set_trap_vectors(); |
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| 271 | |
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| 272 | #elif (SCORE603E_USE_DINK) |
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| 273 | Cpu_table.exceptions_in_RAM = TRUE; |
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| 274 | msr_value = 0x2030; |
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| 275 | _CPU_MSR_SET( msr_value ); |
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| 276 | |
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| 277 | /* |
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| 278 | * Override the DINK error on a Decrementor interrupt. |
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| 279 | */ |
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| 280 | /* org dec_vector - rfi */ |
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[dac4208] | 281 | ptr = (uint32_t*)0x900; |
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[9c448e1] | 282 | *ptr = 0x4c000064; |
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| 283 | |
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| 284 | #else |
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| 285 | #error "SCORE603E BSPSTART.C -- what ROM monitor are you using" |
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| 286 | #endif |
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| 287 | |
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| 288 | _CPU_MSR_SET( msr_value ); |
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| 289 | |
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| 290 | /* |
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| 291 | * Need to "allocate" the memory for the RTEMS Workspace and |
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| 292 | * tell the RTEMS configuration where it is. This memory is |
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| 293 | * not malloc'ed. It is just "pulled from the air". |
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| 294 | */ |
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| 295 | |
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[6128a4a] | 296 | work_space_start = |
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[9c448e1] | 297 | (unsigned char *)&RAM_END - BSP_Configuration.work_space_size; |
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| 298 | |
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| 299 | if ( work_space_start <= (unsigned char *)&end ) { |
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[50f93fb] | 300 | printk( "bspstart: Not enough RAM!!!\n" ); |
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[9c448e1] | 301 | bsp_cleanup(); |
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| 302 | } |
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| 303 | |
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| 304 | BSP_Configuration.work_space_start = work_space_start; |
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| 305 | |
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| 306 | /* |
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| 307 | * initialize the CPU table for this BSP |
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| 308 | */ |
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| 309 | |
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| 310 | /* Cpu_table.exceptions_in_RAM was set above */ |
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| 311 | Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */ |
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| 312 | Cpu_table.predriver_hook = bsp_predriver_hook; /* Init vectors */ |
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| 313 | Cpu_table.postdriver_hook = SCORE603e_bsp_postdriver_hook; |
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| 314 | Cpu_table.clicks_per_usec = 66 / 4; /* XXX get from linkcmds */ |
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[df49c60] | 315 | Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY; |
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[9c448e1] | 316 | Cpu_table.idle_task_stack_size = (3 * STACK_MINIMUM_SIZE); |
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| 317 | |
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| 318 | #if ( PPC_USE_DATA_CACHE ) |
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[6128a4a] | 319 | instruction_cache_enable (); |
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[9c448e1] | 320 | data_cache_enable (); |
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| 321 | #endif |
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| 322 | } |
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