[9c448e1] | 1 | /* bspstart.c |
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| 2 | * |
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| 3 | * This set of routines starts the application. It includes application, |
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| 4 | * board, and monitor specific initialization and configuration. |
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| 5 | * The generic CPU dependent initialization has been performed |
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| 6 | * before any of these are invoked. |
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| 7 | * |
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[07e9642c] | 8 | * COPYRIGHT (c) 1989-2007. |
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[9c448e1] | 9 | * On-Line Applications Research Corporation (OAR). |
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| 10 | * |
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| 11 | * The license and distribution terms for this file may in |
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| 12 | * the file LICENSE in this distribution or at |
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[b14e2f2] | 13 | * http://www.rtems.com/license/LICENSE. |
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[9c448e1] | 14 | * |
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[6128a4a] | 15 | * $Id: |
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[9c448e1] | 16 | */ |
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| 17 | |
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[eba2e4f] | 18 | #include <string.h> |
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| 19 | |
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[9c448e1] | 20 | #include <bsp.h> |
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| 21 | #include <rtems/libio.h> |
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[eba2e4f] | 22 | #include <rtems/libcsupport.h> |
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[bb41881e] | 23 | #include <rtems/bspIo.h> |
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| 24 | |
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| 25 | /* |
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| 26 | * PCI Bus Frequency |
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| 27 | */ |
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| 28 | unsigned int BSP_bus_frequency; /* XXX - Set this based upon the Score board */ |
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| 29 | |
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| 30 | /* |
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| 31 | * processor clock frequency |
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| 32 | */ |
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| 33 | unsigned int BSP_processor_frequency; /* XXX - Set this based upon the Score board */ |
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| 34 | |
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| 35 | /* |
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| 36 | * Time base divisior (how many tick for 1 second). |
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| 37 | */ |
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| 38 | unsigned int BSP_time_base_divisor = 1000; /* XXX - Just a guess */ |
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[9c448e1] | 39 | |
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[07e9642c] | 40 | /* |
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| 41 | * Driver configuration parameters |
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| 42 | */ |
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| 43 | uint32_t bsp_clicks_per_usec; |
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| 44 | |
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[9c448e1] | 45 | /* |
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| 46 | * The original table from the application and our copy of it with |
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| 47 | * some changes. |
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| 48 | */ |
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[6128a4a] | 49 | |
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[9c448e1] | 50 | extern rtems_configuration_table Configuration; |
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| 51 | rtems_configuration_table BSP_Configuration; |
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| 52 | rtems_cpu_table Cpu_table; |
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[dac4208] | 53 | uint32_t bsp_isr_level; |
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[9c448e1] | 54 | |
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[bb41881e] | 55 | void BSP_panic(char *s) |
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| 56 | { |
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| 57 | printk("%s PANIC %s\n",_RTEMS_version, s); |
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| 58 | __asm__ __volatile ("sc"); |
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| 59 | } |
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| 60 | |
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| 61 | void _BSP_Fatal_error(unsigned int v) |
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| 62 | { |
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| 63 | printk("%s PANIC ERROR %x\n",_RTEMS_version, v); |
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| 64 | __asm__ __volatile ("sc"); |
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| 65 | } |
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| 66 | |
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[9c448e1] | 67 | /* |
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| 68 | * Use the shared implementations of the following routines |
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| 69 | */ |
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| 70 | |
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| 71 | void bsp_postdriver_hook(void); |
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[dac4208] | 72 | void bsp_libc_init( void *, uint32_t, int ); |
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[9c448e1] | 73 | |
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| 74 | /*PAGE |
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| 75 | * |
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| 76 | * bsp_pretasking_hook |
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| 77 | * |
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| 78 | * BSP pretasking hook. Called just before drivers are initialized. |
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| 79 | * Used to setup libc and install any BSP extensions. |
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| 80 | */ |
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| 81 | |
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| 82 | void bsp_pretasking_hook(void) |
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| 83 | { |
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| 84 | extern int end; |
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[dac4208] | 85 | uint32_t heap_start; |
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| 86 | uint32_t heap_size; |
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[9c448e1] | 87 | |
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[dac4208] | 88 | heap_start = (uint32_t) &end; |
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[9c448e1] | 89 | if (heap_start & (CPU_ALIGNMENT-1)) |
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| 90 | heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1); |
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| 91 | |
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| 92 | heap_size = BSP_Configuration.work_space_start - (void *)&end; |
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| 93 | heap_size &= 0xfffffff0; /* keep it as a multiple of 16 bytes */ |
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| 94 | |
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| 95 | bsp_libc_init((void *) heap_start, heap_size, 0); |
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| 96 | |
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| 97 | #ifdef RTEMS_DEBUG |
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| 98 | rtems_debug_enable( RTEMS_DEBUG_ALL_MASK ); |
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| 99 | #endif |
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| 100 | } |
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| 101 | |
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| 102 | /*PAGE |
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| 103 | * |
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| 104 | * bsp_predriver_hook |
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| 105 | * |
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| 106 | * Before drivers are setup initialize interupt vectors. |
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[6128a4a] | 107 | */ |
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[9c448e1] | 108 | |
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| 109 | void init_RTC(); |
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| 110 | void initialize_PMC(); |
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| 111 | |
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| 112 | void bsp_predriver_hook(void) |
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| 113 | { |
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| 114 | init_RTC(); |
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[bb41881e] | 115 | /* XXX - What Does this now ???? |
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[9c448e1] | 116 | init_PCI(); |
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| 117 | initialize_universe(); |
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[bb41881e] | 118 | */ |
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| 119 | |
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[9c448e1] | 120 | initialize_PCI_bridge (); |
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| 121 | |
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| 122 | #if (HAS_PMC_PSC8) |
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| 123 | initialize_PMC(); |
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| 124 | #endif |
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| 125 | |
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[6128a4a] | 126 | /* |
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[9c448e1] | 127 | * Initialize Bsp General purpose vector table. |
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| 128 | */ |
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| 129 | initialize_external_exception_vector(); |
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| 130 | |
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| 131 | #if (0) |
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[6128a4a] | 132 | /* |
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[9c448e1] | 133 | * XXX - Modify this to write a 48000000 (loop to self) command |
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| 134 | * to each interrupt location. This is better for debug. |
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| 135 | */ |
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| 136 | bsp_spurious_initialize(); |
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| 137 | #endif |
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| 138 | |
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| 139 | } |
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| 140 | |
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| 141 | /*PAGE |
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| 142 | * |
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| 143 | * initialize_PMC |
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| 144 | */ |
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| 145 | |
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| 146 | void initialize_PMC() { |
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[dac4208] | 147 | volatile uint32_t *PMC_addr; |
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| 148 | uint8_t data; |
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[9c448e1] | 149 | |
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| 150 | #if (0) /* First Values sent */ |
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| 151 | /* |
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| 152 | * set PMC base address. |
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| 153 | */ |
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[f309cda] | 154 | PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x14 ); |
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| 155 | *PMC_addr = (BSP_PCI_REGISTER_BASE >> 24) & 0x3f; |
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[9c448e1] | 156 | |
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| 157 | /* |
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| 158 | * Clear status, enable SERR and memory space only. |
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| 159 | */ |
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[f309cda] | 160 | PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x4 ); |
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[9c448e1] | 161 | *PMC_addr = 0x0201ff37; |
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| 162 | |
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| 163 | /* |
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| 164 | * Bit 0 and 1 HI cause Medium Loopback to occur. |
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| 165 | */ |
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[dac4208] | 166 | PMC_addr = (volatile uint32_t*) |
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[f309cda] | 167 | BSP_PMC_SERIAL_ADDRESS( 0x100000 ); |
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[9c448e1] | 168 | data = *PMC_addr; |
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| 169 | /* *PMC_addr = data | 0x3; */ |
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| 170 | *PMC_addr = data & 0xfc; |
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| 171 | |
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| 172 | #endif |
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| 173 | |
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| 174 | #if (1) |
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| 175 | |
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| 176 | /* |
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| 177 | * Clear status, enable SERR and memory space only. |
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| 178 | */ |
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[f309cda] | 179 | PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x4 ); |
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[9c448e1] | 180 | *PMC_addr = 0x020080cc; |
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| 181 | |
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| 182 | /* |
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| 183 | * set PMC base address. |
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| 184 | */ |
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[f309cda] | 185 | PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x14 ); |
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| 186 | *PMC_addr = (BSP_PCI_REGISTER_BASE >> 24) & 0x3f; |
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[9c448e1] | 187 | |
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[dac4208] | 188 | PMC_addr = (volatile uint32_t*) |
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[f309cda] | 189 | BSP_PMC_SERIAL_ADDRESS( 0x100000 ); |
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[9c448e1] | 190 | data = *PMC_addr; |
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| 191 | *PMC_addr = data & 0xfc; |
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| 192 | |
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| 193 | #endif |
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| 194 | } |
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| 195 | |
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| 196 | /*PAGE |
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| 197 | * |
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| 198 | * SCORE603e_bsp_postdriver_hook |
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| 199 | * |
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| 200 | * Standard post driver hook plus some BSP specific stuff. |
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| 201 | */ |
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[6128a4a] | 202 | |
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[9c448e1] | 203 | void SCORE603e_bsp_postdriver_hook(void) |
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| 204 | { |
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[c819ea4] | 205 | extern void Init_EE_mask_init(void); |
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[9c448e1] | 206 | |
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| 207 | bsp_postdriver_hook(); |
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| 208 | |
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| 209 | Init_EE_mask_init(); |
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| 210 | } |
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| 211 | |
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| 212 | void bsp_set_trap_vectors( void ); |
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| 213 | |
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| 214 | /*PAGE |
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| 215 | * |
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| 216 | * bsp_start |
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| 217 | * |
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| 218 | * This routine does the bulk of the system initialization. |
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| 219 | */ |
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| 220 | |
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| 221 | void bsp_start( void ) |
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| 222 | { |
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| 223 | unsigned char *work_space_start; |
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| 224 | unsigned int msr_value = 0x0000; |
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[dac4208] | 225 | volatile uint32_t *ptr; |
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[9c448e1] | 226 | |
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[3d5bd91b] | 227 | rtems_bsp_delay( 1000 ); |
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[9c448e1] | 228 | |
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| 229 | /* |
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| 230 | * Zero out lots of memory |
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| 231 | */ |
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| 232 | |
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| 233 | memset( |
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| 234 | &end, |
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| 235 | 0, |
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| 236 | (unsigned char *)&RAM_END - (unsigned char *) &end |
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| 237 | ); |
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| 238 | |
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[bb41881e] | 239 | BSP_processor_frequency = 266000000; |
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| 240 | BSP_bus_frequency = 66000000; |
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| 241 | |
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[9c448e1] | 242 | /* |
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[6128a4a] | 243 | * There are multiple ROM monitors available for this board. |
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[9c448e1] | 244 | */ |
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| 245 | #if (SCORE603E_USE_SDS) |
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| 246 | |
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[6128a4a] | 247 | /* |
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[9c448e1] | 248 | * Write instruction for Unconditional Branch to ROM vector. |
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| 249 | */ |
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[6128a4a] | 250 | |
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| 251 | Code = 0x4bf00002; |
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| 252 | for (Address = 0x100; Address <= 0xe00; Address += 0x100) { |
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[dac4208] | 253 | A_Vector = (uint32_t*)Address; |
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[9c448e1] | 254 | Code = 0x4bf00002 + Address; |
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| 255 | *A_Vector = Code; |
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| 256 | } |
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[6128a4a] | 257 | |
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| 258 | for (Address = 0x1000; Address <= 0x1400; Address += 0x100) { |
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[dac4208] | 259 | A_Vector = (uint32_t*)Address; |
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[9c448e1] | 260 | Code = 0x4bf00002 + Address; |
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| 261 | *A_Vector = Code; |
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| 262 | } |
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[6128a4a] | 263 | |
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[9c448e1] | 264 | Cpu_table.exceptions_in_RAM = TRUE; |
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| 265 | msr_value = 0x2030; |
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| 266 | |
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| 267 | #elif (SCORE603E_USE_OPEN_FIRMWARE) |
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| 268 | Cpu_table.exceptions_in_RAM = TRUE; |
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| 269 | msr_value = 0x2030; |
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| 270 | |
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| 271 | #elif (SCORE603E_USE_NONE) |
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| 272 | Cpu_table.exceptions_in_RAM = TRUE; |
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| 273 | msr_value = 0x2030; |
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| 274 | _CPU_MSR_SET( msr_value ); |
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| 275 | bsp_set_trap_vectors(); |
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| 276 | |
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| 277 | #elif (SCORE603E_USE_DINK) |
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| 278 | Cpu_table.exceptions_in_RAM = TRUE; |
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| 279 | msr_value = 0x2030; |
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| 280 | _CPU_MSR_SET( msr_value ); |
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| 281 | |
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| 282 | /* |
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| 283 | * Override the DINK error on a Decrementor interrupt. |
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| 284 | */ |
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| 285 | /* org dec_vector - rfi */ |
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[dac4208] | 286 | ptr = (uint32_t*)0x900; |
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[9c448e1] | 287 | *ptr = 0x4c000064; |
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| 288 | |
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| 289 | #else |
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| 290 | #error "SCORE603E BSPSTART.C -- what ROM monitor are you using" |
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| 291 | #endif |
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| 292 | |
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| 293 | _CPU_MSR_SET( msr_value ); |
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| 294 | |
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| 295 | /* |
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| 296 | * Need to "allocate" the memory for the RTEMS Workspace and |
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| 297 | * tell the RTEMS configuration where it is. This memory is |
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| 298 | * not malloc'ed. It is just "pulled from the air". |
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| 299 | */ |
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| 300 | |
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[6128a4a] | 301 | work_space_start = |
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[9c448e1] | 302 | (unsigned char *)&RAM_END - BSP_Configuration.work_space_size; |
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| 303 | |
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| 304 | if ( work_space_start <= (unsigned char *)&end ) { |
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[50f93fb] | 305 | printk( "bspstart: Not enough RAM!!!\n" ); |
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[9c448e1] | 306 | bsp_cleanup(); |
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| 307 | } |
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| 308 | |
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| 309 | BSP_Configuration.work_space_start = work_space_start; |
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| 310 | |
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| 311 | /* |
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| 312 | * initialize the CPU table for this BSP |
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| 313 | */ |
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| 314 | |
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| 315 | /* Cpu_table.exceptions_in_RAM was set above */ |
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| 316 | Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */ |
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| 317 | Cpu_table.predriver_hook = bsp_predriver_hook; /* Init vectors */ |
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| 318 | Cpu_table.postdriver_hook = SCORE603e_bsp_postdriver_hook; |
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[df49c60] | 319 | Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY; |
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[9c448e1] | 320 | Cpu_table.idle_task_stack_size = (3 * STACK_MINIMUM_SIZE); |
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| 321 | |
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[07e9642c] | 322 | bsp_clicks_per_usec = 66 / 4; /* XXX get from linkcmds */ |
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| 323 | |
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[9c448e1] | 324 | #if ( PPC_USE_DATA_CACHE ) |
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[6128a4a] | 325 | instruction_cache_enable (); |
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[9c448e1] | 326 | data_cache_enable (); |
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| 327 | #endif |
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| 328 | } |
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