source: rtems/c/src/lib/libbsp/powerpc/score603e/irq/irq_init.c @ 2608c9a9

4.104.114.84.9
Last change on this file since 2608c9a9 was 2608c9a9, checked in by Jennifer Averett <Jennifer.Averett@…>, on Apr 28, 2005 at 5:47:10 PM

2005-04-28 Jennifer Averett <jennifer.averett@…>

  • Add/move files for the Update to new exception model. NOTE: These modifications have not been tested on hardware.
  • irq/FPGA.c, irq/irq.c, irq/irq.h, irq/irq_init.c: New files.
  • startup/FPGA.c: Removed.
  • Property mode set to 100644
File size: 11.5 KB
Line 
1/* irq_init.c
2 *
3 *  This file contains the implementation of rtems initialization
4 *  related to interrupt handling.
5 *
6 *  CopyRight (C) 1999 valette@crf.canon.fr
7 *
8 * Enhanced by Jay Kulpinski <jskulpin@eng01.gdds.com>
9 * to make it valid for MVME2300 Motorola boards.
10 *
11 * Till Straumann <strauman@slac.stanford.edu>, 12/20/2001:
12 * Use the new interface to openpic_init
13 *
14 *  The license and distribution terms for this file may be
15 *  found in the file LICENSE in this distribution or at
16 *  http://www.rtems.com/license/LICENSE.
17 *
18 *  $Id$
19 */
20
21#include <libcpu/io.h>
22#include <libcpu/spr.h>
23#include <bsp/pci.h>
24#include <bsp/residual.h>
25#include <bsp/openpic.h>
26#include <bsp/irq.h>
27#include <bsp.h>
28#include <libcpu/raw_exception.h>
29#include <bsp/motorola.h>
30#include <rtems/bspIo.h>
31
32typedef struct {
33  unsigned char bus;    /* few chance the PCI/ISA bridge is not on first bus but ... */
34  unsigned char device;
35  unsigned char function;
36} pci_isa_bridge_device;
37
38pci_isa_bridge_device* via_82c586 = 0;
39static pci_isa_bridge_device bridge;
40
41extern unsigned int external_exception_vector_prolog_code_size[];
42extern void external_exception_vector_prolog_code();
43extern unsigned int decrementer_exception_vector_prolog_code_size[];
44extern void decrementer_exception_vector_prolog_code();
45
46/*
47 * default on/off function
48 */
49static void nop_func(){}
50/*
51 * default isOn function
52 */
53static int not_connected() {return 0;}
54/*
55 * default possible isOn function
56 */
57static int connected() {return 1;}
58
59static rtems_irq_connect_data           rtemsIrq[BSP_IRQ_NUMBER];
60static rtems_irq_global_settings        initial_config;
61static rtems_irq_connect_data           defaultIrq = {
62  /* vectorIdex,         hdl            , handle        , on            , off           , isOn */
63  0,                     nop_func       , NULL          , nop_func      , nop_func      , not_connected
64};
65static rtems_irq_prio irqPrioTable[BSP_IRQ_NUMBER]={
66  /*
67   * actual priorities for interrupt :
68   *    0   means that only current interrupt is masked
69   *    255 means all other interrupts are masked
70   */
71  /*
72   * ISA interrupts.
73   * The second entry has a priority of 255 because
74   * it is the slave pic entry and should always remain
75   * unmasked.
76   */
77  0,0,
78  255,
79  0, 0, 0, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0,
80  /*
81   * PCI Interrupts
82   */
83  8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, /* for raven prio 0 means unactive... */
84  /*
85   * Processor exceptions handled as interrupts
86   */
87  0
88};
89
90#if defined(mvme2100)
91static unsigned char mvme2100_openpic_initpolarities[16] = {
92    0,  /* Not used - should be disabled */
93    0,  /* DEC21143 Controller */
94    0,  /* PMC/PC-MIP Type I Slot 0 */
95    0,  /* PC-MIP Type I Slot 1 */
96    0,  /* PC-MIP Type II Slot 0 */
97    0,  /* PC-MIP Type II Slot 1 */
98    0,  /* Not used - should be disabled */
99    0,  /* PCI Expansion Interrupt A/Universe II (LINT0) */
100    0,  /* PCI Expansion Interrupt B/Universe II (LINT1) */
101    0,  /* PCI Expansion Interrupt C/Universe II (LINT2) */
102    0,  /* PCI Expansion Interrupt D/Universe II (LINT3) */
103    0,  /* Not used - should be disabled */
104    0,  /* Not used - should be disabled */
105    1,  /* 16550 UART */
106    0,  /* Front panel Abort Switch */
107    0,  /* RTC IRQ */
108};
109
110static unsigned char mvme2100_openpic_initsenses[] = {
111    0,  /* Not used - should be disabled */
112    1,  /* DEC21143 Controller */
113    1,  /* PMC/PC-MIP Type I Slot 0 */
114    1,  /* PC-MIP Type I Slot 1 */
115    1,  /* PC-MIP Type II Slot 0 */
116    1,  /* PC-MIP Type II Slot 1 */
117    0,  /* Not used - should be disabled */
118    1,  /* PCI Expansion Interrupt A/Universe II (LINT0) */
119    1,  /* PCI Expansion Interrupt B/Universe II (LINT1) */
120    1,  /* PCI Expansion Interrupt C/Universe II (LINT2) */
121    1,  /* PCI Expansion Interrupt D/Universe II (LINT3) */
122    0,  /* Not used - should be disabled */
123    0,  /* Not used - should be disabled */
124    1,  /* 16550 UART */
125    0,  /* Front panel Abort Switch */
126    1,  /* RTC IRQ */
127};
128#else
129static unsigned char mcp750_openpic_initpolarities[16] = {
130    1,  /* 8259 cascade */
131    0,  /* all the rest of them */
132};
133
134static unsigned char mcp750_openpic_initsenses[] = {
135    1,  /* MCP750_INT_PCB(8259) */
136    0,  /* MCP750_INT_FALCON_ECC_ERR */
137    1,  /* MCP750_INT_PCI_ETHERNET */
138    1,  /* MCP750_INT_PCI_PMC */
139    1,  /* MCP750_INT_PCI_WATCHDOG_TIMER1 */
140    1,  /* MCP750_INT_PCI_PRST_SIGNAL */
141    1,  /* MCP750_INT_PCI_FALL_SIGNAL */
142    1,  /* MCP750_INT_PCI_DEG_SIGNAL */
143    1,  /* MCP750_INT_PCI_BUS1_INTA */
144    1,  /* MCP750_INT_PCI_BUS1_INTB */
145    1,  /* MCP750_INT_PCI_BUS1_INTC */
146    1,  /* MCP750_INT_PCI_BUS1_INTD */
147    1,  /* MCP750_INT_PCI_BUS2_INTA */
148    1,  /* MCP750_INT_PCI_BUS2_INTB */
149    1,  /* MCP750_INT_PCI_BUS2_INTC */
150    1,  /* MCP750_INT_PCI_BUS2_INTD */
151};
152#endif
153
154void VIA_isa_bridge_interrupts_setup(void)
155{
156  pci_isa_bridge_device pci_dev;
157  unsigned int temp;
158  unsigned char tmp;
159  unsigned char maxBus;
160  unsigned found = 0;
161
162  maxBus = BusCountPCI();
163  pci_dev.function      = 0; /* Assumes the bidge is the first function */
164
165  for (pci_dev.bus = 0; pci_dev.bus < maxBus; pci_dev.bus++) {
166#ifdef SCAN_PCI_PRINT
167    printk("isa_bridge_interrupts_setup: Scanning bus %d\n", pci_dev.bus);
168#endif
169    for (pci_dev.device = 0; pci_dev.device < PCI_MAX_DEVICES; pci_dev.device++) {
170#ifdef SCAN_PCI_PRINT
171      printk("isa_bridge_interrupts_setup: Scanning device %d\n", pci_dev.device);
172#endif
173      pci_read_config_dword(pci_dev.bus, pci_dev.device,  pci_dev.function,
174                               PCI_VENDOR_ID, &temp);
175#ifdef SCAN_PCI_PRINT
176      printk("Vendor/device = %x\n", temp);
177#endif
178      if ((temp == (((unsigned short) PCI_VENDOR_ID_VIA) | (PCI_DEVICE_ID_VIA_82C586_0 << 16)))
179         ) {
180        bridge = pci_dev;
181        via_82c586 = &bridge;
182#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS
183        /*
184         * Should print : bus = 0, device = 11, function = 0 on a MCP750.
185         */
186        printk("Via PCI/ISA bridge found at bus = %d, device = %d, function = %d\n",
187               via_82c586->bus,
188               via_82c586->device,
189               via_82c586->function);
190#endif
191        found = 1;
192        goto loop_exit;
193
194      }
195    }
196  }
197loop_exit:
198  if (!found) BSP_panic("VIA_82C586 PCI/ISA bridge not found!n");
199
200  tmp = inb(0x810);
201  if  ( !(tmp & 0x2)) {
202#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS
203    printk("This is a second generation MCP750 board\n");
204    printk("We must reprogram the PCI/ISA bridge...\n");
205#endif
206    pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
207                         0x47,  &tmp);
208#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS
209    printk(" PCI ISA bridge control2 = %x\n", (unsigned) tmp);
210#endif
211    /*
212     * Enable 4D0/4D1 ISA interrupt level/edge config registers
213     */
214    tmp |= 0x20;
215    pci_write_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
216                          0x47, tmp);
217    /*
218     * Now program the ISA interrupt edge/level
219     */
220    tmp = ELCRS_INT9_LVL | ELCRS_INT10_LVL | ELCRS_INT11_LVL;
221    outb(tmp, ISA8259_S_ELCR);
222    tmp = ELCRM_INT5_LVL;
223    outb(tmp, ISA8259_M_ELCR);;
224    /*
225     * Set the Interrupt inputs to non-inverting level interrupt
226     */
227    pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
228                            0x54, &tmp);
229#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS
230    printk(" PCI ISA bridge PCI/IRQ Edge/Level Select = %x\n", (unsigned) tmp);
231#endif
232    tmp = 0;
233    pci_write_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
234                          0x54, tmp);
235  }
236  else {
237#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS
238    printk("This is a first generation MCP750 board\n");
239    printk("We just show the actual value used by PCI/ISA bridge\n");
240#endif
241    pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
242                         0x47,  &tmp);
243#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS
244    printk(" PCI ISA bridge control2 = %x\n", (unsigned) tmp);
245#endif
246    /*
247     * Show the Interrupt inputs inverting/non-inverting level status
248     */
249    pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
250                         0x54, &tmp);
251#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS
252    printk(" PCI ISA bridge PCI/IRQ Edge/Level Select = %x\n", (unsigned) tmp);
253#endif
254  }
255}
256
257  /*
258   * This code assumes the exceptions management setup has already
259   * been done. We just need to replace the exceptions that will
260   * be handled like interrupt. On mcp750/mpc750 and many PPC processors
261   * this means the decrementer exception and the external exception.
262   */
263void BSP_rtems_irq_mng_init(unsigned cpuId)
264{
265#if !defined(mvme2100)
266  int known_cpi_isa_bridge = 0;
267#endif
268  rtems_raw_except_connect_data vectorDesc;
269  int i;
270
271  /*
272   * First initialize the Interrupt management hardware
273   */
274#if defined(mvme2100)
275#ifdef TRACE_IRQ_INIT
276  printk("Going to initialize EPIC interrupt controller (openpic compliant)\n");
277#endif
278  openpic_init(1, mvme2100_openpic_initpolarities, mvme2100_openpic_initsenses);
279#else
280#ifdef TRACE_IRQ_INIT
281  printk("Going to initialize raven interrupt controller (openpic compliant)\n");
282#endif
283  openpic_init(1, mcp750_openpic_initpolarities, mcp750_openpic_initsenses);
284#endif       
285
286#if !defined(mvme2100)
287#ifdef TRACE_IRQ_INIT 
288  printk("Going to initialize the PCI/ISA bridge IRQ related setting (VIA 82C586)\n");
289#endif
290  if ( currentBoard == MESQUITE ) {
291    VIA_isa_bridge_interrupts_setup();
292    known_cpi_isa_bridge = 1;
293  }
294  if ( currentBoard == MVME_2300 ) {
295    /* nothing to do for W83C553 bridge */
296    known_cpi_isa_bridge = 1;
297  }
298  if ( currentBoard == MTX_WO_PP || currentBoard == MTX_W_PP ) {
299     /* W83C554, don't to anything at the moment.  gregm 11/6/2002 */
300     known_cpi_isa_bridge = 1;
301  }
302
303  if (!known_cpi_isa_bridge) {
304    printk("Please add code for PCI/ISA bridge init to libbsp/powerpc/shared/irq/irq_init.c\n");
305    printk("If your card works correctly please add a test and set known_cpi_isa_bridge to true\n");
306    printk("currentBoard = %i\n", currentBoard);
307  }
308#ifdef TRACE_IRQ_INIT
309  printk("Going to initialize the ISA PC legacy IRQ management hardware\n");
310#endif
311  BSP_i8259s_init();
312#endif
313
314  /*
315   * Initialize RTEMS management interrupt table
316   */
317    /*
318     * re-init the rtemsIrq table
319     */
320    for (i = 0; i < BSP_IRQ_NUMBER; i++) {
321      rtemsIrq[i]      = defaultIrq;
322      rtemsIrq[i].name = i;
323    }
324    /*
325     * Init initial Interrupt management config
326     */
327    initial_config.irqNb        = BSP_IRQ_NUMBER;
328    initial_config.defaultEntry = defaultIrq;
329    initial_config.irqHdlTbl    = rtemsIrq;
330    initial_config.irqBase      = BSP_ASM_IRQ_VECTOR_BASE;
331    initial_config.irqPrioTbl   = irqPrioTable;
332
333    if (!BSP_rtems_irq_mngt_set(&initial_config)) {
334      /*
335       * put something here that will show the failure...
336       */
337      BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n");
338    }
339
340  /*
341   * We must connect the raw irq handler for the two
342   * expected interrupt sources : decrementer and external interrupts.
343   */
344    vectorDesc.exceptIndex      =       ASM_DEC_VECTOR;
345    vectorDesc.hdl.vector       =       ASM_DEC_VECTOR;
346    vectorDesc.hdl.raw_hdl      =       decrementer_exception_vector_prolog_code;
347    vectorDesc.hdl.raw_hdl_size =       (unsigned) decrementer_exception_vector_prolog_code_size;
348    vectorDesc.on               =       nop_func;
349    vectorDesc.off              =       nop_func;
350    vectorDesc.isOn             =       connected;
351    if (!mpc60x_set_exception (&vectorDesc)) {
352      BSP_panic("Unable to initialize RTEMS decrementer raw exception\n");
353    }
354    vectorDesc.exceptIndex      =       ASM_EXT_VECTOR;
355    vectorDesc.hdl.vector       =       ASM_EXT_VECTOR;
356    vectorDesc.hdl.raw_hdl      =       external_exception_vector_prolog_code;
357    vectorDesc.hdl.raw_hdl_size =       (unsigned) external_exception_vector_prolog_code_size;
358    if (!mpc60x_set_exception (&vectorDesc)) {
359      BSP_panic("Unable to initialize RTEMS external raw exception\n");
360    }
361#ifdef TRACE_IRQ_INIT
362    printk("RTEMS IRQ management is now operational\n");
363#endif
364}
Note: See TracBrowser for help on using the repository browser.