source: rtems/c/src/lib/libbsp/powerpc/score603e/irq/irq.h @ 40e7ae2

4.104.114.9
Last change on this file since 40e7ae2 was 40e7ae2, checked in by Joel Sherrill <joel.sherrill@…>, on Sep 3, 2008 at 8:36:21 PM

2008-09-03 Joel Sherrill <joel.sherrill@…>

  • Makefile.am, README, configure.ac, console/85c30.c, console/console.c, console/consolebsp.h, include/bsp.h, include/gen2.h, irq/FPGA.c, irq/irq.c, irq/irq.h, irq/irq_init.c, start/start.S, startup/bspstart.c, startup/genpvec.c, startup/linkcmds, timer/timer.c, tod/tod.c: Initiate update and testing. Runs hello but does not run ticker yet.
  • Property mode set to 100644
File size: 6.6 KB
Line 
1/* irq.h
2 *
3 *  This include file describe the data structure and the functions implemented
4 *  by RTEMS to write interrupt handlers.
5 *
6 *  Copyright (C) 1999 valette@crf.canon.fr
7 *
8 *  This code is heavilly inspired by the public specification of STREAM V2
9 *  that can be found at :
10 *
11 *      <http://www.chorus.com/Documentation/index.html> by following
12 *  the STREAM API Specification Document link.
13 *
14 *  The license and distribution terms for this file may be
15 *  found in found in the file LICENSE in this distribution or at
16 *  http://www.rtems.com/license/LICENSE.
17 *
18 *  $Id$
19 */
20
21#ifndef BSP_POWERPC_IRQ_H
22#define BSP_POWERPC_IRQ_H
23
24#define BSP_SHARED_HANDLER_SUPPORT      1
25#include <rtems/irq.h>
26
27/*
28 * 8259 edge/level control definitions at VIA
29 */
30#define ISA8259_M_ELCR          0x4d0
31#define ISA8259_S_ELCR          0x4d1
32
33#define ELCRS_INT15_LVL         0x80
34#define ELCRS_INT14_LVL         0x40
35#define ELCRS_INT13_LVL         0x20
36#define ELCRS_INT12_LVL         0x10
37#define ELCRS_INT11_LVL         0x08
38#define ELCRS_INT10_LVL         0x04
39#define ELCRS_INT9_LVL          0x02
40#define ELCRS_INT8_LVL          0x01
41#define ELCRM_INT7_LVL          0x80
42#define ELCRM_INT6_LVL          0x40
43#define ELCRM_INT5_LVL          0x20
44#define ELCRM_INT4_LVL          0x10
45#define ELCRM_INT3_LVL          0x8
46#define ELCRM_INT2_LVL          0x4
47#define ELCRM_INT1_LVL          0x2
48#define ELCRM_INT0_LVL          0x1
49
50    /* PIC's command and mask registers */
51#define PIC_MASTER_COMMAND_IO_PORT              0x20    /* Master PIC command register */
52#define PIC_SLAVE_COMMAND_IO_PORT               0xa0    /* Slave PIC command register */
53#define PIC_MASTER_IMR_IO_PORT                  0x21    /* Master PIC Interrupt Mask Register */
54#define PIC_SLAVE_IMR_IO_PORT                   0xa1    /* Slave PIC Interrupt Mask Register */
55
56    /* Command for specific EOI (End Of Interrupt): Interrupt acknowledge */
57#define PIC_EOSI        0x60    /* End of Specific Interrupt (EOSI) */
58#define SLAVE_PIC_EOSI  0x62    /* End of Specific Interrupt (EOSI) for cascade */
59#define PIC_EOI         0x20    /* Generic End of Interrupt (EOI) */
60
61#ifndef ASM
62
63#ifdef __cplusplus
64extern "C" {
65#endif
66
67/*
68 * rtems_irq_number Definitions
69 */
70
71/*
72 * ISA IRQ handler related definitions
73 */
74#define BSP_ISA_IRQ_NUMBER              (16)
75#define BSP_ISA_IRQ_LOWEST_OFFSET       (0)
76#define BSP_ISA_IRQ_MAX_OFFSET          (BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER - 1)
77/*
78 * PCI IRQ handlers related definitions
79 * CAUTION : BSP_PCI_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
80 */
81#define BSP_PCI_IRQ_NUMBER              (16)
82#define BSP_PCI_IRQ_LOWEST_OFFSET       (BSP_ISA_IRQ_NUMBER)
83#define BSP_PCI_IRQ_MAX_OFFSET          (BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1)
84/*
85 * PowerPC exceptions handled as interrupt where an RTEMS managed interrupt
86 * handler might be connected
87 */
88#define BSP_PROCESSOR_IRQ_NUMBER        (1)
89#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_PCI_IRQ_MAX_OFFSET + 1)
90#define BSP_PROCESSOR_IRQ_MAX_OFFSET    (BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1)
91/* Misc vectors for OPENPIC irqs (IPI, timers)
92 */
93#define BSP_MISC_IRQ_NUMBER             (8)
94#define BSP_MISC_IRQ_LOWEST_OFFSET      (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1)
95#define BSP_MISC_IRQ_MAX_OFFSET         (BSP_MISC_IRQ_LOWEST_OFFSET + BSP_MISC_IRQ_NUMBER - 1)
96/*
97 * Summary
98 */
99#define BSP_IRQ_NUMBER                  (BSP_MISC_IRQ_MAX_OFFSET + 1)
100#define BSP_LOWEST_OFFSET               (BSP_ISA_IRQ_LOWEST_OFFSET)
101#define BSP_MAX_OFFSET                  (BSP_MISC_IRQ_MAX_OFFSET)
102/*
103 * Some ISA IRQ symbolic name definition
104 */
105#define BSP_ISA_PERIODIC_TIMER          (0)
106#define BSP_ISA_KEYBOARD                (1)
107#define BSP_ISA_UART_COM2_IRQ           (3)
108#define BSP_ISA_UART_COM1_IRQ           (4)
109#define BSP_ISA_RT_TIMER1               (8)
110#define BSP_ISA_RT_TIMER3               (10)
111/*
112 * Some PCI IRQ symbolic name definition
113 */
114#define BSP_PCI_IRQ0                    (BSP_PCI_IRQ_LOWEST_OFFSET)
115#define BSP_PCI_ISA_BRIDGE_IRQ          (BSP_PCI_IRQ0)
116
117#if defined(mvme2100)
118#define BSP_DEC21143_IRQ                (BSP_PCI_IRQ_LOWEST_OFFSET + 1)
119#define BSP_PMC_PCMIP_TYPE1_SLOT0_IRQ   (BSP_PCI_IRQ_LOWEST_OFFSET + 2)
120#define BSP_PCMIP_TYPE1_SLOT1_IRQ       (BSP_PCI_IRQ_LOWEST_OFFSET + 3)
121#define BSP_PCMIP_TYPE2_SLOT0_IRQ       (BSP_PCI_IRQ_LOWEST_OFFSET + 4)
122#define BSP_PCMIP_TYPE2_SLOT1_IRQ       (BSP_PCI_IRQ_LOWEST_OFFSET + 5)
123#define BSP_PCI_INTA_UNIVERSE_LINT0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 7)
124#define BSP_PCI_INTB_UNIVERSE_LINT1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 8)
125#define BSP_PCI_INTC_UNIVERSE_LINT2_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 9)
126#define BSP_PCI_INTD_UNIVERSE_LINT3_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 10)
127#define BSP_UART_COM1_IRQ               (BSP_PCI_IRQ_LOWEST_OFFSET + 13)
128#define BSP_FRONT_PANEL_ABORT_IRQ       (BSP_PCI_IRQ_LOWEST_OFFSET + 14)
129#define BSP_RTC_IRQ                     (BSP_PCI_IRQ_LOWEST_OFFSET + 15)
130#else
131#define BSP_UART_COM1_IRQ               BSP_ISA_UART_COM1_IRQ
132#define BSP_UART_COM2_IRQ               BSP_ISA_UART_COM2_IRQ
133#endif
134
135/*
136 * Some Processor execption handled as RTEMS IRQ symbolic name definition
137 */
138#define BSP_DECREMENTER                 (BSP_PROCESSOR_IRQ_LOWEST_OFFSET)
139
140
141/*
142 * Type definition for RTEMS managed interrupts
143 */
144typedef unsigned short rtems_i8259_masks;
145
146extern  volatile rtems_i8259_masks i8259s_cache;
147
148/*-------------------------------------------------------------------------+
149| Function Prototypes.
150+--------------------------------------------------------------------------*/
151/*
152 * ------------------------ Intel 8259 (or emulation) Mngt Routines -------
153 */
154void BSP_i8259s_init(void);
155
156/*
157 * function to disable a particular irq at 8259 level. After calling
158 * this function, even if the device asserts the interrupt line it will
159 * not be propagated further to the processor
160 *
161 * RETURNS: 1/0 if the interrupt was enabled/disabled originally or
162 *          a value < 0 on error.
163 */
164int BSP_irq_disable_at_i8259s        (const rtems_irq_number irqLine);
165/*
166 * function to enable a particular irq at 8259 level. After calling
167 * this function, if the device asserts the interrupt line it will
168 * be propagated further to the processor
169 */
170int BSP_irq_enable_at_i8259s            (const rtems_irq_number irqLine);
171/*
172 * function to acknowledge a particular irq at 8259 level. After calling
173 * this function, if a device asserts an enabled interrupt line it will
174 * be propagated further to the processor. Mainly usefull for people
175 * writing raw handlers as this is automagically done for RTEMS managed
176 * handlers.
177 */
178int BSP_irq_ack_at_i8259s               (const rtems_irq_number irqLine);
179/*
180 * function to check if a particular irq is enabled at 8259 level. After calling
181 */
182int BSP_irq_enabled_at_i8259s           (const rtems_irq_number irqLine);
183
184extern void BSP_rtems_irq_mng_init(unsigned cpuId);
185extern void BSP_i8259s_init(void);
186
187/* Stuff in irq_supp.h should eventually go into <rtems/irq.h> */
188/* #include <bsp/irq_supp.h> */
189
190#ifdef __cplusplus
191};
192#endif
193
194#endif
195#endif
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