source: rtems/c/src/lib/libbsp/powerpc/score603e/include/tm27.h @ 43d8a82

4.104.114.84.9
Last change on this file since 43d8a82 was 43d8a82, checked in by Jennifer Averett <Jennifer.Averett@…>, on May 4, 2005 at 7:31:30 PM

2005-05-04 Jennifer Averett <jennifer.averett@…>

  • include/tm27.h: Correct error in tm27 test
  • Property mode set to 100644
File size: 1.6 KB
Line 
1/*
2 *  tm27.h
3 *
4 *  The license and distribution terms for this file may be
5 *  found in the file LICENSE in this distribution or at
6 *  http://www.rtems.com/license/LICENSE.
7 *
8 *  $Id$
9 */
10
11#ifndef _RTEMS_TMTEST27
12#error "This is an RTEMS internal file you must not include directly."
13#endif
14
15#ifndef __tm27_h
16#define __tm27_h
17
18#include <bsp/irq.h>
19
20/*
21 *  Stuff for Time Test 27
22 */
23
24#define MUST_WAIT_FOR_INTERRUPT 1
25
26void nullFunc() {}
27
28static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER,
29                                              0,
30                                              (rtems_irq_enable)nullFunc,
31                                              (rtems_irq_disable)nullFunc,
32                                              (rtems_irq_is_enabled) nullFunc};
33void Install_tm27_vector(void (*_handler)())
34{
35  clockIrqData.hdl = _handler;
36  if (!BSP_install_rtems_irq_handler (&clockIrqData)) {
37        printk("Error installing clock interrupt handler!\n");
38        rtems_fatal_error_occurred(1);
39  }
40}
41
42#define Cause_tm27_intr()  \
43  do { \
44    uint32_t   _clicks = 8; \
45    asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
46  } while (0)
47
48#define Clear_tm27_intr() \
49  do { \
50    uint32_t   _clicks = 0xffffffff; \
51    asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
52  } while (0)
53
54#define Lower_tm27_intr() \
55  do { \
56    uint32_t   _msr = 0; \
57    _ISR_Set_level( 0 ); \
58    asm volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
59    _msr |=  0x8002; \
60    asm volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
61  } while (0)
62
63#endif
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