source: rtems/c/src/lib/libbsp/powerpc/score603e/include/tm27.h @ 31a5ec8

4.9
Last change on this file since 31a5ec8 was 31a5ec8, checked in by Jennifer Averett <Jennifer.Averett@…>, on May 5, 2009 at 4:18:06 PM

2009-05-05 Jennifer Averett <jennifer.averett@…>

  • Makefile.am, README, configure.ac, preinstall.am, PCI_bus/PCI.c, PCI_bus/PCI.h, PCI_bus/flash.c, PCI_bus/universe.c, console/85c30.c, console/85c30.h, console/console.c, console/consolebsp.h, console/tbl85c30.c, include/bsp.h, include/coverhd.h, include/gen2.h, include/irq-config.h, include/tm27.h, irq/FPGA.c, irq/irq.h, irq/irq_init.c, start/start.S, startup/Hwr_init.c, startup/bspstart.c, timer/timer.c, tod/tod.c: Updated and tested with the latest powerpc isr source
  • irq/no_pic.c: New file.
  • irq/irq.c, startup/genpvec.c, startup/setvec.c, startup/vmeintr.c: Removed.
  • Property mode set to 100644
File size: 1.7 KB
Line 
1/*
2 *  tm27.h
3 *
4 *  COPYRIGHT (c) 1989-2009.
5 *  On-Line Applications Research Corporation (OAR).
6 *
7 *  The license and distribution terms for this file may be
8 *  found in the file LICENSE in this distribution or at
9 *  http://www.rtems.com/license/LICENSE.
10 *
11 *  $Id$
12 */
13
14#ifndef _RTEMS_TMTEST27
15#error "This is an RTEMS internal file you must not include directly."
16#endif
17
18#ifndef __tm27_h
19#define __tm27_h
20
21#include <bsp/irq.h>
22
23/*
24 *  Stuff for Time Test 27
25 */
26
27#define MUST_WAIT_FOR_INTERRUPT 1
28
29void nullFunc() {}
30
31static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER,
32                                              0,
33                                              (rtems_irq_enable)nullFunc,
34                                              (rtems_irq_disable)nullFunc,
35                                              (rtems_irq_is_enabled) nullFunc};
36void Install_tm27_vector(void (*_handler)())
37{
38  clockIrqData.hdl = _handler;
39  if (!BSP_install_rtems_irq_handler (&clockIrqData)) {
40        printk("Error installing clock interrupt handler!\n");
41        rtems_fatal_error_occurred(1);
42  }
43}
44
45#define Cause_tm27_intr()  \
46  do { \
47    uint32_t   _clicks = 8; \
48    asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
49  } while (0)
50
51#define Clear_tm27_intr() \
52  do { \
53    uint32_t   _clicks = 0xffffffff; \
54    asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
55  } while (0)
56
57#define Lower_tm27_intr() \
58  do { \
59    uint32_t   _msr = 0; \
60    _ISR_Set_level( 0 ); \
61    asm volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
62    _msr |=  0x8002; \
63    asm volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
64  } while (0)
65
66#endif
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