source: rtems/c/src/lib/libbsp/powerpc/score603e/include/bsp.h @ db6e1f55

4.9
Last change on this file since db6e1f55 was 40e7ae2, checked in by Joel Sherrill <joel.sherrill@…>, on Sep 3, 2008 at 8:36:21 PM

2008-09-03 Joel Sherrill <joel.sherrill@…>

  • Makefile.am, README, configure.ac, console/85c30.c, console/console.c, console/consolebsp.h, include/bsp.h, include/gen2.h, irq/FPGA.c, irq/irq.c, irq/irq.h, irq/irq_init.c, start/start.S, startup/bspstart.c, startup/genpvec.c, startup/linkcmds, timer/timer.c, tod/tod.c: Initiate update and testing. Runs hello but does not run ticker yet.
  • Property mode set to 100644
File size: 4.7 KB
Line 
1/*  bsp.h
2 *
3 *  This include file contains all board IO definitions.
4 *
5 *  COPYRIGHT (c) 1989-1997.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  The license and distribution terms for this file may in
9 *  the file LICENSE in this distribution or at
10 *  http://www.rtems.com/license/LICENSE.
11 *
12 *  $Id$
13 */
14
15#ifndef _BSP_H
16#define _BSP_H
17
18#ifdef __cplusplus
19extern "C" {
20#endif
21
22#include <bspopts.h>
23#include <rtems.h>
24#include <rtems/console.h>
25#include <libcpu/io.h>
26#include <rtems/clockdrv.h>
27#include <bsp/vectors.h>
28
29/*
30 *  confdefs.h overrides for this BSP:
31 *   - termios serial ports (defaults to 1)
32 *   - Interrupt stack space is not minimum if defined.
33 */
34
35#if (HAS_PMC_PSC8)
36#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4 + 4)
37#else
38#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4)
39#endif
40
41#ifdef ASM
42/* Definition of where to store registers in alignment handler */
43#define ALIGN_REGS 0x0140
44
45#else
46#include <rtems.h>
47#include <rtems/console.h>
48#include <rtems/clockdrv.h>
49#include <rtems/iosupp.h>
50
51/*
52 *  We no longer support the first generation board.
53 */
54
55#include <gen2.h>
56
57/*
58 * The following macro calculates the Baud constant. For the Z8530 chip.
59 *
60 * Note: baud constant = ((clock frequency / Clock_X) / (2 * Baud Rate)) - 2
61 *       for the Score603e ((10,000,000 / 16) / (2 * Baud Rate)) - 2
62 */
63#define _Score603e_Z8530_Baud( _frequency, _clock_by, _baud_rate  )   \
64  ( (_frequency /( _clock_by * 2 * _baud_rate))  - 2)
65
66#define Score603e_Z8530_Chip1_Baud( _value ) \
67  _Score603e_Z8530_Baud( SCORE603E_85C30_1_CLOCK, \
68     SCORE603E_85C30_1_CLOCK_X, _value )
69
70#define Score603e_Z8530_Chip0_Baud( _value ) \
71  _Score603e_Z8530_Baud( SCORE603E_85C30_0_CLOCK, \
72     SCORE603E_85C30_0_CLOCK_X, _value )
73
74#define Initialize_Board_ctrl_register()                         \
75  *SCORE603E_BOARD_CTRL_REG = (*SCORE603E_BOARD_CTRL_REG |       \
76                               SCORE603E_BRD_FLASH_DISABLE_MASK)
77
78#define Processor_Synchronize() \
79  asm(" eieio ")
80
81
82/* Constants */
83
84/*
85 *  Device Driver Table Entries
86 */
87
88/*
89 * NOTE: Use the standard Console driver entry
90 */
91
92/*
93 * NOTE: Use the standard Clock driver entry
94 */
95
96/*
97 *  Information placed in the linkcmds file.
98 */
99
100extern int   RAM_START;
101extern int   RAM_END;
102extern int   RAM_SIZE;
103
104extern int   PROM_START;
105extern int   PROM_END;
106extern int   PROM_SIZE;
107
108extern int   CLOCK_SPEED;
109extern int   CPU_PPC_CLICKS_PER_MS;
110
111extern int   end;        /* last address in the program */
112
113/*
114 * How many libio files we want
115 */
116
117#define BSP_LIBIO_MAX_FDS       20
118
119/* functions */
120
121void bsp_start( void );
122
123void bsp_cleanup( void );
124
125rtems_isr_entry set_vector(                    /* returns old vector */
126  rtems_isr_entry     handler,                  /* isr routine        */
127  rtems_vector_number vector,                   /* vector number      */
128  int                 type                      /* RTEMS or RAW intr  */
129);
130
131/*
132 * spurious.c
133 */
134rtems_isr bsp_stub_handler(
135   rtems_vector_number trap
136);
137rtems_isr bsp_spurious_handler(
138   rtems_vector_number trap
139);
140void bsp_spurious_initialize();
141
142/*
143 * genvec.c
144 */
145rtems_isr_entry  set_EE_vector(
146  rtems_isr_entry     handler,                  /* isr routine        */
147  rtems_vector_number vector                    /* vector number      */
148);
149void initialize_external_exception_vector ();
150
151/*
152 * console.c
153 */
154void BSP_fatal_return( void );
155
156/*
157 * Hwr_init.c
158 */
159void init_PCI();
160void instruction_cache_enable ();
161void data_cache_enable ();
162
163void initialize_PCI_bridge ();
164uint16_t         read_and_clear_irq ();
165void set_irq_mask(
166  uint16_t         value
167);
168uint16_t         get_irq_mask();
169
170/*
171 * universe.c
172 */
173void initialize_universe();
174
175void set_irq_mask(
176  uint16_t         value
177);
178
179uint16_t         get_irq_mask();
180
181void unmask_irq(
182  uint16_t         irq_idx
183);
184
185void init_irq_data_register();
186
187uint16_t         read_and_clear_PMC_irq(
188  uint16_t            irq
189);
190
191bool Is_PMC_IRQ(
192  uint32_t           pmc_irq,
193  uint16_t           status_word
194);
195
196uint16_t         read_and_clear_irq();
197
198/*
199 * FPGA.c
200 */
201void initialize_PCI_bridge ();
202
203/* flash.c */
204
205unsigned int SCORE603e_FLASH_Disable(
206  uint32_t                       unused
207);
208unsigned int SCORE603e_FLASH_verify_enable();
209unsigned int SCORE603e_FLASH_Enable_writes(
210  uint32_t                       area        /* Unused  */
211);
212
213#define BSP_FLASH_ENABLE_WRITES( _area) SCORE603e_FLASH_Enable_writes( _area )
214#define BSP_FLASH_DISABLE_WRITES(_area) SCORE603e_FLASH_Disable( _area )
215
216#define Convert_Endian_32( _data ) \
217  ( ((_data&0x000000ff)<<24) | ((_data&0x0000ff00)<<8) |  \
218    ((_data&0x00ff0000)>>8)  | ((_data&0xff000000)>>24) )
219
220#define Convert_Endian_16( _data ) \
221  ( ((_data&0x00ff)<<8) | ((_data&0xff00)>>8) )
222
223#endif /* ASM */
224
225#ifdef __cplusplus
226}
227#endif
228
229#endif
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