1 | /* bsp.h |
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2 | * |
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3 | * This include file contains all board IO definitions. |
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4 | * |
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5 | * COPYRIGHT (c) 1989-1997. |
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6 | * On-Line Applications Research Corporation (OAR). |
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7 | * |
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8 | * The license and distribution terms for this file may in |
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9 | * the file LICENSE in this distribution or at |
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10 | * http://www.rtems.com/license/LICENSE. |
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11 | * |
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12 | * $Id$ |
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13 | */ |
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14 | |
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15 | #ifndef __BSP_h |
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16 | #define __BSP_h |
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17 | |
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18 | #ifdef __cplusplus |
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19 | extern "C" { |
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20 | #endif |
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21 | |
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22 | #include <bspopts.h> |
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23 | |
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24 | /* |
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25 | * confdefs.h overrides for this BSP: |
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26 | * - termios serial ports (defaults to 1) |
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27 | * - Interrupt stack space is not minimum if defined. |
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28 | */ |
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29 | |
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30 | #if (HAS_PMC_PSC8) |
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31 | #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4 + 4) |
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32 | #else |
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33 | #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4) |
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34 | #endif |
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35 | #define CONFIGURE_INTERRUPT_STACK_MEMORY (12 * 1024) |
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36 | |
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37 | #ifdef ASM |
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38 | /* Definition of where to store registers in alignment handler */ |
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39 | #define ALIGN_REGS 0x0140 |
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40 | |
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41 | #else |
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42 | #include <rtems.h> |
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43 | #include <console.h> |
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44 | #include <clockdrv.h> |
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45 | #include <iosupp.h> |
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46 | |
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47 | /* |
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48 | * We no longer support the first generation board. |
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49 | */ |
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50 | |
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51 | #include <gen2.h> |
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52 | |
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53 | /* |
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54 | * The following macro calculates the Baud constant. For the Z8530 chip. |
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55 | * |
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56 | * Note: baud constant = ((clock frequency / Clock_X) / (2 * Baud Rate)) - 2 |
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57 | * for the Score603e ((10,000,000 / 16) / (2 * Baud Rate)) - 2 |
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58 | */ |
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59 | #define _Score603e_Z8530_Baud( _frequency, _clock_by, _baud_rate ) \ |
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60 | ( (_frequency /( _clock_by * 2 * _baud_rate)) - 2) |
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61 | |
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62 | #define Score603e_Z8530_Chip1_Baud( _value ) \ |
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63 | _Score603e_Z8530_Baud( SCORE603E_85C30_1_CLOCK, \ |
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64 | SCORE603E_85C30_1_CLOCK_X, _value ) |
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65 | |
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66 | #define Score603e_Z8530_Chip0_Baud( _value ) \ |
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67 | _Score603e_Z8530_Baud( SCORE603E_85C30_0_CLOCK, \ |
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68 | SCORE603E_85C30_0_CLOCK_X, _value ) |
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69 | |
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70 | #define Initialize_Board_ctrl_register() \ |
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71 | *SCORE603E_BOARD_CTRL_REG = (*SCORE603E_BOARD_CTRL_REG | \ |
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72 | SCORE603E_BRD_FLASH_DISABLE_MASK) \ |
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73 | |
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74 | /* |
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75 | * Define the time limits for RTEMS Test Suite test durations. |
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76 | * Long test and short test duration limits are provided. These |
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77 | * values are in seconds and need to be converted to ticks for the |
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78 | * application. |
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79 | * |
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80 | */ |
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81 | |
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82 | #define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */ |
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83 | #define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */ |
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84 | |
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85 | /* |
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86 | * Stuff for Time Test 27 |
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87 | */ |
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88 | |
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89 | #define MUST_WAIT_FOR_INTERRUPT 1 |
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90 | |
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91 | #define Install_tm27_vector( _handler ) \ |
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92 | set_vector( (_handler), PPC_IRQ_DECREMENTER, 1 ) |
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93 | |
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94 | #define Cause_tm27_intr() \ |
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95 | do { \ |
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96 | uint32_t _clicks = 8; \ |
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97 | asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \ |
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98 | } while (0) |
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99 | |
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100 | |
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101 | #define Clear_tm27_intr() \ |
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102 | do { \ |
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103 | uint32_t _clicks = 0xffffffff; \ |
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104 | asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \ |
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105 | } while (0) |
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106 | |
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107 | #define Lower_tm27_intr() \ |
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108 | do { \ |
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109 | uint32_t _msr = 0; \ |
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110 | _ISR_Set_level( 0 ); \ |
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111 | asm volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \ |
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112 | _msr |= 0x8002; \ |
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113 | asm volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \ |
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114 | } while (0) |
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115 | |
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116 | |
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117 | /* Constants */ |
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118 | |
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119 | /* |
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120 | * Device Driver Table Entries |
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121 | */ |
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122 | |
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123 | /* |
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124 | * NOTE: Use the standard Console driver entry |
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125 | */ |
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126 | |
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127 | /* |
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128 | * NOTE: Use the standard Clock driver entry |
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129 | */ |
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130 | |
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131 | |
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132 | /* |
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133 | * Information placed in the linkcmds file. |
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134 | */ |
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135 | |
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136 | extern int RAM_START; |
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137 | extern int RAM_END; |
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138 | extern int RAM_SIZE; |
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139 | |
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140 | extern int PROM_START; |
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141 | extern int PROM_END; |
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142 | extern int PROM_SIZE; |
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143 | |
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144 | extern int CLOCK_SPEED; |
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145 | extern int CPU_PPC_CLICKS_PER_MS; |
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146 | |
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147 | extern int end; /* last address in the program */ |
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148 | |
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149 | /* |
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150 | * How many libio files we want |
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151 | */ |
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152 | |
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153 | #define BSP_LIBIO_MAX_FDS 20 |
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154 | |
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155 | /* functions */ |
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156 | |
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157 | void bsp_start( void ); |
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158 | |
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159 | void bsp_cleanup( void ); |
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160 | |
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161 | rtems_isr_entry set_vector( /* returns old vector */ |
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162 | rtems_isr_entry handler, /* isr routine */ |
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163 | rtems_vector_number vector, /* vector number */ |
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164 | int type /* RTEMS or RAW intr */ |
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165 | ); |
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166 | |
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167 | /* |
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168 | * spurious.c |
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169 | */ |
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170 | rtems_isr bsp_stub_handler( |
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171 | rtems_vector_number trap |
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172 | ); |
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173 | rtems_isr bsp_spurious_handler( |
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174 | rtems_vector_number trap |
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175 | ); |
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176 | void bsp_spurious_initialize(); |
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177 | |
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178 | /* |
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179 | * genvec.c |
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180 | */ |
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181 | rtems_isr_entry set_EE_vector( |
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182 | rtems_isr_entry handler, /* isr routine */ |
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183 | rtems_vector_number vector /* vector number */ |
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184 | ); |
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185 | void initialize_external_exception_vector (); |
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186 | |
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187 | /* |
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188 | * console.c |
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189 | */ |
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190 | void DEBUG_puts( char *string ); |
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191 | |
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192 | void BSP_fatal_return( void ); |
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193 | |
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194 | /* |
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195 | * Hwr_init.c |
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196 | */ |
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197 | void init_PCI(); |
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198 | void instruction_cache_enable (); |
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199 | void data_cache_enable (); |
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200 | |
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201 | |
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202 | void initialize_PCI_bridge (); |
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203 | uint16_t read_and_clear_irq (); |
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204 | void set_irq_mask( |
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205 | uint16_t value |
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206 | ); |
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207 | uint16_t get_irq_mask(); |
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208 | |
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209 | /* |
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210 | * universe.c |
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211 | */ |
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212 | void initialize_universe(); |
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213 | |
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214 | void set_irq_mask( |
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215 | uint16_t value |
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216 | ); |
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217 | |
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218 | uint16_t get_irq_mask(); |
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219 | |
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220 | void unmask_irq( |
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221 | uint16_t irq_idx |
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222 | ); |
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223 | |
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224 | void init_irq_data_register(); |
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225 | |
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226 | uint16_t read_and_clear_PMC_irq( |
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227 | uint16_t irq |
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228 | ); |
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229 | |
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230 | rtems_boolean Is_PMC_IRQ( |
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231 | uint32_t pmc_irq, |
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232 | uint16_t status_word |
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233 | ); |
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234 | |
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235 | uint16_t read_and_clear_irq(); |
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236 | |
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237 | /* |
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238 | * FPGA.c |
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239 | */ |
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240 | void initialize_PCI_bridge (); |
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241 | |
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242 | /* flash.c */ |
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243 | |
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244 | unsigned int SCORE603e_FLASH_Disable( |
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245 | uint32_t unused |
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246 | ); |
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247 | unsigned int SCORE603e_FLASH_verify_enable(); |
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248 | unsigned int SCORE603e_FLASH_Enable_writes( |
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249 | uint32_t area /* Unused */ |
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250 | ); |
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251 | |
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252 | #define Convert_Endian_32( _data ) \ |
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253 | ( ((_data&0x000000ff)<<24) | ((_data&0x0000ff00)<<8) | \ |
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254 | ((_data&0x00ff0000)>>8) | ((_data&0xff000000)>>24) ) |
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255 | |
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256 | #define Convert_Endian_16( _data ) \ |
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257 | ( ((_data&0x00ff)<<8) | ((_data&0xff00)>>8) ) |
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258 | |
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259 | extern rtems_configuration_table BSP_Configuration; /* owned by BSP */ |
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260 | extern rtems_cpu_table Cpu_table; /* owned by BSP */ |
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261 | extern uint32_t bsp_isr_level; |
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262 | |
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263 | #endif /* ASM */ |
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264 | |
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265 | #ifdef __cplusplus |
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266 | } |
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267 | #endif |
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268 | |
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269 | #endif |
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270 | /* end of include file */ |
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271 | |
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