source: rtems/c/src/lib/libbsp/powerpc/score603e/include/bsp.h @ ccceaf3

4.104.115
Last change on this file since ccceaf3 was ccceaf3, checked in by Joel Sherrill <joel.sherrill@…>, on 09/18/08 at 17:42:45

2008-09-18 Joel Sherrill <joel.sherrill@…>

  • include/bsp.h: Remove unnecessary boilerplate comments.
  • Property mode set to 100644
File size: 4.0 KB
Line 
1/*
2 *  This include file contains all board IO definitions.
3 *
4 *  COPYRIGHT (c) 1989-2008.
5 *  On-Line Applications Research Corporation (OAR).
6 *
7 *  The license and distribution terms for this file may in
8 *  the file LICENSE in this distribution or at
9 *  http://www.rtems.com/license/LICENSE.
10 *
11 *  $Id$
12 */
13
14#ifndef _BSP_H
15#define _BSP_H
16
17#ifdef __cplusplus
18extern "C" {
19#endif
20
21#include <bspopts.h>
22#include <rtems.h>
23#include <rtems/console.h>
24#include <libcpu/io.h>
25#include <rtems/clockdrv.h>
26#include <bsp/vectors.h>
27
28/*
29 *  confdefs.h overrides for this BSP:
30 *   - termios serial ports (defaults to 1)
31 *   - Interrupt stack space is not minimum if defined.
32 */
33
34#if (HAS_PMC_PSC8)
35#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4 + 4)
36#else
37#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4)
38#endif
39
40#ifdef ASM
41/* Definition of where to store registers in alignment handler */
42#define ALIGN_REGS 0x0140
43
44#else
45#include <rtems.h>
46#include <rtems/console.h>
47#include <rtems/clockdrv.h>
48#include <rtems/iosupp.h>
49
50/*
51 *  We no longer support the first generation board.
52 */
53
54#include <gen2.h>
55
56/*
57 * The following macro calculates the Baud constant. For the Z8530 chip.
58 *
59 * Note: baud constant = ((clock frequency / Clock_X) / (2 * Baud Rate)) - 2
60 *       for the Score603e ((10,000,000 / 16) / (2 * Baud Rate)) - 2
61 */
62#define _Score603e_Z8530_Baud( _frequency, _clock_by, _baud_rate  )   \
63  ( (_frequency /( _clock_by * 2 * _baud_rate))  - 2)
64
65#define Score603e_Z8530_Chip1_Baud( _value ) \
66  _Score603e_Z8530_Baud( SCORE603E_85C30_1_CLOCK, \
67     SCORE603E_85C30_1_CLOCK_X, _value )
68
69#define Score603e_Z8530_Chip0_Baud( _value ) \
70  _Score603e_Z8530_Baud( SCORE603E_85C30_0_CLOCK, \
71     SCORE603E_85C30_0_CLOCK_X, _value )
72
73#define Initialize_Board_ctrl_register()                         \
74  *SCORE603E_BOARD_CTRL_REG = (*SCORE603E_BOARD_CTRL_REG |       \
75                               SCORE603E_BRD_FLASH_DISABLE_MASK)
76
77#define Processor_Synchronize() \
78  asm(" eieio ")
79
80
81/*
82 *  Information placed in the linkcmds file.
83 */
84
85extern void *RAM_END;
86extern void *end;
87
88extern int   CLOCK_SPEED;
89extern int   CPU_PPC_CLICKS_PER_MS;
90
91/*
92 * system init stack
93 */
94#define BSP_INIT_STACK_SIZE 0x1000
95
96/* functions */
97
98/*
99 * spurious.c
100 */
101rtems_isr bsp_stub_handler(
102   rtems_vector_number trap
103);
104rtems_isr bsp_spurious_handler(
105   rtems_vector_number trap
106);
107void bsp_spurious_initialize();
108
109/*
110 * genvec.c
111 */
112rtems_isr_entry  set_EE_vector(
113  rtems_isr_entry     handler,                  /* isr routine        */
114  rtems_vector_number vector                    /* vector number      */
115);
116void initialize_external_exception_vector ();
117
118/*
119 * console.c
120 */
121void BSP_fatal_return( void );
122
123/*
124 * Hwr_init.c
125 */
126void init_PCI();
127void instruction_cache_enable ();
128void data_cache_enable ();
129
130void initialize_PCI_bridge ();
131uint16_t         read_and_clear_irq ();
132void set_irq_mask(
133  uint16_t         value
134);
135uint16_t         get_irq_mask();
136
137/*
138 * universe.c
139 */
140void initialize_universe();
141
142void set_irq_mask(
143  uint16_t         value
144);
145
146uint16_t         get_irq_mask();
147
148void unmask_irq(
149  uint16_t         irq_idx
150);
151
152void init_irq_data_register();
153
154uint16_t         read_and_clear_PMC_irq(
155  uint16_t            irq
156);
157
158bool Is_PMC_IRQ(
159  uint32_t           pmc_irq,
160  uint16_t           status_word
161);
162
163uint16_t         read_and_clear_irq();
164
165/*
166 * FPGA.c
167 */
168void initialize_PCI_bridge ();
169
170/* flash.c */
171
172unsigned int SCORE603e_FLASH_Disable(
173  uint32_t                       unused
174);
175unsigned int SCORE603e_FLASH_verify_enable();
176unsigned int SCORE603e_FLASH_Enable_writes(
177  uint32_t                       area        /* Unused  */
178);
179
180#define BSP_FLASH_ENABLE_WRITES( _area) SCORE603e_FLASH_Enable_writes( _area )
181#define BSP_FLASH_DISABLE_WRITES(_area) SCORE603e_FLASH_Disable( _area )
182
183#define Convert_Endian_32( _data ) \
184  ( ((_data&0x000000ff)<<24) | ((_data&0x0000ff00)<<8) |  \
185    ((_data&0x00ff0000)>>8)  | ((_data&0xff000000)>>24) )
186
187#define Convert_Endian_16( _data ) \
188  ( ((_data&0x00ff)<<8) | ((_data&0xff00)>>8) )
189
190#endif /* ASM */
191
192#ifdef __cplusplus
193}
194#endif
195
196#endif
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