source: rtems/c/src/lib/libbsp/powerpc/score603e/include/bsp.h @ c00b49f8

4.104.11
Last change on this file since c00b49f8 was a3a6fae, checked in by Joel Sherrill <joel.sherrill@…>, on Aug 21, 2009 at 5:59:31 PM

2009-08-21 Joel Sherrill <joel.sherrill@…>

  • include/bsp.h: Eliminate BSPs defining NUMBER_OF_TERMIOS_PORTS. Should be automatically handled by confdefs.h or the application.
  • Property mode set to 100644
File size: 4.2 KB
Line 
1/*  bsp.h
2 *
3 *  This include file contains all board IO definitions.
4 *
5 *  COPYRIGHT (c) 1989-2009.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
10 *  http://www.rtems.com/license/LICENSE.
11 *
12 *  $Id$
13 */
14
15#ifndef _BSP_H
16#define _BSP_H
17
18#ifdef __cplusplus
19extern "C" {
20#endif
21
22#define BSP_ZERO_WORKSPACE_AUTOMATICALLY TRUE
23
24#include <bspopts.h>
25#include <rtems.h>
26#include <rtems/console.h>
27#include <libcpu/io.h>
28#include <rtems/clockdrv.h>
29#include <bsp/vectors.h>
30
31#ifdef ASM
32/* Definition of where to store registers in alignment handler */
33#define ALIGN_REGS 0x0140
34
35#else
36#include <rtems.h>
37#include <rtems/console.h>
38#include <rtems/clockdrv.h>
39#include <rtems/iosupp.h>
40
41/*
42 *  We no longer support the first generation board.
43 */
44
45#include <gen2.h>
46#include <bsp/irq.h>
47
48/*
49 * The following macro calculates the Baud constant. For the Z8530 chip.
50 *
51 * Note: baud constant = ((clock frequency / Clock_X) / (2 * Baud Rate)) - 2
52 *       for the Score603e ((10,000,000 / 16) / (2 * Baud Rate)) - 2
53 */
54#define _Score603e_Z8530_Baud( _frequency, _clock_by, _baud_rate  )   \
55  ( (_frequency /( _clock_by * 2 * _baud_rate))  - 2)
56
57#define Score603e_Z8530_Chip1_Baud( _value ) \
58  _Score603e_Z8530_Baud( SCORE603E_85C30_1_CLOCK, \
59     SCORE603E_85C30_1_CLOCK_X, _value )
60
61#define Score603e_Z8530_Chip0_Baud( _value ) \
62  _Score603e_Z8530_Baud( SCORE603E_85C30_0_CLOCK, \
63     SCORE603E_85C30_0_CLOCK_X, _value )
64
65#define Initialize_Board_ctrl_register()                         \
66  *SCORE603E_BOARD_CTRL_REG = (*SCORE603E_BOARD_CTRL_REG |       \
67                               SCORE603E_BRD_FLASH_DISABLE_MASK)
68
69#define Processor_Synchronize() \
70  asm volatile(" eieio ")
71
72
73/* Constants */
74
75/*
76 *  Device Driver Table Entries
77 */
78
79/*
80 * NOTE: Use the standard Console driver entry
81 */
82
83/*
84 * NOTE: Use the standard Clock driver entry
85 */
86
87/*
88 *  Information placed in the linkcmds file.
89 */
90
91extern int   RAM_START;
92extern int   RAM_END;
93extern int   RAM_SIZE;
94
95extern int   PROM_START;
96extern int   PROM_END;
97extern int   PROM_SIZE;
98
99extern int   CLOCK_SPEED;
100extern int   CPU_PPC_CLICKS_PER_MS;
101
102extern int   end;        /* last address in the program */
103
104/*
105 * Total RAM available
106 */
107extern int        end;        /* last address in the program */
108extern int        RAM_END;
109extern uint32_t   BSP_mem_size;
110
111
112/*
113 * How many libio files we want
114 */
115
116#define BSP_LIBIO_MAX_FDS       20
117
118/* functions */
119
120/*
121 *
122 */
123rtems_isr_entry  set_EE_vector(
124  rtems_isr_entry     handler,                  /* isr routine        */
125  rtems_vector_number vector                    /* vector number      */
126);
127void initialize_external_exception_vector ();
128
129/*
130 * console.c
131 */
132void BSP_fatal_return( void );
133
134/*
135 * Hwr_init.c
136 */
137void init_PCI();
138void instruction_cache_enable ();
139void data_cache_enable ();
140
141void initialize_PCI_bridge ();
142uint16_t         read_and_clear_irq ();
143void set_irq_mask(
144  uint16_t         value
145);
146uint16_t         get_irq_mask();
147
148/*
149 * universe.c
150 */
151void initialize_universe();
152
153void set_irq_mask(
154  uint16_t         value
155);
156
157uint16_t         get_irq_mask();
158
159void unmask_irq(
160  uint16_t         irq_idx
161);
162
163void mask_irq(
164  uint16_t         irq_idx
165);
166
167void init_irq_data_register();
168
169uint16_t         read_and_clear_PMC_irq(
170  uint16_t            irq
171);
172
173bool Is_PMC_IRQ(
174  uint32_t           pmc_irq,
175  uint16_t           status_word
176);
177
178uint16_t         read_and_clear_irq();
179
180/*
181 * FPGA.c
182 */
183void initialize_PCI_bridge ();
184
185/* flash.c */
186
187unsigned int SCORE603e_FLASH_Disable(
188  uint32_t                       unused
189);
190unsigned int SCORE603e_FLASH_verify_enable();
191unsigned int SCORE603e_FLASH_Enable_writes(
192  uint32_t                       area        /* Unused  */
193);
194
195#define BSP_FLASH_ENABLE_WRITES( _area) SCORE603e_FLASH_Enable_writes( _area )
196#define BSP_FLASH_DISABLE_WRITES(_area) SCORE603e_FLASH_Disable( _area )
197
198#define Convert_Endian_32( _data ) \
199  ( ((_data&0x000000ff)<<24) | ((_data&0x0000ff00)<<8) |  \
200    ((_data&0x00ff0000)>>8)  | ((_data&0xff000000)>>24) )
201
202#define Convert_Endian_16( _data ) \
203  ( ((_data&0x00ff)<<8) | ((_data&0xff00)>>8) )
204
205#endif /* ASM */
206
207#ifdef __cplusplus
208}
209#endif
210
211#endif
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