source: rtems/c/src/lib/libbsp/powerpc/score603e/include/bsp.h @ bb41881e

4.104.114.84.95
Last change on this file since bb41881e was bb41881e, checked in by Jennifer Averett <Jennifer.Averett@…>, on 04/28/05 at 14:16:29

2005-04-28 Jennifer Averett <jennifer.averett@…>

  • score603e/Makefile.am, score603e/configure.ac, score603e/console/console.c, score603e/include/bsp.h, score603e/include/gen2.h, score603e/include/tm27.h, score603e/startup/bspstart.c: Update score603e to new exception model NOTE: These modifications have not been tested on hardware.
  • Property mode set to 100644
File size: 5.0 KB
Line 
1/*  bsp.h
2 *
3 *  This include file contains all board IO definitions.
4 *
5 *  COPYRIGHT (c) 1989-1997.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  The license and distribution terms for this file may in
9 *  the file LICENSE in this distribution or at
10 *  http://www.rtems.com/license/LICENSE.
11 *
12 *  $Id$
13 */
14
15#ifndef __BSP_h
16#define __BSP_h
17
18#ifdef __cplusplus
19extern "C" {
20#endif
21
22#include <bspopts.h>
23#include <rtems.h>
24#include <rtems/console.h>
25#include <libcpu/io.h>
26#include <rtems/clockdrv.h>
27#include <bsp/vectors.h>
28
29/*
30 *  confdefs.h overrides for this BSP:
31 *   - termios serial ports (defaults to 1)
32 *   - Interrupt stack space is not minimum if defined.
33 */
34
35#if (HAS_PMC_PSC8)
36#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4 + 4)
37#else
38#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4)
39#endif
40#define CONFIGURE_INTERRUPT_STACK_MEMORY  (12 * 1024)
41
42#ifdef ASM
43/* Definition of where to store registers in alignment handler */
44#define ALIGN_REGS 0x0140
45
46#else
47#include <rtems.h>
48#include <rtems/console.h>
49#include <rtems/clockdrv.h>
50#include <rtems/iosupp.h>
51
52/*
53 *  We no longer support the first generation board.
54 */
55
56#include <gen2.h>
57
58/*
59 * The following macro calculates the Baud constant. For the Z8530 chip.
60 *
61 * Note: baud constant = ((clock frequency / Clock_X) / (2 * Baud Rate)) - 2
62 *       for the Score603e ((10,000,000 / 16) / (2 * Baud Rate)) - 2
63 */
64#define _Score603e_Z8530_Baud( _frequency, _clock_by, _baud_rate  )   \
65  ( (_frequency /( _clock_by * 2 * _baud_rate))  - 2)
66
67#define Score603e_Z8530_Chip1_Baud( _value ) \
68  _Score603e_Z8530_Baud( SCORE603E_85C30_1_CLOCK, \
69     SCORE603E_85C30_1_CLOCK_X, _value )
70
71#define Score603e_Z8530_Chip0_Baud( _value ) \
72  _Score603e_Z8530_Baud( SCORE603E_85C30_0_CLOCK, \
73     SCORE603E_85C30_0_CLOCK_X, _value )
74
75#define Initialize_Board_ctrl_register()                         \
76  *SCORE603E_BOARD_CTRL_REG = (*SCORE603E_BOARD_CTRL_REG |       \
77                               SCORE603E_BRD_FLASH_DISABLE_MASK)
78
79#define Processor_Synchronize() \
80  asm(" eieio ")
81
82
83/* Constants */
84
85/*
86 *  Device Driver Table Entries
87 */
88
89/*
90 * NOTE: Use the standard Console driver entry
91 */
92
93/*
94 * NOTE: Use the standard Clock driver entry
95 */
96
97/*
98 *  Information placed in the linkcmds file.
99 */
100
101extern int   RAM_START;
102extern int   RAM_END;
103extern int   RAM_SIZE;
104
105extern int   PROM_START;
106extern int   PROM_END;
107extern int   PROM_SIZE;
108
109extern int   CLOCK_SPEED;
110extern int   CPU_PPC_CLICKS_PER_MS;
111
112extern int   end;        /* last address in the program */
113
114/*
115 * How many libio files we want
116 */
117
118#define BSP_LIBIO_MAX_FDS       20
119
120/* functions */
121
122void bsp_start( void );
123
124void bsp_cleanup( void );
125
126rtems_isr_entry set_vector(                    /* returns old vector */
127  rtems_isr_entry     handler,                  /* isr routine        */
128  rtems_vector_number vector,                   /* vector number      */
129  int                 type                      /* RTEMS or RAW intr  */
130);
131
132/*
133 * spurious.c
134 */
135rtems_isr bsp_stub_handler(
136   rtems_vector_number trap
137);
138rtems_isr bsp_spurious_handler(
139   rtems_vector_number trap
140);
141void bsp_spurious_initialize();
142
143/*
144 * genvec.c
145 */
146rtems_isr_entry  set_EE_vector(
147  rtems_isr_entry     handler,                  /* isr routine        */
148  rtems_vector_number vector                    /* vector number      */
149);
150void initialize_external_exception_vector ();
151
152/*
153 * console.c
154 */
155void DEBUG_puts( char *string );
156
157void BSP_fatal_return( void );
158
159/*
160 * Hwr_init.c
161 */
162void init_PCI();
163void instruction_cache_enable ();
164void data_cache_enable ();
165
166void initialize_PCI_bridge ();
167uint16_t         read_and_clear_irq ();
168void set_irq_mask(
169  uint16_t         value
170);
171uint16_t         get_irq_mask();
172
173/*
174 * universe.c
175 */
176void initialize_universe();
177
178void set_irq_mask(
179  uint16_t         value
180);
181
182uint16_t         get_irq_mask();
183
184void unmask_irq(
185  uint16_t         irq_idx
186);
187
188void init_irq_data_register();
189
190uint16_t         read_and_clear_PMC_irq(
191  uint16_t            irq
192);
193
194rtems_boolean Is_PMC_IRQ(
195  uint32_t           pmc_irq,
196  uint16_t           status_word
197);
198
199uint16_t         read_and_clear_irq();
200
201/*
202 * FPGA.c
203 */
204void initialize_PCI_bridge ();
205
206/* flash.c */
207
208unsigned int SCORE603e_FLASH_Disable(
209  uint32_t                       unused
210);
211unsigned int SCORE603e_FLASH_verify_enable();
212unsigned int SCORE603e_FLASH_Enable_writes(
213  uint32_t                       area        /* Unused  */
214);
215
216#define BSP_FLASH_ENABLE_WRITES( _area) SCORE603e_FLASH_Enable_writes( _area )
217#define BSP_FLASH_DISABLE_WRITES(_area) SCORE603e_FLASH_Disable( _area )
218
219#define Convert_Endian_32( _data ) \
220  ( ((_data&0x000000ff)<<24) | ((_data&0x0000ff00)<<8) |  \
221    ((_data&0x00ff0000)>>8)  | ((_data&0xff000000)>>24) )
222
223#define Convert_Endian_16( _data ) \
224  ( ((_data&0x00ff)<<8) | ((_data&0xff00)>>8) )
225
226extern rtems_configuration_table BSP_Configuration;     /* owned by BSP */
227extern rtems_cpu_table           Cpu_table;             /* owned by BSP */
228extern uint32_t                  bsp_isr_level;
229
230#endif /* ASM */
231
232#ifdef __cplusplus
233}
234#endif
235
236#endif
237/* end of include file */
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