source: rtems/c/src/lib/libbsp/powerpc/score603e/include/bsp.h @ 9cff822a

4.11
Last change on this file since 9cff822a was 9cff822a, checked in by Joel Sherrill <joel.sherrill@…>, on Jul 16, 2015 at 3:40:05 PM

Most bsp.h: Switch to LIBBSP_@CPU@_@BSP_FAMILY@_H for guard

This was done by the following script run from libbsp:

find * -name bsp.h | xargs -e grep -l "#ifndef.*_BSP_H" | while read b
do

echo $b
cpu=echo $b | cut -d'/' -f1 | tr '[:lower:]' '[:upper:]'
bsp=echo $b | cut -d'/' -f2 | tr '[:lower:]' '[:upper:]'
g="LIBBSP_${cpu}_${bsp}_BSP_H"
# echo $g
sed -e "s/ifndef _BSP_H/ifndef ${g}/" \

-e "s/define _BSP_H/define ${g}/" \

-i $b

done

  • Property mode set to 100644
File size: 4.6 KB
Line 
1/*
2 *  This include file contains all board IO definitions.
3 */
4
5/*
6 *  COPYRIGHT (c) 1989-2014.
7 *  On-Line Applications Research Corporation (OAR).
8 *
9 *  The license and distribution terms for this file may be
10 *  found in the file LICENSE in this distribution or at
11 *  http://www.rtems.org/license/LICENSE.
12 */
13
14#ifndef LIBBSP_POWERPC_SCORE603E_BSP_H
15#define LIBBSP_POWERPC_SCORE603E_BSP_H
16
17#define BSP_ZERO_WORKSPACE_AUTOMATICALLY TRUE
18
19#include <bspopts.h>
20#include <bsp/default-initial-extension.h>
21#include <rtems.h>
22#include <rtems/console.h>
23#include <libcpu/io.h>
24#include <rtems/clockdrv.h>
25#include <bsp/vectors.h>
26
27#ifdef ASM
28/* Definition of where to store registers in alignment handler */
29#define ALIGN_REGS 0x0140
30
31#else
32#include <rtems.h>
33#include <rtems/console.h>
34#include <rtems/clockdrv.h>
35#include <rtems/iosupp.h>
36
37/*
38 *  We no longer support the first generation board.
39 */
40
41#include <gen2.h>
42#include <bsp/irq.h>
43
44#ifdef __cplusplus
45extern "C" {
46#endif
47
48/*
49 * The following macro calculates the Baud constant. For the Z8530 chip.
50 *
51 * Note: baud constant = ((clock frequency / Clock_X) / (2 * Baud Rate)) - 2
52 *       for the Score603e ((10,000,000 / 16) / (2 * Baud Rate)) - 2
53 */
54#define _Score603e_Z8530_Baud( _frequency, _clock_by, _baud_rate  )   \
55  ( (_frequency /( _clock_by * 2 * _baud_rate))  - 2)
56
57#define Score603e_Z8530_Chip1_Baud( _value ) \
58  _Score603e_Z8530_Baud( SCORE603E_85C30_1_CLOCK, \
59     SCORE603E_85C30_1_CLOCK_X, _value )
60
61#define Score603e_Z8530_Chip0_Baud( _value ) \
62  _Score603e_Z8530_Baud( SCORE603E_85C30_0_CLOCK, \
63     SCORE603E_85C30_0_CLOCK_X, _value )
64
65#define Initialize_Board_ctrl_register()                         \
66  *SCORE603E_BOARD_CTRL_REG = (*SCORE603E_BOARD_CTRL_REG |       \
67                               SCORE603E_BRD_FLASH_DISABLE_MASK)
68
69#define Processor_Synchronize() \
70  __asm__ volatile(" eieio ")
71
72
73/* Constants */
74
75/*
76 *  Device Driver Table Entries
77 */
78
79/*
80 * NOTE: Use the standard Console driver entry
81 */
82
83/*
84 * NOTE: Use the standard Clock driver entry
85 */
86
87/*
88 *  Information placed in the linkcmds file.
89 */
90
91extern int   RAM_START;
92extern int   RAM_END;
93extern int   RAM_SIZE;
94
95extern int   PROM_START;
96extern int   PROM_END;
97extern int   PROM_SIZE;
98
99extern int   CLOCK_SPEED;
100extern int   CPU_PPC_CLICKS_PER_MS;
101
102extern int   end;        /* last address in the program */
103
104/*
105 * Total RAM available
106 */
107extern int        end;        /* last address in the program */
108extern int        RAM_END;
109extern uint32_t   BSP_mem_size;
110
111
112/*
113 * How many libio files we want
114 */
115
116#define BSP_LIBIO_MAX_FDS       20
117
118/* functions */
119
120/*
121 *
122 */
123rtems_isr_entry  set_EE_vector(
124  rtems_isr_entry     handler,                  /* isr routine        */
125  rtems_vector_number vector                    /* vector number      */
126);
127void initialize_external_exception_vector(void);
128
129/*
130 * Hwr_init.c
131 */
132void init_PCI(void);
133void init_RTC(void);
134void instruction_cache_enable(void);
135void data_cache_enable(void);
136
137void     initialize_PCI_bridge(void);
138uint16_t read_and_clear_irq(void);
139void     set_irq_mask(uint16_t value);
140uint16_t get_irq_mask(void);
141
142/*
143 * universe.c
144 */
145void     initialize_universe(void);
146void     set_irq_mask(uint16_t value);
147uint16_t get_irq_mask(void);
148void     unmask_irq(uint16_t irq_idx);
149void     mask_irq(uint16_t irq_idx);
150void     init_irq_data_register(void);
151uint16_t read_and_clear_PMC_irq(uint16_t irq);
152bool     Is_PMC_IRQ( uint32_t pmc_irq, uint16_t status_word);
153uint16_t read_and_clear_irq(void);
154void set_vme_base_address(uint32_t base_address);
155uint32_t get_vme_slave_size(void);
156void set_vme_slave_size (uint32_t size);
157
158/*
159 * FPGA.c
160 */
161void initialize_PCI_bridge(void);
162void init_irq_data_register(void);
163uint32_t Read_pci_device_register(uint32_t address);
164void  Write_pci_device_register(uint32_t address, uint32_t data);
165
166/* flash.c */
167unsigned int SCORE603e_FLASH_Disable(uint32_t unused);
168unsigned int SCORE603e_FLASH_verify_enable(void);
169unsigned int SCORE603e_FLASH_Enable_writes(uint32_t area);
170
171/*
172 * PCI.c
173 */
174uint32_t PCI_bus_read(volatile uint32_t *_addr);
175void PCI_bus_write(volatile uint32_t *_addr, uint32_t _data);
176
177#define BSP_FLASH_ENABLE_WRITES( _area) SCORE603e_FLASH_Enable_writes( _area )
178#define BSP_FLASH_DISABLE_WRITES(_area) SCORE603e_FLASH_Disable( _area )
179
180#define Convert_Endian_32( _data ) \
181  ( ((_data&0x000000ff)<<24) | ((_data&0x0000ff00)<<8) |  \
182    ((_data&0x00ff0000)>>8)  | ((_data&0xff000000)>>24) )
183
184#define Convert_Endian_16( _data ) \
185  ( ((_data&0x00ff)<<8) | ((_data&0xff00)>>8) )
186
187/*
188 *  Interfaces to required Clock Driver support methods
189 */
190int BSP_disconnect_clock_handler(void);
191int BSP_connect_clock_handler(void);
192
193#ifdef __cplusplus
194}
195#endif
196
197#endif /* ASM */
198
199#endif
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