source: rtems/c/src/lib/libbsp/powerpc/score603e/include/bsp.h @ 978eba3

4.9
Last change on this file since 978eba3 was 978eba3, checked in by Joel Sherrill <joel.sherrill@…>, on Sep 30, 2008 at 11:17:15 PM

2008-09-30 Jennifer Averett <jennifer.averett@…>

  • Makefile.am, preinstall.am, PCI_bus/universe.c, console/console.c, include/bsp.h, irq/FPGA.c, irq/irq.c, startup/Hwr_init.c, startup/bspstart.c, startup/vmeintr.c: Modifications required to run on hardware. Some cleanup.
  • include/irq-config.h: New file.
  • startup/spurious.c: Removed.
  • Property mode set to 100644
File size: 4.6 KB
Line 
1/*  bsp.h
2 *
3 *  This include file contains all board IO definitions.
4 *
5 *  COPYRIGHT (c) 1989-1997.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  The license and distribution terms for this file may in
9 *  the file LICENSE in this distribution or at
10 *  http://www.rtems.com/license/LICENSE.
11 *
12 *  $Id$
13 */
14
15#ifndef _BSP_H
16#define _BSP_H
17
18#ifdef __cplusplus
19extern "C" {
20#endif
21
22#include <bspopts.h>
23#include <rtems.h>
24#include <rtems/console.h>
25#include <libcpu/io.h>
26#include <rtems/clockdrv.h>
27#include <bsp/vectors.h>
28
29/*
30 *  confdefs.h overrides for this BSP:
31 *   - termios serial ports (defaults to 1)
32 *   - Interrupt stack space is not minimum if defined.
33 */
34
35#if (HAS_PMC_PSC8)
36#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4 + 4)
37#else
38/* XXXXX FIX THIS */
39#error "MUST HAVE PSC8 SET FOR BOEING CODE"
40#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4)
41#endif
42
43#ifdef ASM
44/* Definition of where to store registers in alignment handler */
45#define ALIGN_REGS 0x0140
46
47#else
48#include <rtems.h>
49#include <rtems/console.h>
50#include <rtems/clockdrv.h>
51#include <rtems/iosupp.h>
52
53/*
54 *  We no longer support the first generation board.
55 */
56
57#include <gen2.h>
58
59/*
60 * The following macro calculates the Baud constant. For the Z8530 chip.
61 *
62 * Note: baud constant = ((clock frequency / Clock_X) / (2 * Baud Rate)) - 2
63 *       for the Score603e ((10,000,000 / 16) / (2 * Baud Rate)) - 2
64 */
65#define _Score603e_Z8530_Baud( _frequency, _clock_by, _baud_rate  )   \
66  ( (_frequency /( _clock_by * 2 * _baud_rate))  - 2)
67
68#define Score603e_Z8530_Chip1_Baud( _value ) \
69  _Score603e_Z8530_Baud( SCORE603E_85C30_1_CLOCK, \
70     SCORE603E_85C30_1_CLOCK_X, _value )
71
72#define Score603e_Z8530_Chip0_Baud( _value ) \
73  _Score603e_Z8530_Baud( SCORE603E_85C30_0_CLOCK, \
74     SCORE603E_85C30_0_CLOCK_X, _value )
75
76#define Initialize_Board_ctrl_register()                         \
77  *SCORE603E_BOARD_CTRL_REG = (*SCORE603E_BOARD_CTRL_REG |       \
78                               SCORE603E_BRD_FLASH_DISABLE_MASK)
79
80#define Processor_Synchronize() \
81  asm volatile(" eieio ")
82
83
84/* Constants */
85
86/*
87 *  Device Driver Table Entries
88 */
89
90/*
91 * NOTE: Use the standard Console driver entry
92 */
93
94/*
95 * NOTE: Use the standard Clock driver entry
96 */
97
98/*
99 *  Information placed in the linkcmds file.
100 */
101
102extern int   RAM_START;
103extern int   RAM_END;
104extern int   RAM_SIZE;
105
106extern int   PROM_START;
107extern int   PROM_END;
108extern int   PROM_SIZE;
109
110extern int   CLOCK_SPEED;
111extern int   CPU_PPC_CLICKS_PER_MS;
112
113extern int   end;        /* last address in the program */
114
115/*
116 * How many libio files we want
117 */
118
119#define BSP_LIBIO_MAX_FDS       20
120
121/* functions */
122
123void bsp_start( void );
124
125void bsp_cleanup( void );
126
127rtems_isr_entry set_vector(                    /* returns old vector */
128  rtems_isr_entry     handler,                  /* isr routine        */
129  rtems_vector_number vector,                   /* vector number      */
130  int                 type                      /* RTEMS or RAW intr  */
131);
132
133/*
134 * genvec.c
135 */
136rtems_isr_entry  set_EE_vector(
137  rtems_isr_entry     handler,                  /* isr routine        */
138  rtems_vector_number vector                    /* vector number      */
139);
140void initialize_external_exception_vector ();
141
142/*
143 * console.c
144 */
145void BSP_fatal_return( void );
146
147/*
148 * Hwr_init.c
149 */
150void init_PCI();
151void instruction_cache_enable ();
152void data_cache_enable ();
153
154void initialize_PCI_bridge ();
155uint16_t         read_and_clear_irq ();
156void set_irq_mask(
157  uint16_t         value
158);
159uint16_t         get_irq_mask();
160
161/*
162 * universe.c
163 */
164void initialize_universe();
165
166void set_irq_mask(
167  uint16_t         value
168);
169
170uint16_t         get_irq_mask();
171
172void unmask_irq(
173  uint16_t         irq_idx
174);
175
176void init_irq_data_register();
177
178uint16_t         read_and_clear_PMC_irq(
179  uint16_t            irq
180);
181
182bool Is_PMC_IRQ(
183  uint32_t           pmc_irq,
184  uint16_t           status_word
185);
186
187uint16_t         read_and_clear_irq();
188
189/*
190 * FPGA.c
191 */
192void initialize_PCI_bridge ();
193
194/* flash.c */
195
196unsigned int SCORE603e_FLASH_Disable(
197  uint32_t                       unused
198);
199unsigned int SCORE603e_FLASH_verify_enable();
200unsigned int SCORE603e_FLASH_Enable_writes(
201  uint32_t                       area        /* Unused  */
202);
203
204#define BSP_FLASH_ENABLE_WRITES( _area) SCORE603e_FLASH_Enable_writes( _area )
205#define BSP_FLASH_DISABLE_WRITES(_area) SCORE603e_FLASH_Disable( _area )
206
207#define Convert_Endian_32( _data ) \
208  ( ((_data&0x000000ff)<<24) | ((_data&0x0000ff00)<<8) |  \
209    ((_data&0x00ff0000)>>8)  | ((_data&0xff000000)>>24) )
210
211#define Convert_Endian_16( _data ) \
212  ( ((_data&0x00ff)<<8) | ((_data&0xff00)>>8) )
213
214#endif /* ASM */
215
216#ifdef __cplusplus
217}
218#endif
219
220#endif
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