source: rtems/c/src/lib/libbsp/powerpc/score603e/include/bsp.h @ 283e6f0

4.104.11
Last change on this file since 283e6f0 was 283e6f0, checked in by Joel Sherrill <joel.sherrill@…>, on Sep 18, 2008 at 3:09:21 PM

2008-09-18 Joel Sherrill <joel.sherrill@…>

  • include/bsp.h: Eliminate definitions of BSP_LIBIO_MAX_FDS since this is NOT used anywhere.
  • Property mode set to 100644
File size: 4.2 KB
Line 
1/*
2 *  This include file contains all board IO definitions.
3 *
4 *  COPYRIGHT (c) 1989-2008.
5 *  On-Line Applications Research Corporation (OAR).
6 *
7 *  The license and distribution terms for this file may in
8 *  the file LICENSE in this distribution or at
9 *  http://www.rtems.com/license/LICENSE.
10 *
11 *  $Id$
12 */
13
14#ifndef _BSP_H
15#define _BSP_H
16
17#ifdef __cplusplus
18extern "C" {
19#endif
20
21#include <bspopts.h>
22#include <rtems.h>
23#include <rtems/console.h>
24#include <libcpu/io.h>
25#include <rtems/clockdrv.h>
26#include <bsp/vectors.h>
27
28/*
29 *  confdefs.h overrides for this BSP:
30 *   - termios serial ports (defaults to 1)
31 *   - Interrupt stack space is not minimum if defined.
32 */
33
34#if (HAS_PMC_PSC8)
35#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4 + 4)
36#else
37#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4)
38#endif
39
40#ifdef ASM
41/* Definition of where to store registers in alignment handler */
42#define ALIGN_REGS 0x0140
43
44#else
45#include <rtems.h>
46#include <rtems/console.h>
47#include <rtems/clockdrv.h>
48#include <rtems/iosupp.h>
49
50/*
51 *  We no longer support the first generation board.
52 */
53
54#include <gen2.h>
55
56/*
57 * The following macro calculates the Baud constant. For the Z8530 chip.
58 *
59 * Note: baud constant = ((clock frequency / Clock_X) / (2 * Baud Rate)) - 2
60 *       for the Score603e ((10,000,000 / 16) / (2 * Baud Rate)) - 2
61 */
62#define _Score603e_Z8530_Baud( _frequency, _clock_by, _baud_rate  )   \
63  ( (_frequency /( _clock_by * 2 * _baud_rate))  - 2)
64
65#define Score603e_Z8530_Chip1_Baud( _value ) \
66  _Score603e_Z8530_Baud( SCORE603E_85C30_1_CLOCK, \
67     SCORE603E_85C30_1_CLOCK_X, _value )
68
69#define Score603e_Z8530_Chip0_Baud( _value ) \
70  _Score603e_Z8530_Baud( SCORE603E_85C30_0_CLOCK, \
71     SCORE603E_85C30_0_CLOCK_X, _value )
72
73#define Initialize_Board_ctrl_register()                         \
74  *SCORE603E_BOARD_CTRL_REG = (*SCORE603E_BOARD_CTRL_REG |       \
75                               SCORE603E_BRD_FLASH_DISABLE_MASK)
76
77#define Processor_Synchronize() \
78  asm(" eieio ")
79
80
81/* Constants */
82
83/*
84 *  Device Driver Table Entries
85 */
86
87/*
88 * NOTE: Use the standard Console driver entry
89 */
90
91/*
92 * NOTE: Use the standard Clock driver entry
93 */
94
95/*
96 *  Information placed in the linkcmds file.
97 */
98
99extern void *RAM_END;
100extern void *end;
101
102extern int   CLOCK_SPEED;
103extern int   CPU_PPC_CLICKS_PER_MS;
104
105/*
106 * system init stack
107 */
108#define BSP_INIT_STACK_SIZE 0x1000
109
110/* functions */
111
112/*
113 * spurious.c
114 */
115rtems_isr bsp_stub_handler(
116   rtems_vector_number trap
117);
118rtems_isr bsp_spurious_handler(
119   rtems_vector_number trap
120);
121void bsp_spurious_initialize();
122
123/*
124 * genvec.c
125 */
126rtems_isr_entry  set_EE_vector(
127  rtems_isr_entry     handler,                  /* isr routine        */
128  rtems_vector_number vector                    /* vector number      */
129);
130void initialize_external_exception_vector ();
131
132/*
133 * console.c
134 */
135void BSP_fatal_return( void );
136
137/*
138 * Hwr_init.c
139 */
140void init_PCI();
141void instruction_cache_enable ();
142void data_cache_enable ();
143
144void initialize_PCI_bridge ();
145uint16_t         read_and_clear_irq ();
146void set_irq_mask(
147  uint16_t         value
148);
149uint16_t         get_irq_mask();
150
151/*
152 * universe.c
153 */
154void initialize_universe();
155
156void set_irq_mask(
157  uint16_t         value
158);
159
160uint16_t         get_irq_mask();
161
162void unmask_irq(
163  uint16_t         irq_idx
164);
165
166void init_irq_data_register();
167
168uint16_t         read_and_clear_PMC_irq(
169  uint16_t            irq
170);
171
172bool Is_PMC_IRQ(
173  uint32_t           pmc_irq,
174  uint16_t           status_word
175);
176
177uint16_t         read_and_clear_irq();
178
179/*
180 * FPGA.c
181 */
182void initialize_PCI_bridge ();
183
184/* flash.c */
185
186unsigned int SCORE603e_FLASH_Disable(
187  uint32_t                       unused
188);
189unsigned int SCORE603e_FLASH_verify_enable();
190unsigned int SCORE603e_FLASH_Enable_writes(
191  uint32_t                       area        /* Unused  */
192);
193
194#define BSP_FLASH_ENABLE_WRITES( _area) SCORE603e_FLASH_Enable_writes( _area )
195#define BSP_FLASH_DISABLE_WRITES(_area) SCORE603e_FLASH_Disable( _area )
196
197#define Convert_Endian_32( _data ) \
198  ( ((_data&0x000000ff)<<24) | ((_data&0x0000ff00)<<8) |  \
199    ((_data&0x00ff0000)>>8)  | ((_data&0xff000000)>>24) )
200
201#define Convert_Endian_16( _data ) \
202  ( ((_data&0x00ff)<<8) | ((_data&0xff00)>>8) )
203
204#endif /* ASM */
205
206#ifdef __cplusplus
207}
208#endif
209
210#endif
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