source: rtems/c/src/lib/libbsp/powerpc/score603e/include/bsp.h @ 0f707111

4.104.115
Last change on this file since 0f707111 was 8446486f, checked in by Joel Sherrill <joel.sherrill@…>, on 09/15/08 at 22:05:12

2008-09-15 Joel Sherrill <joel.sherrill@…>

  • Makefile.am, configure.ac, include/bsp.h, startup/bspstart.c: Add use of bsp_get_work_area() in its own file and rely on BSP Framework to perform more initialization.
  • startup/bspgetworkarea.c: New file.
  • Property mode set to 100644
File size: 4.3 KB
Line 
1/*  bsp.h
2 *
3 *  This include file contains all board IO definitions.
4 *
5 *  COPYRIGHT (c) 1989-1997.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  The license and distribution terms for this file may in
9 *  the file LICENSE in this distribution or at
10 *  http://www.rtems.com/license/LICENSE.
11 *
12 *  $Id$
13 */
14
15#ifndef _BSP_H
16#define _BSP_H
17
18#ifdef __cplusplus
19extern "C" {
20#endif
21
22#include <bspopts.h>
23#include <rtems.h>
24#include <rtems/console.h>
25#include <libcpu/io.h>
26#include <rtems/clockdrv.h>
27#include <bsp/vectors.h>
28
29/*
30 *  confdefs.h overrides for this BSP:
31 *   - termios serial ports (defaults to 1)
32 *   - Interrupt stack space is not minimum if defined.
33 */
34
35#if (HAS_PMC_PSC8)
36#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4 + 4)
37#else
38#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4)
39#endif
40
41#ifdef ASM
42/* Definition of where to store registers in alignment handler */
43#define ALIGN_REGS 0x0140
44
45#else
46#include <rtems.h>
47#include <rtems/console.h>
48#include <rtems/clockdrv.h>
49#include <rtems/iosupp.h>
50
51/*
52 *  We no longer support the first generation board.
53 */
54
55#include <gen2.h>
56
57/*
58 * The following macro calculates the Baud constant. For the Z8530 chip.
59 *
60 * Note: baud constant = ((clock frequency / Clock_X) / (2 * Baud Rate)) - 2
61 *       for the Score603e ((10,000,000 / 16) / (2 * Baud Rate)) - 2
62 */
63#define _Score603e_Z8530_Baud( _frequency, _clock_by, _baud_rate  )   \
64  ( (_frequency /( _clock_by * 2 * _baud_rate))  - 2)
65
66#define Score603e_Z8530_Chip1_Baud( _value ) \
67  _Score603e_Z8530_Baud( SCORE603E_85C30_1_CLOCK, \
68     SCORE603E_85C30_1_CLOCK_X, _value )
69
70#define Score603e_Z8530_Chip0_Baud( _value ) \
71  _Score603e_Z8530_Baud( SCORE603E_85C30_0_CLOCK, \
72     SCORE603E_85C30_0_CLOCK_X, _value )
73
74#define Initialize_Board_ctrl_register()                         \
75  *SCORE603E_BOARD_CTRL_REG = (*SCORE603E_BOARD_CTRL_REG |       \
76                               SCORE603E_BRD_FLASH_DISABLE_MASK)
77
78#define Processor_Synchronize() \
79  asm(" eieio ")
80
81
82/* Constants */
83
84/*
85 *  Device Driver Table Entries
86 */
87
88/*
89 * NOTE: Use the standard Console driver entry
90 */
91
92/*
93 * NOTE: Use the standard Clock driver entry
94 */
95
96/*
97 *  Information placed in the linkcmds file.
98 */
99
100extern void *RAM_END;
101extern void *end;
102
103extern int   CLOCK_SPEED;
104extern int   CPU_PPC_CLICKS_PER_MS;
105
106/*
107 * system init stack
108 */
109#define BSP_INIT_STACK_SIZE 0x1000
110
111/*
112 * How many libio files we want
113 */
114
115#define BSP_LIBIO_MAX_FDS       20
116
117/* functions */
118
119void bsp_start( void );
120
121/*
122 * spurious.c
123 */
124rtems_isr bsp_stub_handler(
125   rtems_vector_number trap
126);
127rtems_isr bsp_spurious_handler(
128   rtems_vector_number trap
129);
130void bsp_spurious_initialize();
131
132/*
133 * genvec.c
134 */
135rtems_isr_entry  set_EE_vector(
136  rtems_isr_entry     handler,                  /* isr routine        */
137  rtems_vector_number vector                    /* vector number      */
138);
139void initialize_external_exception_vector ();
140
141/*
142 * console.c
143 */
144void BSP_fatal_return( void );
145
146/*
147 * Hwr_init.c
148 */
149void init_PCI();
150void instruction_cache_enable ();
151void data_cache_enable ();
152
153void initialize_PCI_bridge ();
154uint16_t         read_and_clear_irq ();
155void set_irq_mask(
156  uint16_t         value
157);
158uint16_t         get_irq_mask();
159
160/*
161 * universe.c
162 */
163void initialize_universe();
164
165void set_irq_mask(
166  uint16_t         value
167);
168
169uint16_t         get_irq_mask();
170
171void unmask_irq(
172  uint16_t         irq_idx
173);
174
175void init_irq_data_register();
176
177uint16_t         read_and_clear_PMC_irq(
178  uint16_t            irq
179);
180
181bool Is_PMC_IRQ(
182  uint32_t           pmc_irq,
183  uint16_t           status_word
184);
185
186uint16_t         read_and_clear_irq();
187
188/*
189 * FPGA.c
190 */
191void initialize_PCI_bridge ();
192
193/* flash.c */
194
195unsigned int SCORE603e_FLASH_Disable(
196  uint32_t                       unused
197);
198unsigned int SCORE603e_FLASH_verify_enable();
199unsigned int SCORE603e_FLASH_Enable_writes(
200  uint32_t                       area        /* Unused  */
201);
202
203#define BSP_FLASH_ENABLE_WRITES( _area) SCORE603e_FLASH_Enable_writes( _area )
204#define BSP_FLASH_DISABLE_WRITES(_area) SCORE603e_FLASH_Disable( _area )
205
206#define Convert_Endian_32( _data ) \
207  ( ((_data&0x000000ff)<<24) | ((_data&0x0000ff00)<<8) |  \
208    ((_data&0x00ff0000)>>8)  | ((_data&0xff000000)>>24) )
209
210#define Convert_Endian_16( _data ) \
211  ( ((_data&0x00ff)<<8) | ((_data&0xff00)>>8) )
212
213#endif /* ASM */
214
215#ifdef __cplusplus
216}
217#endif
218
219#endif
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