source: rtems/c/src/lib/libbsp/powerpc/score603e/include/bsp.h @ 31a5ec8

4.9
Last change on this file since 31a5ec8 was 31a5ec8, checked in by Jennifer Averett <Jennifer.Averett@…>, on 05/05/09 at 16:18:06

2009-05-05 Jennifer Averett <jennifer.averett@…>

  • Makefile.am, README, configure.ac, preinstall.am, PCI_bus/PCI.c, PCI_bus/PCI.h, PCI_bus/flash.c, PCI_bus/universe.c, console/85c30.c, console/85c30.h, console/console.c, console/consolebsp.h, console/tbl85c30.c, include/bsp.h, include/coverhd.h, include/gen2.h, include/irq-config.h, include/tm27.h, irq/FPGA.c, irq/irq.h, irq/irq_init.c, start/start.S, startup/Hwr_init.c, startup/bspstart.c, timer/timer.c, tod/tod.c: Updated and tested with the latest powerpc isr source
  • irq/no_pic.c: New file.
  • irq/irq.c, startup/genpvec.c, startup/setvec.c, startup/vmeintr.c: Removed.
  • Property mode set to 100644
File size: 4.6 KB
RevLine 
[9c448e1]1/*  bsp.h
2 *
3 *  This include file contains all board IO definitions.
4 *
[31a5ec8]5 *  COPYRIGHT (c) 1989-2009.
[9c448e1]6 *  On-Line Applications Research Corporation (OAR).
7 *
[31a5ec8]8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
[b14e2f2]10 *  http://www.rtems.com/license/LICENSE.
[9c448e1]11 *
12 *  $Id$
13 */
14
[34c4852]15#ifndef _BSP_H
16#define _BSP_H
[9c448e1]17
18#ifdef __cplusplus
19extern "C" {
20#endif
21
[31a5ec8]22#define BSP_ZERO_WORKSPACE_AUTOMATICALLY TRUE
23
[d4f9cef5]24#include <bspopts.h>
[bb41881e]25#include <rtems.h>
26#include <rtems/console.h>
27#include <libcpu/io.h>
28#include <rtems/clockdrv.h>
29#include <bsp/vectors.h>
[d4f9cef5]30
[df49c60]31/*
32 *  confdefs.h overrides for this BSP:
33 *   - termios serial ports (defaults to 1)
34 *   - Interrupt stack space is not minimum if defined.
35 */
36
37#if (HAS_PMC_PSC8)
38#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4 + 4)
39#else
40#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4)
41#endif
[6128a4a]42
[9c448e1]43#ifdef ASM
44/* Definition of where to store registers in alignment handler */
45#define ALIGN_REGS 0x0140
46
47#else
48#include <rtems.h>
[1c54724]49#include <rtems/console.h>
50#include <rtems/clockdrv.h>
51#include <rtems/iosupp.h>
[9c448e1]52
[f5e7b4c3]53/*
54 *  We no longer support the first generation board.
55 */
[9c448e1]56
57#include <gen2.h>
[31a5ec8]58#include <bsp/irq.h>
[9c448e1]59
60/*
61 * The following macro calculates the Baud constant. For the Z8530 chip.
62 *
63 * Note: baud constant = ((clock frequency / Clock_X) / (2 * Baud Rate)) - 2
64 *       for the Score603e ((10,000,000 / 16) / (2 * Baud Rate)) - 2
65 */
66#define _Score603e_Z8530_Baud( _frequency, _clock_by, _baud_rate  )   \
67  ( (_frequency /( _clock_by * 2 * _baud_rate))  - 2)
68
69#define Score603e_Z8530_Chip1_Baud( _value ) \
70  _Score603e_Z8530_Baud( SCORE603E_85C30_1_CLOCK, \
[6128a4a]71     SCORE603E_85C30_1_CLOCK_X, _value )
[9c448e1]72
73#define Score603e_Z8530_Chip0_Baud( _value ) \
74  _Score603e_Z8530_Baud( SCORE603E_85C30_0_CLOCK, \
[6128a4a]75     SCORE603E_85C30_0_CLOCK_X, _value )
[9c448e1]76
77#define Initialize_Board_ctrl_register()                         \
78  *SCORE603E_BOARD_CTRL_REG = (*SCORE603E_BOARD_CTRL_REG |       \
[f309cda]79                               SCORE603E_BRD_FLASH_DISABLE_MASK)
80
81#define Processor_Synchronize() \
[978eba3]82  asm volatile(" eieio ")
[f309cda]83
[9c448e1]84
85/* Constants */
86
87/*
88 *  Device Driver Table Entries
89 */
[6128a4a]90
[9c448e1]91/*
92 * NOTE: Use the standard Console driver entry
93 */
[6128a4a]94
[9c448e1]95/*
96 * NOTE: Use the standard Clock driver entry
97 */
[6128a4a]98
[9c448e1]99/*
100 *  Information placed in the linkcmds file.
101 */
102
103extern int   RAM_START;
104extern int   RAM_END;
105extern int   RAM_SIZE;
106
107extern int   PROM_START;
108extern int   PROM_END;
109extern int   PROM_SIZE;
110
111extern int   CLOCK_SPEED;
112extern int   CPU_PPC_CLICKS_PER_MS;
113
114extern int   end;        /* last address in the program */
115
116/*
117 * How many libio files we want
118 */
[6128a4a]119
[9c448e1]120#define BSP_LIBIO_MAX_FDS       20
121
122/* functions */
123
124void bsp_start( void );
125
126void bsp_cleanup( void );
127
128rtems_isr_entry set_vector(                    /* returns old vector */
129  rtems_isr_entry     handler,                  /* isr routine        */
130  rtems_vector_number vector,                   /* vector number      */
131  int                 type                      /* RTEMS or RAW intr  */
132);
133
[6128a4a]134/*
[9c448e1]135 * genvec.c
136 */
137rtems_isr_entry  set_EE_vector(
138  rtems_isr_entry     handler,                  /* isr routine        */
139  rtems_vector_number vector                    /* vector number      */
140);
141void initialize_external_exception_vector ();
142
143/*
144 * console.c
145 */
146void BSP_fatal_return( void );
147
148/*
149 * Hwr_init.c
150 */
151void init_PCI();
152void instruction_cache_enable ();
153void data_cache_enable ();
154
155void initialize_PCI_bridge ();
[dac4208]156uint16_t         read_and_clear_irq ();
[9c448e1]157void set_irq_mask(
[dac4208]158  uint16_t         value
[9c448e1]159);
[dac4208]160uint16_t         get_irq_mask();
[9c448e1]161
162/*
163 * universe.c
164 */
165void initialize_universe();
166
167void set_irq_mask(
[dac4208]168  uint16_t         value
[9c448e1]169);
170
[dac4208]171uint16_t         get_irq_mask();
[9c448e1]172
[6128a4a]173void unmask_irq(
[dac4208]174  uint16_t         irq_idx
[9c448e1]175);
176
[31a5ec8]177void mask_irq(
178  uint16_t         irq_idx
179);
180
[9c448e1]181void init_irq_data_register();
182
[dac4208]183uint16_t         read_and_clear_PMC_irq(
184  uint16_t            irq
[9c448e1]185);
186
[40e7ae2]187bool Is_PMC_IRQ(
[dac4208]188  uint32_t           pmc_irq,
189  uint16_t           status_word
[9c448e1]190);
191
[dac4208]192uint16_t         read_and_clear_irq();
[9c448e1]193
194/*
195 * FPGA.c
196 */
197void initialize_PCI_bridge ();
198
199/* flash.c */
200
201unsigned int SCORE603e_FLASH_Disable(
[dac4208]202  uint32_t                       unused
[9c448e1]203);
204unsigned int SCORE603e_FLASH_verify_enable();
205unsigned int SCORE603e_FLASH_Enable_writes(
[dac4208]206  uint32_t                       area        /* Unused  */
[9c448e1]207);
208
[f309cda]209#define BSP_FLASH_ENABLE_WRITES( _area) SCORE603e_FLASH_Enable_writes( _area )
210#define BSP_FLASH_DISABLE_WRITES(_area) SCORE603e_FLASH_Disable( _area )
211
[9c448e1]212#define Convert_Endian_32( _data ) \
213  ( ((_data&0x000000ff)<<24) | ((_data&0x0000ff00)<<8) |  \
214    ((_data&0x00ff0000)>>8)  | ((_data&0xff000000)>>24) )
215
216#define Convert_Endian_16( _data ) \
217  ( ((_data&0x00ff)<<8) | ((_data&0xff00)>>8) )
218
219#endif /* ASM */
220
221#ifdef __cplusplus
222}
223#endif
224
225#endif
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