source: rtems/c/src/lib/libbsp/powerpc/score603e/console/tbl85c30.c @ 6128a4a

4.104.114.84.95
Last change on this file since 6128a4a was 6128a4a, checked in by Ralf Corsepius <ralf.corsepius@…>, on 04/21/04 at 10:43:04

Remove stray white spaces.

  • Property mode set to 100644
File size: 4.8 KB
Line 
1 /*
2 *  This file contains the table for the z85c30 port
3 *  used by the console driver.
4 *
5 *  COPYRIGHT (c) 1989-1997.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
10 *  http://www.rtems.com/license/LICENSE.
11 *
12 *  $Id:
13 */
14
15#include "consolebsp.h"
16#include <bsp.h>
17
18#define CONSOLE_DEFAULT_BAUD_RATE            9600
19#define CONSOLE_DEFAULT_BAUD_CONSTANT        Score603e_Z8530_Chip0_Baud(9600)
20
21#define CONSOLE_DEFAULT_STOP_BITS            CONSOLE_STOP_BITS_1
22#define CONSOLE_DEFAULT_PARITY               CONSOLE_PARITY_NONE
23#define CONSOLE_DEFAULT_READ_CHARACTER_BITS  CONSOLE_CHARACTER_BITS_8
24#define CONSOLE_DEFAULT_WRITE_CHARACTER_BITS CONSOLE_CHARACTER_BITS_8
25#define CONSOLE_DEFAULT_CONSOLE_CLOCK        CONSOLE_x16_CLOCK
26
27
28#define DEFAULT_PROTOCOL  { CONSOLE_DEFAULT_BAUD_RATE,              \
29                            CONSOLE_DEFAULT_STOP_BITS,              \
30                            CONSOLE_DEFAULT_PARITY,                 \
31                            CONSOLE_DEFAULT_READ_CHARACTER_BITS,    \
32                            CONSOLE_DEFAULT_WRITE_CHARACTER_BITS }
33
34/*
35 * Tables of information necessary to use the console 85c30 routines.
36 */
37Console_Protocol Protocols_85c30 [ NUM_Z85C30_PORTS ] =
38{
39  DEFAULT_PROTOCOL,
40  DEFAULT_PROTOCOL,
41  DEFAULT_PROTOCOL,
42  DEFAULT_PROTOCOL,
43
44#if (HAS_PMC_PSC8)
45  DEFAULT_PROTOCOL,
46  DEFAULT_PROTOCOL,
47  DEFAULT_PROTOCOL,
48  DEFAULT_PROTOCOL,
49  DEFAULT_PROTOCOL,
50  DEFAULT_PROTOCOL,
51  DEFAULT_PROTOCOL,
52  DEFAULT_PROTOCOL,
53#endif
54};
55
56/*
57 * Table of chip unique information for each chip.
58 * See consolebsp.h for the Chip_85C30_info structure defination.
59 */
60Chip_85C30_info Chips_85C30 [ NUM_Z85C30_CHIPS ] =
61{
62  {
63    SCORE603E_85C30_0_IRQ,
64    SCORE603E_85C30_0_CLOCK,
65    SCORE603E_85C30_0_CLOCK_X,
66    CONSOLE_DEFAULT_CONSOLE_CLOCK
67  },
68  {
69    SCORE603E_85C30_1_IRQ,
70    SCORE603E_85C30_1_CLOCK,
71    SCORE603E_85C30_1_CLOCK_X,
72    CONSOLE_DEFAULT_CONSOLE_CLOCK
73  },
74
75#if (HAS_PMC_PSC8)
76  {
77    SCORE603E_85C30_2_IRQ,
78    SCORE603E_85C30_2_CLOCK,
79    SCORE603E_85C30_2_CLOCK_X,
80    CONSOLE_DEFAULT_CONSOLE_CLOCK
81  },
82  {
83    SCORE603E_85C30_3_IRQ,
84    SCORE603E_85C30_3_CLOCK,
85    SCORE603E_85C30_3_CLOCK_X,
86    CONSOLE_DEFAULT_CONSOLE_CLOCK
87  },
88  {
89    SCORE603E_85C30_4_IRQ,
90    SCORE603E_85C30_4_CLOCK,
91    SCORE603E_85C30_4_CLOCK_X,
92    CONSOLE_DEFAULT_CONSOLE_CLOCK
93  },
94  {
95    SCORE603E_85C30_5_IRQ,
96    SCORE603E_85C30_5_CLOCK,
97    SCORE603E_85C30_5_CLOCK_X,
98    CONSOLE_DEFAULT_CONSOLE_CLOCK
99  },
100#endif
101
102};
103
104/*
105 * Table of port unique information for each port.
106 * See consolebsp.h for the Port_85C30_info structure defination.
107 */
108const Port_85C30_info Ports_85C30 [ NUM_Z85C30_PORTS ] = {
109  {
110    (volatile unsigned char *) SCORE603E_85C30_CTRL_0,
111    (volatile unsigned char *) SCORE603E_85C30_DATA_0,
112    0x00,
113    &Protocols_85c30[0],
114    &Chips_85C30[0],
115  },
116  {
117    (volatile unsigned char *) SCORE603E_85C30_CTRL_1,
118    (volatile unsigned char *) SCORE603E_85C30_DATA_1,
119    0x01,
120    &Protocols_85c30[1],
121    &Chips_85C30[0],
122  },
123  {
124    (volatile unsigned char *) SCORE603E_85C30_CTRL_2,
125    (volatile unsigned char *) SCORE603E_85C30_DATA_2,
126    0x02,
127    &Protocols_85c30[2],
128    &Chips_85C30[1],
129  },
130  {
131    (volatile unsigned char *) SCORE603E_85C30_CTRL_3,
132    (volatile unsigned char *) SCORE603E_85C30_DATA_3,
133    0x03,
134    &Protocols_85c30[3],
135    &Chips_85C30[1],
136 },
137
138#if (HAS_PMC_PSC8)
139  {
140    (volatile unsigned char *) SCORE603E_85C30_CTRL_4,
141    (volatile unsigned char *) SCORE603E_85C30_DATA_4,
142    0x04,
143    &Protocols_85c30[4],
144    &Chips_85C30[2],
145 },
146 {
147    (volatile unsigned char *) SCORE603E_85C30_CTRL_5,
148    (volatile unsigned char *) SCORE603E_85C30_DATA_5,
149    0x05,
150    &Protocols_85c30[5],
151    &Chips_85C30[2],
152 },
153 {
154    (volatile unsigned char *) SCORE603E_85C30_CTRL_6,
155    (volatile unsigned char *) SCORE603E_85C30_DATA_6,
156    0x06,
157    &Protocols_85c30[6],
158    &Chips_85C30[3],
159 },
160 {
161    (volatile unsigned char *) SCORE603E_85C30_CTRL_7,
162    (volatile unsigned char *) SCORE603E_85C30_DATA_7,
163    0x07,
164    &Protocols_85c30[7],
165    &Chips_85C30[3],
166 },
167 {
168    (volatile unsigned char *) SCORE603E_85C30_CTRL_8,
169    (volatile unsigned char *) SCORE603E_85C30_DATA_8,
170    0x08,
171    &Protocols_85c30[8],
172    &Chips_85C30[4],
173 },
174 {
175    (volatile unsigned char *) SCORE603E_85C30_CTRL_9,
176    (volatile unsigned char *) SCORE603E_85C30_DATA_9,
177    0x09,
178    &Protocols_85c30[9],
179    &Chips_85C30[4],
180 },
181 {
182    (volatile unsigned char *) SCORE603E_85C30_CTRL_10,
183    (volatile unsigned char *) SCORE603E_85C30_DATA_10,
184    0x0a,
185    &Protocols_85c30[10],
186    &Chips_85C30[5],
187 },
188 {
189    (volatile unsigned char *) SCORE603E_85C30_CTRL_11,
190    (volatile unsigned char *) SCORE603E_85C30_DATA_11,
191    0x0b,
192    &Protocols_85c30[11],
193    &Chips_85C30[5],
194 },
195#endif
196};
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