1 | /* consolebsp.h |
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2 | * |
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3 | * This include file contains all console driver definations |
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4 | * |
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5 | * COPYRIGHT (c) 1989-2009. |
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6 | * On-Line Applications Research Corporation (OAR). |
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7 | * |
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8 | * The license and distribution terms for this file may be |
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9 | * found in the file LICENSE in this distribution or at |
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10 | * http://www.rtems.com/license/LICENSE. |
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11 | * |
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12 | * $Id$ |
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13 | */ |
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14 | |
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15 | #ifndef __CONSOLEBSP_H |
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16 | #define __CONSOLEBSP_H |
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17 | |
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18 | #include <rtems.h> |
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19 | #include <rtems/ringbuf.h> |
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20 | #include <bsp.h> |
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21 | |
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22 | #ifdef __cplusplus |
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23 | extern "C" { |
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24 | #endif |
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25 | |
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26 | /* |
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27 | * |
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28 | * Note: The Ports are numbered 0..NUM_Z85C30_CHIPS with port 0 and 1 |
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29 | * being on the first chip, and ports 2 and 3 being on the |
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30 | * second chip... |
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31 | */ |
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32 | |
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33 | /* |
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34 | * Z85c30 configuration informaiton. |
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35 | */ |
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36 | |
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37 | #if (HAS_PMC_PSC8) |
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38 | #warning "HAS_PMC_PSC8 is Defined" |
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39 | #define NUM_Z85C30_CHIPS_ON_MEZZANINE 4 |
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40 | #else |
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41 | #define NUM_Z85C30_CHIPS_ON_MEZZANINE 0 |
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42 | #endif |
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43 | |
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44 | #define NUM_Z85C30_CHIPS (2 + NUM_Z85C30_CHIPS_ON_MEZZANINE) |
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45 | #define NUM_Z85C30_PORTS (NUM_Z85C30_CHIPS * 2) |
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46 | |
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47 | typedef enum { |
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48 | CONSOLE_x1_CLOCK, |
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49 | CONSOLE_x16_CLOCK, |
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50 | CONSOLE_x32_CLOCK, |
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51 | CONSOLE_x64_CLOCK, |
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52 | } CONSOLE_Clock_speed; |
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53 | |
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54 | typedef enum { |
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55 | CONSOLE_STOP_BITS_1, |
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56 | CONSOLE_STOP_BITS_1_AND_A_HALF, |
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57 | CONSOLE_STOP_BITS_2, |
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58 | } CONSOLE_Stop_bits; |
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59 | |
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60 | typedef enum { |
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61 | CONSOLE_PARITY_NONE, |
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62 | CONSOLE_PARITY_ODD, |
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63 | CONSOLE_PARITY_EVEN, |
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64 | } CONSOLE_Parity; |
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65 | |
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66 | typedef enum { |
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67 | CONSOLE_CHARACTER_BITS_8, |
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68 | CONSOLE_CHARACTER_BITS_7, |
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69 | CONSOLE_CHARACTER_BITS_6, |
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70 | CONSOLE_CHARACTER_BITS_5, |
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71 | } CONSOLE_Character_bits; |
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72 | |
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73 | typedef struct { |
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74 | uint32_t baud_rate; /* baud rate value */ |
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75 | CONSOLE_Stop_bits stop_bits; |
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76 | CONSOLE_Parity parity; |
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77 | CONSOLE_Character_bits read_char_bits; |
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78 | CONSOLE_Character_bits write_char_bits; |
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79 | |
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80 | #if CONSOLE_USE_INTERRUPTS |
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81 | volatile Ring_buffer_t TX_Buffer; /* Transmit Buffer */ |
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82 | volatile bool Is_TX_active; /* Transmitting */ |
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83 | void *console_termios_data; |
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84 | #endif |
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85 | |
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86 | } Console_Protocol; |
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87 | |
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88 | /* |
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89 | * Structure used for chip level information. |
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90 | */ |
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91 | typedef struct { |
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92 | uint32_t vector; |
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93 | uint32_t clock_frequency; |
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94 | uint16_t clock_x; |
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95 | CONSOLE_Clock_speed clock_speed; |
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96 | } Chip_85C30_info; |
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97 | |
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98 | /* |
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99 | * Structure used for port level informaiton. |
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100 | */ |
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101 | typedef struct { |
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102 | |
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103 | volatile unsigned char *ctrl; /* Port Ctrl byte */ |
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104 | volatile unsigned char *data; /* Port data byte */ |
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105 | |
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106 | unsigned char port; /* Port-id / minor # */ |
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107 | |
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108 | Console_Protocol *Protocol; |
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109 | Chip_85C30_info *Chip; /* Chip specific info */ |
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110 | |
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111 | } Port_85C30_info; |
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112 | |
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113 | /* |
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114 | * Console port chip configuration tables. |
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115 | */ |
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116 | extern Chip_85C30_info Chips_85C30 [ NUM_Z85C30_CHIPS ]; |
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117 | extern const Port_85C30_info Ports_85C30 [ NUM_Z85C30_PORTS ]; |
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118 | |
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119 | /* |
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120 | * 85c30.c prototypes. |
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121 | */ |
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122 | void initialize_85c30_port( |
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123 | const Port_85C30_info *Port |
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124 | ); |
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125 | |
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126 | void outbyte_polled_85c30( |
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127 | volatile unsigned char *csr, /* IN */ |
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128 | char ch |
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129 | ); |
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130 | |
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131 | int inbyte_nonblocking_85c30( |
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132 | const Port_85C30_info *Port |
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133 | ); |
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134 | |
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135 | void Reset_85c30_chip( |
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136 | volatile unsigned char *ctrl_0, |
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137 | volatile unsigned char *ctrl_1 |
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138 | ); |
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139 | |
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140 | #if CONSOLE_USE_INTERRUPTS |
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141 | rtems_isr ISR_85c30_Async( |
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142 | const Port_85C30_info *Port |
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143 | ); |
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144 | #endif |
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145 | #ifdef __cplusplus |
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146 | } |
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147 | #endif |
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148 | |
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149 | #endif |
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