source: rtems/c/src/lib/libbsp/powerpc/score603e/console/consolebsp.h @ 31a5ec8

4.9
Last change on this file since 31a5ec8 was 31a5ec8, checked in by Jennifer Averett <Jennifer.Averett@…>, on May 5, 2009 at 4:18:06 PM

2009-05-05 Jennifer Averett <jennifer.averett@…>

  • Makefile.am, README, configure.ac, preinstall.am, PCI_bus/PCI.c, PCI_bus/PCI.h, PCI_bus/flash.c, PCI_bus/universe.c, console/85c30.c, console/85c30.h, console/console.c, console/consolebsp.h, console/tbl85c30.c, include/bsp.h, include/coverhd.h, include/gen2.h, include/irq-config.h, include/tm27.h, irq/FPGA.c, irq/irq.h, irq/irq_init.c, start/start.S, startup/Hwr_init.c, startup/bspstart.c, timer/timer.c, tod/tod.c: Updated and tested with the latest powerpc isr source
  • irq/no_pic.c: New file.
  • irq/irq.c, startup/genpvec.c, startup/setvec.c, startup/vmeintr.c: Removed.
  • Property mode set to 100644
File size: 3.2 KB
Line 
1/*  consolebsp.h
2 *
3 *  This include file contains all console driver definations
4 *
5 *  COPYRIGHT (c) 1989-2009.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
10 *  http://www.rtems.com/license/LICENSE.
11 *
12 *  $Id$
13 */
14
15#ifndef __CONSOLEBSP_H
16#define __CONSOLEBSP_H
17
18#include <rtems.h>
19#include <rtems/ringbuf.h>
20#include <bsp.h>
21
22#ifdef __cplusplus
23extern "C" {
24#endif
25
26/*
27 *
28 * Note:  The Ports are numbered 0..NUM_Z85C30_CHIPS with port 0 and 1
29 *        being on the first chip, and ports 2 and 3 being on the
30 *        second chip...
31 */
32
33/*
34 * Z85c30 configuration informaiton.
35 */
36
37#if (HAS_PMC_PSC8)
38#warning "HAS_PMC_PSC8 is Defined"
39#define NUM_Z85C30_CHIPS_ON_MEZZANINE  4
40#else
41#define NUM_Z85C30_CHIPS_ON_MEZZANINE  0
42#endif
43
44#define NUM_Z85C30_CHIPS       (2 + NUM_Z85C30_CHIPS_ON_MEZZANINE)
45#define NUM_Z85C30_PORTS       (NUM_Z85C30_CHIPS * 2)
46
47typedef enum {
48  CONSOLE_x1_CLOCK,
49  CONSOLE_x16_CLOCK,
50  CONSOLE_x32_CLOCK,
51  CONSOLE_x64_CLOCK,
52} CONSOLE_Clock_speed;
53
54typedef enum {
55  CONSOLE_STOP_BITS_1,
56  CONSOLE_STOP_BITS_1_AND_A_HALF,
57  CONSOLE_STOP_BITS_2,
58} CONSOLE_Stop_bits;
59
60typedef enum {
61  CONSOLE_PARITY_NONE,
62  CONSOLE_PARITY_ODD,
63  CONSOLE_PARITY_EVEN,
64} CONSOLE_Parity;
65
66typedef enum {
67  CONSOLE_CHARACTER_BITS_8,
68  CONSOLE_CHARACTER_BITS_7,
69  CONSOLE_CHARACTER_BITS_6,
70  CONSOLE_CHARACTER_BITS_5,
71} CONSOLE_Character_bits;
72
73typedef struct {
74  uint32_t                baud_rate;         /* baud rate value */
75  CONSOLE_Stop_bits        stop_bits;
76  CONSOLE_Parity           parity;
77  CONSOLE_Character_bits   read_char_bits;
78  CONSOLE_Character_bits   write_char_bits;
79
80#if CONSOLE_USE_INTERRUPTS
81  volatile Ring_buffer_t  TX_Buffer;         /* Transmit Buffer    */
82  volatile bool           Is_TX_active;      /* Transmitting       */
83  void          *console_termios_data;
84#endif
85
86} Console_Protocol;
87
88/*
89 * Structure used for chip level information.
90 */
91typedef struct {
92  uint32_t               vector;
93  uint32_t               clock_frequency;
94  uint16_t               clock_x;
95  CONSOLE_Clock_speed     clock_speed;
96} Chip_85C30_info;
97
98/*
99 * Structure used for port level informaiton.
100 */
101typedef struct {
102
103  volatile unsigned char    *ctrl;           /* Port Ctrl byte     */
104  volatile unsigned char    *data;           /* Port data byte     */
105
106  unsigned char              port;          /* Port-id / minor #  */
107
108  Console_Protocol          *Protocol;
109  Chip_85C30_info           *Chip;           /* Chip specific info */
110
111} Port_85C30_info;
112
113/*
114 * Console port chip configuration tables.
115 */
116extern Chip_85C30_info Chips_85C30 [ NUM_Z85C30_CHIPS ];
117extern const Port_85C30_info Ports_85C30 [ NUM_Z85C30_PORTS ];
118
119/*
120 *  85c30.c prototypes.
121 */
122void initialize_85c30_port(
123  const Port_85C30_info *Port
124);
125
126void outbyte_polled_85c30(
127  volatile unsigned char  *csr,                     /* IN  */
128  char ch
129);
130
131int inbyte_nonblocking_85c30(
132  const Port_85C30_info      *Port
133);
134
135void Reset_85c30_chip(
136  volatile unsigned char *ctrl_0,
137  volatile unsigned char *ctrl_1
138);
139
140#if CONSOLE_USE_INTERRUPTS
141rtems_isr ISR_85c30_Async(
142   const Port_85C30_info   *Port
143);
144#endif
145#ifdef __cplusplus
146}
147#endif
148
149#endif
Note: See TracBrowser for help on using the repository browser.