source: rtems/c/src/lib/libbsp/powerpc/score603e/configure.ac @ c00b49f8

4.104.115
Last change on this file since c00b49f8 was 6b2b37d2, checked in by Ralf Corsepius <ralf.corsepius@…>, on 09/15/09 at 14:45:47

2009-09-15 Ralf Corsépius <ralf.corsepius@…>

  • configure.ac: Remove RTEMS_BSP_BOOTCARD_OPTIONS.
  • Property mode set to 100644
File size: 2.5 KB
Line 
1## Process this file with autoconf to produce a configure script.
2##
3## $Id$
4
5AC_PREREQ(2.60)
6AC_INIT([rtems-c-src-lib-libbsp-powerpc-ep1a],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla])
7AC_CONFIG_SRCDIR([bsp_specs])
8RTEMS_TOP(../../../../../..)
9
10RTEMS_CANONICAL_TARGET_CPU
11AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.10])
12RTEMS_BSP_CONFIGURE
13
14RTEMS_PROG_CC_FOR_TARGET([-ansi -fasm])
15RTEMS_CANONICALIZE_TOOLS
16RTEMS_PROG_CCAS
17
18## FIXME: This should be a 1 out of 3 selection
19## and is somehow coupled to USE_DINK (cf. include/gen2.h)
20RTEMS_BSPOPTS_SET([SCORE603E_USE_SDS],[*],[0])
21RTEMS_BSPOPTS_HELP([SCORE603E_USE_SDS],
22[use SDS ROM monitor])
23
24RTEMS_BSPOPTS_SET([SCORE603E_OPEN_FIRMWARE],[*],[0])
25RTEMS_BSPOPTS_HELP([SCORE603E_OPEN_FIRMWARE],
26[use Open Firmware ROM monitor])
27
28RTEMS_BSPOPTS_SET([SCORE603E_USE_NONE],[*],[0])
29RTEMS_BSPOPTS_HELP([SCORE603E_USE_NONE],
30[use no ROM monitor])
31
32RTEMS_BSPOPTS_SET([SCORE603E_USE_DINK],[*],[1])
33RTEMS_BSPOPTS_HELP([SCORE603E_USE_DINK],
34[FIXME: Missing explanation.])
35
36RTEMS_BSPOPTS_SET([CONSOLE_USE_INTERRUPTS],[*],[0])
37RTEMS_BSPOPTS_HELP([CONSOLE_USE_INTERRUPTS],
38[whether using console interrupts])
39
40RTEMS_BSPOPTS_SET([HAS_PMC_PSC8],[*],[0])
41RTEMS_BSPOPTS_HELP([HAS_PMC_PSC8],
42[whether has a PSC8 PMC board attached to PMC slot])
43
44RTEMS_BSPOPTS_SET([INITIALIZE_COM_PORTS],[*],[0])
45RTEMS_BSPOPTS_HELP([INITIALIZE_COM_PORTS],
46[FIXME: Missing explanation])
47
48RTEMS_BSPOPTS_SET([PPC_USE_SPRG],[*],[0])
49RTEMS_BSPOPTS_HELP([PPC_USE_SPRG],
50[If defined, then the PowerPC specific code in RTEMS will use some
51of the special purpose registers to slightly optimize interrupt
52response time.  The use of these registers can conflict with
53other tools like debuggers.])
54
55RTEMS_BSPOPTS_SET([PPC_USE_DATA_CACHE],[*],[0])
56RTEMS_BSPOPTS_HELP([PPC_USE_DATA_CACHE],
57[If defined, then the PowerPC specific code in RTEMS will use
58 data cache instructions to optimize the context switch code.
59 This code can conflict with debuggers or emulators.  It is known
60 to break the Corelis PowerPC emulator with at least some combinations
61 of PowerPC 603e revisions and emulator versions.
62 The BSP actually contains the call that enables this.])
63
64RTEMS_BSPOPTS_SET([PPC_VECTOR_FILE_BASE],[*],[0x0100])
65RTEMS_BSPOPTS_HELP([PPC_VECTOR_FILE_BASE],
66[This defines the base address of the exception table.
67 NOTE: Vectors are actually at 0xFFF00000 but file starts at offset.])
68
69RTEMS_CHECK_NETWORKING
70AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
71
72RTEMS_BSP_CLEANUP_OPTIONS(0, 0)
73
74# Explicitly list all Makefiles here
75AC_CONFIG_FILES([Makefile])
76
77RTEMS_PPC_EXCEPTIONS
78
79AC_OUTPUT
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