source: rtems/c/src/lib/libbsp/powerpc/score603e/README @ 31a5ec8

4.9
Last change on this file since 31a5ec8 was 31a5ec8, checked in by Jennifer Averett <Jennifer.Averett@…>, on 05/05/09 at 16:18:06

2009-05-05 Jennifer Averett <jennifer.averett@…>

  • Makefile.am, README, configure.ac, preinstall.am, PCI_bus/PCI.c, PCI_bus/PCI.h, PCI_bus/flash.c, PCI_bus/universe.c, console/85c30.c, console/85c30.h, console/console.c, console/consolebsp.h, console/tbl85c30.c, include/bsp.h, include/coverhd.h, include/gen2.h, include/irq-config.h, include/tm27.h, irq/FPGA.c, irq/irq.h, irq/irq_init.c, start/start.S, startup/Hwr_init.c, startup/bspstart.c, timer/timer.c, tod/tod.c: Updated and tested with the latest powerpc isr source
  • irq/no_pic.c: New file.
  • irq/irq.c, startup/genpvec.c, startup/setvec.c, startup/vmeintr.c: Removed.
  • Property mode set to 100644
File size: 1.4 KB
Line 
1#
2#  $Id$
3#
4
5BSP NAME:           score603e
6BOARD:              VISTA SCORE 603e Generation II and beyond
7BUS:                N/A
8CPU FAMILY:         ppc
9CPU:                PowerPC 603e
10COPROCESSORS:       N/A
11MODE:               32 bit mode
12
13DEBUG MONITOR:      see note.
14
15PERIPHERALS
16===========
17TIMERS:             PPC internal Timebase register
18  RESOLUTION:         
19SERIAL PORTS:       2 Z85C30s
20REAL-TIME CLOCK:    Generation II and beyond: ICM7170AIBG
21DMA:                none
22VIDEO:              none
23SCSI:               none
24NETWORKING:         none
25MEZZANINE CARD      optional with HAS_PMC_PSC8
26                    4 Z85C30s
27                    ACE1553
28
29DRIVER INFORMATION
30==================
31CLOCK DRIVER:       PPC internal
32IOSUPP DRIVER:      N/A
33SHMSUPP:            N/A
34TIMER DRIVER:       PPC internal
35TTY DRIVER:         PPC internal
36
37STDIO
38=====
39PORT:               Console port 0
40ELECTRICAL:         na
41BAUD:               9600
42BITS PER CHARACTER: 8
43PARITY:             n
44STOP BITS:          1
45
46Notes
47=====
48This BSP has been modified to use the latest exception model.
49The modifications were verified.
50
51This BSP has been tested using DINK Rom monitor.  There have
52been three rom chips loaded on the boards.  One with the SDS
53debug monitor, one with the firmworks monitor, and one with
54the DINK monitor.
55
56The SCORE603e first generation board is no longer available,
57does not appear to be in use by any RTEMS users, and thus
58is no longer supported.
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