source: rtems/c/src/lib/libbsp/powerpc/score603e/PCI_bus/flash.c @ d4ab6611

4.11
Last change on this file since d4ab6611 was d4ab6611, checked in by Joel Sherrill <joel.sherrill@…>, on Oct 15, 2014 at 7:21:20 PM

powerpc/score603e: Fix warnings

  • Property mode set to 100644
File size: 2.5 KB
Line 
1/*
2 *  COPYRIGHT (c) 1989-2009.
3 *  On-Line Applications Research Corporation (OAR).
4 *
5 *  The license and distribution terms for this file may be
6 *  found in the file LICENSE in this distribution or at
7 *  http://www.rtems.org/license/LICENSE.
8 */
9
10#include <rtems.h>
11#include <assert.h>
12#include <stdio.h>
13#include <inttypes.h>
14
15#include <bsp.h>
16#include <bsp/irq.h>
17#include "PCI.h"
18
19/*
20 *  SCORE603e_FLASH_Disable
21 */
22unsigned int SCORE603e_FLASH_Disable(
23  uint32_t        area
24)
25{
26  uint8_t         value;
27
28  value = *SCORE603E_BOARD_CTRL_REG;
29  value = value | (~SCORE603E_BRD_FLASH_DISABLE_MASK);
30  *SCORE603E_BOARD_CTRL_REG = value;
31
32  return RTEMS_SUCCESSFUL;
33}
34
35unsigned int SCORE603e_FLASH_verify_enable( void )
36{
37  volatile uint8_t         *Ctrl_Status_Register =
38           (void *)SCORE603E_BOARD_CTRL_REG;
39  uint8_t          ctrl_value;
40  uint32_t         pci_value;
41
42  ctrl_value = *Ctrl_Status_Register;
43  if ( ctrl_value & SCORE603E_BRD_FLASH_DISABLE_MASK ) {
44    printf ("Flash Writes Disabled by board control register %x\n",
45            ctrl_value );
46    assert( 0x0 );
47  }
48
49  pci_value = Read_pci_device_register( 0x800000A8 );
50  if (( pci_value & 0x00001000 ) == 0) {
51    printf("Error PCI A8 \n");
52    assert( 0x0 );
53  }
54
55  pci_value = Read_pci_device_register( 0x800000AC );
56  if ( pci_value & 0x02000000) {
57    printf("Error PCI AC \n");
58    assert( 0x0 );
59  }
60  return RTEMS_SUCCESSFUL;
61}
62
63#if 0
64unsigned int SCORE603e_FLASH_pci_reset_reg(
65  uint8_t          reg,
66  uint32_t         cmask,
67  uint32_t         mask
68)
69{
70  uint32_t         pci_value;
71  uint32_t         value;
72
73  pci_value = Read_pci_device_register( reg );
74  pci_value &= cmask;
75  pci_value |= mask;
76  Write_pci_device_register( reg, pci_value );
77  value = Read_pci_device_register(  reg );
78  if (value != pci_value) {
79    printf("Error PCI 0x%2"PRIX8" wrote 0x%8"PRIX32" read %8"PRIX32"\n", reg, pci_value, value);
80  }
81  return RTEMS_SUCCESSFUL;
82}
83#endif
84
85/*
86 *  SCORE603e_FLASH_Enable_writes
87 */
88unsigned int SCORE603e_FLASH_Enable_writes(
89  uint32_t         area
90)
91{
92  uint8_t          ctrl_value;
93  uint32_t         pci_value;
94
95  ctrl_value = *SCORE603E_BOARD_CTRL_REG;
96  ctrl_value = ctrl_value & 0xbf;
97  *SCORE603E_BOARD_CTRL_REG = ctrl_value;
98
99  pci_value = Read_pci_device_register( 0x800000A8 );
100  pci_value |= 0x00001000;
101  Write_pci_device_register( 0x800000A8, pci_value );
102
103  pci_value = Read_pci_device_register( 0x800000AC );
104  pci_value &=  (~0x02000000);
105  Write_pci_device_register( 0x000000AC, pci_value );
106
107  return RTEMS_SUCCESSFUL;
108}
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