source: rtems/c/src/lib/libbsp/powerpc/score603e/PCI_bus/flash.c @ 1004c3c1

4.104.115
Last change on this file since 1004c3c1 was 1004c3c1, checked in by Joel Sherrill <joel.sherrill@…>, on 10/02/08 at 14:26:17

2008-10-02 Joel Sherrill <joel.sherrill@…>

  • PCI_bus/PCI.c, PCI_bus/PCI.h, PCI_bus/flash.c, console/85c30.h, console/console.c, console/consolebsp.h, console/tbl85c30.c, include/gen2.h, irq/FPGA.c, irq/irq.c, irq/irq.h, irq/irq_init.c, pci/no_host_bridge.c, startup/bspclean.c, startup/bspstart.c, startup/genpvec.c, startup/vmeintr.c: File head clean up.
  • Property mode set to 100644
File size: 2.5 KB
Line 
1/*
2 *
3 *  COPYRIGHT (c) 1989-2008
4 *  On-Line Applications Research Corporation (OAR).
5 * 
6 *  The license and distribution terms for this file may be
7 *  found in the file LICENSE in this distribution or at
8 *  http://www.rtems.com/license/LICENSE.
9 *
10 * $Id$
11 */
12
13#include <rtems.h>
14#include <assert.h>
15#include <stdio.h>
16
17#include <bsp.h>
18#include "PCI.h"
19/*PAGE
20 *
21 *  SCORE603e_FLASH_Disable
22 */
23
24unsigned int SCORE603e_FLASH_Disable(
25  uint32_t                       area                           /* IN  */
26)
27{
28  uint8_t         value;
29
30  value = *SCORE603E_BOARD_CTRL_REG;
31  value = value | (~SCORE603E_BRD_FLASH_DISABLE_MASK);
32  *SCORE603E_BOARD_CTRL_REG = value;
33
34  return RTEMS_SUCCESSFUL;
35}
36
37unsigned int SCORE603e_FLASH_verify_enable()
38{
39  volatile uint8_t         *Ctrl_Status_Register =
40           (void *)SCORE603E_BOARD_CTRL_REG;
41  uint8_t          ctrl_value;
42  uint32_t         pci_value;
43
44  ctrl_value = *Ctrl_Status_Register;
45  if ( ctrl_value & SCORE603E_BRD_FLASH_DISABLE_MASK ) {
46    printf ("Flash Writes Disabled by board control register %x\n",
47            ctrl_value );
48    assert( 0x0 );
49  }
50
51  pci_value = Read_pci_device_register( 0x800000A8 );
52  if (( pci_value & 0x00001000 ) == 0) {
53    printf("Error PCI A8 \n");
54    assert( 0x0 );
55  }
56
57  pci_value = Read_pci_device_register( 0x800000AC );
58  if ( pci_value & 0x02000000) {
59    printf("Error PCI AC \n");
60    assert( 0x0 );
61  }
62  return RTEMS_SUCCESSFUL;
63}
64
65unsigned int SCORE603e_FLASH_pci_reset_reg(
66  uint8_t          reg,
67  uint32_t         cmask,
68  uint32_t         mask
69)
70{
71  uint32_t         pci_value;
72  uint32_t         value;
73
74  pci_value = Read_pci_device_register( reg );
75  pci_value &= cmask;
76  pci_value |= mask;
77  Write_pci_device_register( reg, pci_value );
78  value = Read_pci_device_register(  reg );
79  if (value != pci_value) {
80    printf("Error PCI %x wrote %x read %x\n", reg, pci_value, value);
81  }
82  return RTEMS_SUCCESSFUL;
83}
84
85/*PAGE
86 *
87 *  SCORE603e_FLASH_Enable_writes
88 */
89unsigned int SCORE603e_FLASH_Enable_writes(
90  uint32_t                       area                           /* IN  */
91)
92{
93  uint8_t          ctrl_value;
94  uint32_t         pci_value;
95
96  ctrl_value = *SCORE603E_BOARD_CTRL_REG;
97  ctrl_value = ctrl_value & 0xbf;
98  *SCORE603E_BOARD_CTRL_REG = ctrl_value;
99
100  pci_value = Read_pci_device_register( 0x800000A8 );
101  pci_value |= 0x00001000;
102  Write_pci_device_register( 0x800000A8, pci_value );
103
104  pci_value = Read_pci_device_register( 0x800000AC );
105  pci_value &=  (~0x02000000);
106  Write_pci_device_register( 0x000000AC, pci_value );
107
108  return RTEMS_SUCCESSFUL;
109}
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