source: rtems/c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.h @ 42b6dd2a

4.104.11
Last change on this file since 42b6dd2a was 42b6dd2a, checked in by Jennifer Averett <Jennifer.Averett@…>, on May 5, 2009 at 4:24:04 PM

2009-05-05 Jennifer Averett <jennifer.averett@…>

  • Makefile.am, configure.ac, preinstall.am, PCI_bus/PCI.c, PCI_bus/PCI.h, PCI_bus/flash.c, PCI_bus/universe.c, console/85c30.c, console/85c30.h, console/console.c, console/consolebsp.h, console/tbl85c30.c, include/bsp.h, include/gen2.h, include/irq-config.h, include/tm27.h, irq/FPGA.c, irq/irq.h, irq/irq_init.c, start/start.S, startup/Hwr_init.c, startup/bspstart.c, startup/linkcmds, timer/timer.c, tod/tod.c, vme/VMEConfig.h: Updated and tested with latest interrupt source. Modified with latest memory allocation, but this needs testing.
  • irq/no_pic.c: New file.
  • Property mode set to 100644
File size: 735 bytes
Line 
1/*  PCI.h
2 *
3 *  This include file contains prototypes for chips attached to the
4 *  PCI bus.
5 *
6 *  COPYRIGHT (c) 1989-2009.
7 *  On-Line Applications Research Corporation (OAR).
8 *
9 *  The license and distribution terms for this file may be
10 *  found in the file LICENSE in this distribution or at
11 *  http://www.rtems.com/license/LICENSE.
12 *
13 *  $Id:
14 */
15#ifndef __PCI_h
16#define __PCI_h
17
18/*
19 * PCI.c
20 */
21
22void PCI_bus_write(
23  volatile uint32_t         * _addr,
24  uint32_t         _data
25);
26
27uint32_t         PCI_bus_read(
28  volatile uint32_t         *  _addr
29);
30
31uint32_t         Read_pci_device_register(
32  uint32_t         address
33);
34
35void  Write_pci_device_register(
36  uint32_t         address,
37  uint32_t         data
38);
39
40#endif
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