1 | /** |
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2 | * @file |
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3 | * |
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4 | * @ingroup QorIQMMU |
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5 | * |
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6 | * @brief MMU implementation. |
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7 | */ |
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8 | |
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9 | /* |
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10 | * Copyright (c) 2011, 2017 embedded brains GmbH. All rights reserved. |
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11 | * |
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12 | * embedded brains GmbH |
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13 | * Dornierstr. 4 |
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14 | * 82178 Puchheim |
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15 | * Germany |
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16 | * <rtems@embedded-brains.de> |
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17 | * |
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18 | * The license and distribution terms for this file may be |
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19 | * found in the file LICENSE in this distribution or at |
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20 | * http://www.rtems.org/license/LICENSE. |
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21 | */ |
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22 | |
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23 | #include <bsp.h> |
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24 | #include <bsp/bootcard.h> |
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25 | #include <bsp/fdt.h> |
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26 | #include <bsp/linker-symbols.h> |
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27 | #include <bsp/mmu.h> |
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28 | #include <bsp/qoriq.h> |
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29 | |
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30 | #include <sys/param.h> |
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31 | |
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32 | #include <libfdt.h> |
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33 | |
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34 | #include <rtems/config.h> |
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35 | |
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36 | #define TEXT __attribute__((section(".bsp_start_text"))) |
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37 | #define DATA __attribute__((section(".bsp_start_data"))) |
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38 | |
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39 | typedef struct { |
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40 | uint32_t begin; |
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41 | uint32_t size; |
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42 | uint32_t mas2; |
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43 | uint32_t mas3; |
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44 | uint32_t mas7; |
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45 | } entry; |
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46 | |
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47 | #define ENTRY_X(b, s) { \ |
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48 | .begin = (uint32_t) b, \ |
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49 | .size = (uint32_t) s, \ |
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50 | .mas2 = 0, \ |
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51 | .mas3 = FSL_EIS_MAS3_SR | FSL_EIS_MAS3_SX \ |
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52 | } |
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53 | |
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54 | #define ENTRY_R(b, s) { \ |
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55 | .begin = (uint32_t) b, \ |
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56 | .size = (uint32_t) s, \ |
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57 | .mas2 = 0, \ |
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58 | .mas3 = FSL_EIS_MAS3_SR \ |
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59 | } |
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60 | |
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61 | #ifdef RTEMS_SMP |
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62 | #define ENTRY_RW_MAS2 FSL_EIS_MAS2_M |
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63 | #else |
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64 | #define ENTRY_RW_MAS2 0 |
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65 | #endif |
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66 | |
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67 | #define ENTRY_RW(b, s) { \ |
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68 | .begin = (uint32_t) b, \ |
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69 | .size = (uint32_t) s, \ |
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70 | .mas2 = ENTRY_RW_MAS2, \ |
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71 | .mas3 = FSL_EIS_MAS3_SR | FSL_EIS_MAS3_SW \ |
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72 | } |
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73 | |
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74 | #define ENTRY_IO(b, s) { \ |
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75 | .begin = (uint32_t) b, \ |
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76 | .size = (uint32_t) s, \ |
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77 | .mas2 = FSL_EIS_MAS2_I | FSL_EIS_MAS2_G, \ |
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78 | .mas3 = FSL_EIS_MAS3_SR | FSL_EIS_MAS3_SW \ |
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79 | } |
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80 | |
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81 | #define ENTRY_DEV(b, s) { \ |
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82 | .begin = (uint32_t) b, \ |
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83 | .size = (uint32_t) s, \ |
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84 | .mas2 = FSL_EIS_MAS2_I | FSL_EIS_MAS2_G, \ |
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85 | .mas3 = FSL_EIS_MAS3_SR | FSL_EIS_MAS3_SW, \ |
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86 | .mas7 = QORIQ_MMU_DEVICE_MAS7 \ |
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87 | } |
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88 | |
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89 | /* |
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90 | * MMU entry for BMan and QMan software portals. |
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91 | * |
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92 | * The M bit must be set if stashing is used, see 3.3.8.6 DQRR Entry Stashing |
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93 | * and 3.3.8 Software Portals in T4240DPAARM. |
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94 | * |
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95 | * The G bit must be set, otherwise ECC errors in the QMan software portals |
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96 | * will occur. No documentation reference for this is available. |
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97 | */ |
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98 | #define ENTRY_DEV_CACHED(b, s) { \ |
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99 | .begin = (uint32_t) b, \ |
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100 | .size = (uint32_t) s, \ |
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101 | .mas2 = FSL_EIS_MAS2_M | FSL_EIS_MAS2_G, \ |
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102 | .mas3 = FSL_EIS_MAS3_SR | FSL_EIS_MAS3_SW, \ |
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103 | .mas7 = QORIQ_MMU_DEVICE_MAS7 \ |
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104 | } |
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105 | |
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106 | #define WORKSPACE_ENTRY_INDEX 0 |
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107 | |
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108 | static entry DATA config[] = { |
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109 | /* Must be first entry, see WORKSPACE_ENTRY_INDEX */ |
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110 | ENTRY_RW(bsp_section_work_begin, bsp_section_work_size), |
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111 | |
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112 | #if defined(RTEMS_MULTIPROCESSING) && \ |
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113 | defined(QORIQ_INTERCOM_AREA_BEGIN) && \ |
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114 | defined(QORIQ_INTERCOM_AREA_SIZE) |
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115 | { |
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116 | .begin = QORIQ_INTERCOM_AREA_BEGIN, |
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117 | .size = QORIQ_INTERCOM_AREA_SIZE, |
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118 | .mas2 = FSL_EIS_MAS2_M, |
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119 | .mas3 = FSL_EIS_MAS3_SR | FSL_EIS_MAS3_SW |
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120 | }, |
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121 | #endif |
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122 | ENTRY_X(bsp_section_start_begin, bsp_section_start_size), |
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123 | ENTRY_R(bsp_section_fast_text_load_begin, bsp_section_fast_text_size), |
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124 | ENTRY_X(bsp_section_fast_text_begin, bsp_section_fast_text_size), |
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125 | ENTRY_X(bsp_section_text_begin, bsp_section_text_size), |
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126 | ENTRY_R(bsp_section_rodata_load_begin, bsp_section_rodata_size), |
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127 | ENTRY_R(bsp_section_rodata_begin, bsp_section_rodata_size), |
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128 | ENTRY_R(bsp_section_fast_data_load_begin, bsp_section_fast_data_size), |
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129 | ENTRY_RW(bsp_section_fast_data_begin, bsp_section_fast_data_size), |
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130 | ENTRY_R(bsp_section_data_load_begin, bsp_section_data_size), |
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131 | ENTRY_RW(bsp_section_data_begin, bsp_section_data_size), |
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132 | ENTRY_RW(bsp_section_sbss_begin, bsp_section_sbss_size), |
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133 | ENTRY_RW(bsp_section_bss_begin, bsp_section_bss_size), |
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134 | ENTRY_RW(bsp_section_rwextra_begin, bsp_section_rwextra_size), |
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135 | ENTRY_RW(bsp_section_stack_begin, bsp_section_stack_size), |
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136 | ENTRY_IO(bsp_section_nocache_begin, bsp_section_nocache_size), |
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137 | ENTRY_IO(bsp_section_nocachenoload_begin, bsp_section_nocachenoload_size), |
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138 | #if QORIQ_CHIP_IS_T_VARIANT(QORIQ_CHIP_VARIANT) |
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139 | /* BMan Portals */ |
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140 | ENTRY_DEV_CACHED(&qoriq_bman_portal[0][0], sizeof(qoriq_bman_portal[0])), |
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141 | ENTRY_DEV(&qoriq_bman_portal[1][0], sizeof(qoriq_bman_portal[1])), |
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142 | /* QMan Portals */ |
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143 | ENTRY_DEV_CACHED(&qoriq_qman_portal[0][0], sizeof(qoriq_qman_portal[0])), |
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144 | ENTRY_DEV(&qoriq_qman_portal[1][0], sizeof(qoriq_qman_portal[1])), |
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145 | #endif |
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146 | ENTRY_DEV(&qoriq, sizeof(qoriq)) |
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147 | }; |
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148 | |
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149 | static DATA char memory_path[] = "/memory"; |
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150 | |
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151 | static void TEXT config_fdt_adjust(void) |
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152 | { |
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153 | const void *fdt = bsp_fdt_get(); |
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154 | int node; |
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155 | |
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156 | node = fdt_path_offset_namelen( |
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157 | fdt, |
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158 | memory_path, |
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159 | (int) sizeof(memory_path) - 1 |
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160 | ); |
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161 | |
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162 | if (node >= 0) { |
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163 | int len; |
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164 | const void *val; |
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165 | uint64_t begin; |
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166 | uint64_t size; |
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167 | |
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168 | val = fdt_getprop(fdt, node, "reg", &len); |
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169 | if (len == 8) { |
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170 | begin = fdt32_to_cpu(((fdt32_t *) val)[0]); |
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171 | size = fdt32_to_cpu(((fdt32_t *) val)[1]); |
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172 | } else if (len == 16) { |
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173 | begin = fdt64_to_cpu(((fdt64_t *) val)[0]); |
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174 | size = fdt64_to_cpu(((fdt64_t *) val)[1]); |
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175 | } else { |
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176 | begin = 0; |
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177 | size = 0; |
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178 | } |
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179 | |
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180 | size = MIN(size, 0x80000000U); |
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181 | |
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182 | if ( |
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183 | begin == 0 |
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184 | && size > (uintptr_t) bsp_section_work_end |
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185 | && (uintptr_t) bsp_section_nocache_end |
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186 | < (uintptr_t) bsp_section_work_end |
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187 | ) { |
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188 | config[WORKSPACE_ENTRY_INDEX].size += (uintptr_t) size |
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189 | - (uintptr_t) bsp_section_work_end; |
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190 | } |
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191 | } |
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192 | } |
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193 | |
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194 | void TEXT qoriq_mmu_config(int first_tlb, int scratch_tlb) |
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195 | { |
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196 | qoriq_mmu_context context; |
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197 | int i = 0; |
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198 | |
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199 | config_fdt_adjust(); |
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200 | qoriq_mmu_context_init(&context); |
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201 | |
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202 | for (i = 0; i < QORIQ_TLB1_ENTRY_COUNT; ++i) { |
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203 | if (i != scratch_tlb) { |
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204 | qoriq_tlb1_invalidate(i); |
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205 | } |
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206 | } |
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207 | |
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208 | for (i = 0; i < (int) (sizeof(config) / sizeof(config [0])); ++i) { |
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209 | const entry *cur = &config [i]; |
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210 | if (cur->size > 0) { |
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211 | qoriq_mmu_add( |
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212 | &context, |
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213 | cur->begin, |
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214 | cur->begin + cur->size - 1, |
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215 | 0, |
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216 | cur->mas2, |
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217 | cur->mas3, |
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218 | cur->mas7 |
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219 | ); |
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220 | } |
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221 | } |
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222 | |
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223 | qoriq_mmu_partition(&context, (3 * QORIQ_TLB1_ENTRY_COUNT) / 4); |
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224 | qoriq_mmu_write_to_tlb1(&context, first_tlb); |
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225 | } |
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226 | |
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227 | void TEXT bsp_work_area_initialize(void) |
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228 | { |
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229 | const entry *we = &config[WORKSPACE_ENTRY_INDEX]; |
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230 | uintptr_t begin = we->begin; |
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231 | uintptr_t end = begin + we->size; |
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232 | |
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233 | #ifdef BSP_INTERRUPT_STACK_AT_WORK_AREA_BEGIN |
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234 | begin += rtems_configuration_get_interrupt_stack_size(); |
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235 | #endif |
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236 | |
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237 | bsp_work_area_initialize_default((void *) begin, end - begin); |
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238 | } |
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