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start.S @ b171982

4.115

Last change on this file since b171982 was b171982, checked in by Sebastian Huber <sebastian.huber@…>, on 07/08/15 at 08:04:39
bsps/powerpc: Provide debug and trace symbols
Property mode set to `100644`
File size: 7.1 KB

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1	/**
2	* @file
3	*
4	* @ingroup qoriq
5	*
6	* @brief BSP start.
7	*/
8
9	/*
10	* Copyright (c) 2010-2015 embedded brains GmbH. All rights reserved.
11	*
12	* embedded brains GmbH
13	* Dornierstr. 4
14	* 82178 Puchheim
15	* Germany
16	* <rtems@embedded-brains.de>
17	*
18	* The license and distribution terms for this file may be
19	* found in the file LICENSE in this distribution or at
20	* http://www.rtems.org/license/LICENSE.
21	*/
22
23	#include <rtems/score/percpu.h>
24
25	#include <bspopts.h>
26
27	#include <libcpu/powerpc-utility.h>
28
29	#include <bsp/vectors.h>
30
31	#define FIRST_TLB 0
32	#define SCRATCH_TLB QORIQ_TLB1_ENTRY_COUNT - 1
33	#define INITIAL_MSR r14
34
35	.globl _start
36	#ifdef RTEMS_SMP
37	#if QORIQ_THREAD_COUNT > 1
38	.globl _start_thread
39	#endif
40	.globl _start_secondary_processor
41	#endif
42	.globl bsp_exc_vector_base
43
44	.section ".bsp_start_text", "ax"
45
46	_start:
47	bl .Linit
48
49	#ifdef HAS_UBOOT
50	bl bsp_uboot_copy_board_info
51	#endif /* HAS_UBOOT */
52
53	/* Initial MMU setup */
54	bl qoriq_tlb1_ts_0_only
55	li r3, SCRATCH_TLB
56	li r4, FSL_EIS_MAS1_TS
57	li r5, FSL_EIS_MAS2_I
58	li r6, FSL_EIS_MAS3_SR \| FSL_EIS_MAS3_SW \| FSL_EIS_MAS3_SX
59	li r7, 0
60	li r8, 0
61	li r9, 11
62	bl qoriq_tlb1_write
63
64	/* MSR initialization */
65	LWI INITIAL_MSR, QORIQ_INITIAL_MSR
66	ori r0, INITIAL_MSR, MSR_IS \| MSR_DS
67	mtmsr r0
68
69	#ifdef QORIQ_INITIAL_BUCSR
70	/* BUCSR initialization */
71	LWI r0, QORIQ_INITIAL_BUCSR
72	mtspr FSL_EIS_BUCSR, r0
73	isync
74	#endif
75
76	/* Initialize start stack */
77	LWI r1, start_stack_end - PPC_MINIMUM_STACK_FRAME_SIZE
78	clrrwi r1, r1, PPC_STACK_ALIGN_POWER
79	li r0, 0
80	stw r0, 0(r1)
81
82	/* Copy fast text */
83	LWI r3, bsp_section_fast_text_begin
84	LWI r4, bsp_section_fast_text_load_begin
85	LWI r5, bsp_section_fast_text_size
86	bl .Lcopy
87
88	/* Copy read-only data */
89	LWI r3, bsp_section_rodata_begin
90	LWI r4, bsp_section_rodata_load_begin
91	LWI r5, bsp_section_rodata_size
92	bl .Lcopy
93
94	/* Copy fast data */
95	LWI r3, bsp_section_fast_data_begin
96	LWI r4, bsp_section_fast_data_load_begin
97	LWI r5, bsp_section_fast_data_size
98	bl .Lcopy
99
100	/* Copy data */
101	LWI r3, bsp_section_data_begin
102	LWI r4, bsp_section_data_load_begin
103	LWI r5, bsp_section_data_size
104	bl .Lcopy
105
106	/* NULL pointer access protection (only core 0 has to do this) */
107	mfspr r3, BOOKE_PIR
108	cmpwi r3, 0
109	bne .Lnull_area_setup_done
110	LWI r3, bsp_section_start_begin
111	srawi r3, r3, 2
112	mtctr r3
113	li r3, -4
114	LWI r4, 0x44000002
115	.Lnull_area_setup_loop:
116	stwu r4, 4(r3)
117	bdnz .Lnull_area_setup_loop
118	.Lnull_area_setup_done:
119
120	/* Configure MMU */
121	li r3, FIRST_TLB
122	li r4, SCRATCH_TLB
123	bl qoriq_mmu_config
124	mtmsr INITIAL_MSR
125	li r3, SCRATCH_TLB
126	bl qoriq_tlb1_invalidate
127
128	/* Clear SBSS */
129	LWI r3, bsp_section_sbss_begin
130	LWI r4, bsp_section_sbss_size
131	bl bsp_start_zero
132
133	/* Clear BSS */
134	LWI r3, bsp_section_bss_begin
135	LWI r4, bsp_section_bss_size
136	bl bsp_start_zero
137
138	/* Set up EABI and SYSV environment */
139	bl __eabi
140
141	/* Clear command line */
142	li r3, 0
143
144	bl boot_card
145
146	.Lcopy:
147	cmpw r3, r4
148	beqlr
149	b memcpy
150
151	/* Do not use r3 here, since this could be the U-Boot board info */
152	.Linit:
153	/* Reset time base */
154	li r0, 0
155	mtspr TBWU, r0
156	mtspr TBWL, r0
157
158	/* Disable decrementer */
159	mfspr r0, BOOKE_TCR
160	LWI r4, BOOKE_TCR_DIE
161	andc r0, r0, r4
162	mtspr BOOKE_TCR, r0
163
164	#ifdef QORIQ_INITIAL_SPEFSCR
165	/* SPEFSCR initialization */
166	LWI r0, QORIQ_INITIAL_SPEFSCR
167	mtspr FSL_EIS_SPEFSCR, r0
168	#endif
169
170	/* Set small-data anchors */
171	LA r2, _SDA2_BASE_
172	LA r13, _SDA_BASE_
173
174	blr
175
176	#ifdef RTEMS_SMP
177	#if QORIQ_THREAD_COUNT > 1
178	_start_thread:
179	/* Adjust PIR */
180	mfspr r0, BOOKE_PIR
181	srawi r0, r0, 2
182	ori r0, r0, 1
183	mtspr BOOKE_PIR, r0
184
185	bl .Linit
186
187	/* Initialize start stack */
188	GET_SELF_CPU_CONTROL r3
189	lwz r3, PER_CPU_INTERRUPT_STACK_HIGH(r3)
190	subi r1, r3, PPC_MINIMUM_STACK_FRAME_SIZE
191	clrrwi r1, r1, PPC_STACK_ALIGN_POWER
192	li r0, 0
193	stw r0, 0(r1)
194
195	b qoriq_start_thread
196	#endif
197	_start_secondary_processor:
198
199	bl .Linit
200
201	/* Get start stack */
202	mr r1, r3
203
204	/* Initial MMU setup */
205	bl qoriq_tlb1_ts_0_only
206	li r3, SCRATCH_TLB
207	li r4, FSL_EIS_MAS1_TS
208	li r5, FSL_EIS_MAS2_I
209	li r6, FSL_EIS_MAS3_SR \| FSL_EIS_MAS3_SW \| FSL_EIS_MAS3_SX
210	li r7, 0
211	li r8, 0
212	li r9, 11
213	bl qoriq_tlb1_write
214
215	/* MSR initialization */
216	LWI INITIAL_MSR, QORIQ_INITIAL_MSR
217	ori r0, INITIAL_MSR, MSR_IS \| MSR_DS
218	mtmsr r0
219
220	#ifdef QORIQ_INITIAL_BUCSR
221	/* BUCSR initialization */
222	LWI r0, QORIQ_INITIAL_BUCSR
223	mtspr FSL_EIS_BUCSR, r0
224	isync
225	#endif
226
227	/* Initialize start stack */
228	subi r1, r1, PPC_MINIMUM_STACK_FRAME_SIZE
229	clrrwi r1, r1, PPC_STACK_ALIGN_POWER
230	li r0, 0
231	stw r0, 0(r1)
232
233	/* Configure MMU */
234	li r3, FIRST_TLB
235	li r4, SCRATCH_TLB
236	bl qoriq_mmu_config
237	mtmsr INITIAL_MSR
238	li r3, SCRATCH_TLB
239	bl qoriq_tlb1_invalidate
240
241	b bsp_start_on_secondary_processor
242	#endif /* RTEMS_SMP */
243
244	/* Exception vector prologues area */
245	.section ".bsp_start_text", "ax"
246	.align 4
247	bsp_exc_vector_base:
248	stw r1, ppc_exc_lock_crit@sdarel(r13)
249	stw r4, ppc_exc_vector_register_crit@sdarel(r13)
250	li r4, -32767
251	b ppc_exc_wrap_bookE_crit
252	stwu r1, -EXC_GENERIC_SIZE(r1)
253	stw r4, GPR4_OFFSET(r1)
254	li r4, 2
255	b ppc_exc_wrap_nopush_e500_mchk
256	stwu r1, -EXC_GENERIC_SIZE(r1)
257	stw r4, GPR4_OFFSET(r1)
258	li r4, 3
259	b ppc_exc_wrap_nopush_std
260	stwu r1, -EXC_GENERIC_SIZE(r1)
261	stw r4, GPR4_OFFSET(r1)
262	li r4, 4
263	b ppc_exc_wrap_nopush_std
264	stwu r1, -PPC_EXC_MINIMAL_FRAME_SIZE(r1)
265	#ifndef PPC_EXC_CONFIG_USE_FIXED_HANDLER
266	stw r4, PPC_EXC_VECTOR_PROLOGUE_OFFSET(r1)
267	li r4, -32763
268	#endif
269	b ppc_exc_wrap_async_normal
270	#ifdef PPC_EXC_CONFIG_USE_FIXED_HANDLER
271	nop
272	nop
273	#endif
274	stwu r1, -EXC_GENERIC_SIZE(r1)
275	stw r4, GPR4_OFFSET(r1)
276	li r4, 6
277	b ppc_exc_wrap_nopush_std
278	stwu r1, -EXC_GENERIC_SIZE(r1)
279	stw r4, GPR4_OFFSET(r1)
280	li r4, 7
281	b ppc_exc_wrap_nopush_std
282	stwu r1, -EXC_GENERIC_SIZE(r1)
283	stw r4, GPR4_OFFSET(r1)
284	li r4, 8
285	b ppc_exc_wrap_nopush_std
286	system_call:
287	stwu r1, -EXC_GENERIC_SIZE(r1)
288	stw r4, GPR4_OFFSET(r1)
289	li r4, 12
290	b ppc_exc_wrap_nopush_std
291	stwu r1, -EXC_GENERIC_SIZE(r1)
292	stw r4, GPR4_OFFSET(r1)
293	li r4, 24
294	b ppc_exc_wrap_nopush_std
295	stwu r1, -PPC_EXC_MINIMAL_FRAME_SIZE(r1)
296	#ifndef PPC_EXC_CONFIG_USE_FIXED_HANDLER
297	stw r4, PPC_EXC_VECTOR_PROLOGUE_OFFSET(r1)
298	li r4, -32752
299	#endif
300	b ppc_exc_wrap_async_normal
301	#ifdef PPC_EXC_CONFIG_USE_FIXED_HANDLER
302	nop
303	nop
304	#endif
305	stwu r1, -PPC_EXC_MINIMAL_FRAME_SIZE(r1)
306	#ifndef PPC_EXC_CONFIG_USE_FIXED_HANDLER
307	stw r4, PPC_EXC_VECTOR_PROLOGUE_OFFSET(r1)
308	li r4, -32749
309	#endif
310	b ppc_exc_wrap_async_normal
311	#ifdef PPC_EXC_CONFIG_USE_FIXED_HANDLER
312	nop
313	nop
314	#endif
315	stw r1, ppc_exc_lock_crit@sdarel(r13)
316	stw r4, ppc_exc_vector_register_crit@sdarel(r13)
317	li r4, -32748
318	b ppc_exc_wrap_bookE_crit
319	stwu r1, -EXC_GENERIC_SIZE(r1)
320	stw r4, GPR4_OFFSET(r1)
321	li r4, 18
322	b ppc_exc_wrap_nopush_std
323	stwu r1, -EXC_GENERIC_SIZE(r1)
324	stw r4, GPR4_OFFSET(r1)
325	li r4, 17
326	b ppc_exc_wrap_nopush_std
327	stwu r1, -EXC_GENERIC_SIZE(r1)
328	stw r4, GPR4_OFFSET(r1)
329	li r4, 13
330	b ppc_exc_wrap_nopush_bookE_crit
331	stwu r1, -EXC_GENERIC_SIZE(r1)
332	stw r4, GPR4_OFFSET(r1)
333	li r4, 10
334	b ppc_exc_wrap_nopush_std
335	stwu r1, -EXC_GENERIC_SIZE(r1)
336	stw r4, GPR4_OFFSET(r1)
337	li r4, 25
338	b ppc_exc_wrap_nopush_std
339	stwu r1, -EXC_GENERIC_SIZE(r1)
340	stw r4, GPR4_OFFSET(r1)
341	li r4, 26
342	b ppc_exc_wrap_nopush_std
343	stwu r1, -EXC_GENERIC_SIZE(r1)
344	stw r4, GPR4_OFFSET(r1)
345	li r4, 15
346	b ppc_exc_wrap_nopush_std
347
348	/* Symbol provided for debugging and tracing */
349	bsp_exc_vector_end:
350
351	/* Start stack area */
352	.section ".bsp_rwextra", "aw", @nobits
353	.align 4
354	.space 4096
355	start_stack_end:

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