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start.S @ 0b0969ef

Last change on this file since 0b0969ef was 0b0969ef, checked in by Sebastian Huber <sebastian.huber@…>, on 10/16/15 at 08:23:06
bsp/qoriq: Simplify initialization
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File size: 7.6 KB

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1	/**
2	* @file
3	*
4	* @ingroup qoriq
5	*
6	* @brief BSP start.
7	*/
8
9	/*
10	* Copyright (c) 2010-2015 embedded brains GmbH. All rights reserved.
11	*
12	* embedded brains GmbH
13	* Dornierstr. 4
14	* 82178 Puchheim
15	* Germany
16	* <rtems@embedded-brains.de>
17	*
18	* The license and distribution terms for this file may be
19	* found in the file LICENSE in this distribution or at
20	* http://www.rtems.org/license/LICENSE.
21	*/
22
23	#include <rtems/score/percpu.h>
24
25	#include <bspopts.h>
26
27	#include <libcpu/powerpc-utility.h>
28
29	#include <bsp/vectors.h>
30
31	#if (QORIQ_INITIAL_MSR & MSR_FP) != 0
32	#define INITIALIZE_FPU
33	#endif
34
35	#define FIRST_TLB 0
36	#define SCRATCH_TLB QORIQ_TLB1_ENTRY_COUNT - 1
37	#define INITIAL_MSR r14
38	#define START_STACK r15
39	#define SAVED_LINK_REGISTER r16
40
41	.globl _start
42	#ifdef RTEMS_SMP
43	#if QORIQ_THREAD_COUNT > 1
44	.globl _start_thread
45	#endif
46	.globl _start_secondary_processor
47	#endif
48	.globl bsp_exc_vector_base
49
50	.section ".bsp_start_text", "ax"
51
52	_start:
53	bl .Linitearly
54
55	#ifdef HAS_UBOOT
56	bl bsp_uboot_copy_board_info
57	#endif /* HAS_UBOOT */
58
59	/* Get start stack */
60	LWI START_STACK, start_stack_end
61
62	bl .Linitmore
63
64	/* Copy fast text */
65	LWI r3, bsp_section_fast_text_begin
66	LWI r4, bsp_section_fast_text_load_begin
67	LWI r5, bsp_section_fast_text_size
68	bl .Lcopy
69
70	/* Copy read-only data */
71	LWI r3, bsp_section_rodata_begin
72	LWI r4, bsp_section_rodata_load_begin
73	LWI r5, bsp_section_rodata_size
74	bl .Lcopy
75
76	/* Copy fast data */
77	LWI r3, bsp_section_fast_data_begin
78	LWI r4, bsp_section_fast_data_load_begin
79	LWI r5, bsp_section_fast_data_size
80	bl .Lcopy
81
82	/* Copy data */
83	LWI r3, bsp_section_data_begin
84	LWI r4, bsp_section_data_load_begin
85	LWI r5, bsp_section_data_size
86	bl .Lcopy
87
88	/* NULL pointer access protection (only core 0 has to do this) */
89	mfspr r3, BOOKE_PIR
90	cmpwi r3, 0
91	bne .Lnull_area_setup_done
92	LWI r3, bsp_section_start_begin
93	srawi r3, r3, 2
94	mtctr r3
95	li r3, -4
96	LWI r4, 0x44000002
97	.Lnull_area_setup_loop:
98	stwu r4, 4(r3)
99	bdnz .Lnull_area_setup_loop
100	.Lnull_area_setup_done:
101
102	bl .Linitmmu
103
104	/* Clear SBSS */
105	LWI r3, bsp_section_sbss_begin
106	LWI r4, bsp_section_sbss_size
107	bl bsp_start_zero
108
109	/* Clear BSS */
110	LWI r3, bsp_section_bss_begin
111	LWI r4, bsp_section_bss_size
112	bl bsp_start_zero
113
114	/* Set up EABI and SYSV environment */
115	bl __eabi
116
117	/* Clear command line */
118	li r3, 0
119
120	bl boot_card
121
122	.Lcopy:
123	cmpw r3, r4
124	beqlr
125	b memcpy
126
127	/* Do not use r3 here, since this could be the U-Boot board info */
128	.Linitearly:
129	/* Reset time base */
130	li r0, 0
131	mtspr TBWU, r0
132	mtspr TBWL, r0
133
134	/* Disable decrementer */
135	mfspr r0, BOOKE_TCR
136	LWI r4, BOOKE_TCR_DIE
137	andc r0, r0, r4
138	mtspr BOOKE_TCR, r0
139
140	#ifdef QORIQ_INITIAL_SPEFSCR
141	/* SPEFSCR initialization */
142	LWI r0, QORIQ_INITIAL_SPEFSCR
143	mtspr FSL_EIS_SPEFSCR, r0
144	#endif
145
146	#ifdef QORIQ_INITIAL_BUCSR
147	/* BUCSR initialization */
148	LWI r0, QORIQ_INITIAL_BUCSR
149	mtspr FSL_EIS_BUCSR, r0
150	isync
151	#endif
152
153	/* Set small-data anchors */
154	LA r2, _SDA2_BASE_
155	LA r13, _SDA_BASE_
156
157	blr
158
159	.Linitmore:
160	mflr SAVED_LINK_REGISTER
161
162	/* Initial MMU setup */
163	bl qoriq_tlb1_ts_0_only
164	li r3, SCRATCH_TLB
165	li r4, FSL_EIS_MAS1_TS
166	li r5, FSL_EIS_MAS2_I
167	li r6, FSL_EIS_MAS3_SR \| FSL_EIS_MAS3_SW \| FSL_EIS_MAS3_SX
168	li r7, 0
169	li r8, 0
170	li r9, 11
171	bl qoriq_tlb1_write
172
173	/* MSR initialization */
174	LWI INITIAL_MSR, QORIQ_INITIAL_MSR
175	ori r0, INITIAL_MSR, MSR_IS \| MSR_DS
176	mtmsr r0
177	isync
178
179	/* Initialize start stack */
180	subi r1, START_STACK, PPC_MINIMUM_STACK_FRAME_SIZE
181	clrrwi r1, r1, PPC_STACK_ALIGN_POWER
182	li r0, 0
183	stw r0, 0(r1)
184
185	#ifdef INITIALIZE_FPU
186	bl .Linitfpu
187	#endif
188
189	mtlr SAVED_LINK_REGISTER
190	blr
191
192	.Linitmmu:
193	mflr SAVED_LINK_REGISTER
194
195	/* Configure MMU */
196	li r3, FIRST_TLB
197	li r4, SCRATCH_TLB
198	bl qoriq_mmu_config
199	mtmsr INITIAL_MSR
200	isync
201	li r3, SCRATCH_TLB
202	bl qoriq_tlb1_invalidate
203
204	mtlr SAVED_LINK_REGISTER
205	blr
206
207
208	#ifdef INITIALIZE_FPU
209	/*
210	* Write a value to the FPRs to initialize the hidden tag bits. See
211	* also "Core Software Initialization Requirements" of the e500mc
212	* reference manual for example.
213	*/
214	.Linitfpu:
215	li r0, 0
216	stw r0, 0(r1)
217	stw r0, 4(r1)
218	lfd f0, 0(r1)
219	fmr f1, f0
220	fmr f2, f0
221	fmr f3, f0
222	fmr f4, f0
223	fmr f5, f0
224	fmr f6, f0
225	fmr f7, f0
226	fmr f8, f0
227	fmr f9, f0
228	fmr f10, f0
229	fmr f11, f0
230	fmr f12, f0
231	fmr f13, f0
232	fmr f14, f0
233	fmr f15, f0
234	fmr f16, f0
235	fmr f17, f0
236	fmr f18, f0
237	fmr f19, f0
238	fmr f20, f0
239	fmr f21, f0
240	fmr f22, f0
241	fmr f23, f0
242	fmr f24, f0
243	fmr f25, f0
244	fmr f26, f0
245	fmr f27, f0
246	fmr f28, f0
247	fmr f29, f0
248	fmr f30, f0
249	fmr f31, f0
250	blr
251	#endif
252
253	#ifdef RTEMS_SMP
254	#if QORIQ_THREAD_COUNT > 1
255	_start_thread:
256	/* Adjust PIR */
257	mfspr r0, BOOKE_PIR
258	srawi r0, r0, 2
259	ori r0, r0, 1
260	mtspr BOOKE_PIR, r0
261
262	bl .Linitearly
263
264	/* Initialize start stack */
265	GET_SELF_CPU_CONTROL r3
266	lwz r3, PER_CPU_INTERRUPT_STACK_HIGH(r3)
267	subi r1, r3, PPC_MINIMUM_STACK_FRAME_SIZE
268	clrrwi r1, r1, PPC_STACK_ALIGN_POWER
269	li r0, 0
270	stw r0, 0(r1)
271
272	#ifdef INITIALIZE_FPU
273	bl .Linitfpu
274	#endif
275
276	b qoriq_start_thread
277	#endif
278	_start_secondary_processor:
279	bl .Linitearly
280
281	/* Get start stack */
282	mr START_STACK, r3
283
284	bl .Linitmore
285	bl .Linitmmu
286	b bsp_start_on_secondary_processor
287	#endif /* RTEMS_SMP */
288
289	/* Exception vector prologues area */
290	.section ".bsp_start_text", "ax"
291	.align 4
292	bsp_exc_vector_base:
293	stw r1, ppc_exc_lock_crit@sdarel(r13)
294	stw r4, ppc_exc_vector_register_crit@sdarel(r13)
295	li r4, -32767
296	b ppc_exc_wrap_bookE_crit
297	stwu r1, -EXC_GENERIC_SIZE(r1)
298	stw r4, GPR4_OFFSET(r1)
299	li r4, 2
300	b ppc_exc_wrap_nopush_e500_mchk
301	stwu r1, -EXC_GENERIC_SIZE(r1)
302	stw r4, GPR4_OFFSET(r1)
303	li r4, 3
304	b ppc_exc_wrap_nopush_std
305	stwu r1, -EXC_GENERIC_SIZE(r1)
306	stw r4, GPR4_OFFSET(r1)
307	li r4, 4
308	b ppc_exc_wrap_nopush_std
309	stwu r1, -PPC_EXC_MINIMAL_FRAME_SIZE(r1)
310	#ifndef PPC_EXC_CONFIG_USE_FIXED_HANDLER
311	stw r4, PPC_EXC_VECTOR_PROLOGUE_OFFSET(r1)
312	li r4, -32763
313	#endif
314	b ppc_exc_wrap_async_normal
315	#ifdef PPC_EXC_CONFIG_USE_FIXED_HANDLER
316	nop
317	nop
318	#endif
319	stwu r1, -EXC_GENERIC_SIZE(r1)
320	stw r4, GPR4_OFFSET(r1)
321	li r4, 6
322	b ppc_exc_wrap_nopush_std
323	stwu r1, -EXC_GENERIC_SIZE(r1)
324	stw r4, GPR4_OFFSET(r1)
325	li r4, 7
326	b ppc_exc_wrap_nopush_std
327	stwu r1, -EXC_GENERIC_SIZE(r1)
328	stw r4, GPR4_OFFSET(r1)
329	li r4, 8
330	b ppc_exc_wrap_nopush_std
331	system_call:
332	stwu r1, -EXC_GENERIC_SIZE(r1)
333	stw r4, GPR4_OFFSET(r1)
334	li r4, 12
335	b ppc_exc_wrap_nopush_std
336	stwu r1, -EXC_GENERIC_SIZE(r1)
337	stw r4, GPR4_OFFSET(r1)
338	li r4, 24
339	b ppc_exc_wrap_nopush_std
340	stwu r1, -PPC_EXC_MINIMAL_FRAME_SIZE(r1)
341	#ifndef PPC_EXC_CONFIG_USE_FIXED_HANDLER
342	stw r4, PPC_EXC_VECTOR_PROLOGUE_OFFSET(r1)
343	li r4, -32752
344	#endif
345	b ppc_exc_wrap_async_normal
346	#ifdef PPC_EXC_CONFIG_USE_FIXED_HANDLER
347	nop
348	nop
349	#endif
350	stwu r1, -PPC_EXC_MINIMAL_FRAME_SIZE(r1)
351	#ifndef PPC_EXC_CONFIG_USE_FIXED_HANDLER
352	stw r4, PPC_EXC_VECTOR_PROLOGUE_OFFSET(r1)
353	li r4, -32749
354	#endif
355	b ppc_exc_wrap_async_normal
356	#ifdef PPC_EXC_CONFIG_USE_FIXED_HANDLER
357	nop
358	nop
359	#endif
360	stw r1, ppc_exc_lock_crit@sdarel(r13)
361	stw r4, ppc_exc_vector_register_crit@sdarel(r13)
362	li r4, -32748
363	b ppc_exc_wrap_bookE_crit
364	stwu r1, -EXC_GENERIC_SIZE(r1)
365	stw r4, GPR4_OFFSET(r1)
366	li r4, 18
367	b ppc_exc_wrap_nopush_std
368	stwu r1, -EXC_GENERIC_SIZE(r1)
369	stw r4, GPR4_OFFSET(r1)
370	li r4, 17
371	b ppc_exc_wrap_nopush_std
372	stwu r1, -EXC_GENERIC_SIZE(r1)
373	stw r4, GPR4_OFFSET(r1)
374	li r4, 13
375	b ppc_exc_wrap_nopush_bookE_crit
376	stwu r1, -EXC_GENERIC_SIZE(r1)
377	stw r4, GPR4_OFFSET(r1)
378	li r4, 10
379	b ppc_exc_wrap_nopush_std
380	stwu r1, -EXC_GENERIC_SIZE(r1)
381	stw r4, GPR4_OFFSET(r1)
382	li r4, 25
383	b ppc_exc_wrap_nopush_std
384	stwu r1, -EXC_GENERIC_SIZE(r1)
385	stw r4, GPR4_OFFSET(r1)
386	li r4, 26
387	b ppc_exc_wrap_nopush_std
388	stwu r1, -EXC_GENERIC_SIZE(r1)
389	stw r4, GPR4_OFFSET(r1)
390	li r4, 15
391	b ppc_exc_wrap_nopush_std
392
393	/* Symbol provided for debugging and tracing */
394	bsp_exc_vector_end:
395
396	/* Start stack area */
397	.section ".bsp_rwextra", "aw", @nobits
398	.align 4
399	.space 4096
400	start_stack_end:

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