source: rtems/c/src/lib/libbsp/powerpc/qoriq/irq/irq.c @ 2f54488f

5
Last change on this file since 2f54488f was 2f54488f, checked in by Sebastian Huber <sebastian.huber@…>, on 01/15/18 at 12:55:41

bsp/qoriq: Fix hypervisor guest IRQ support

Update #3085.

  • Property mode set to 100644
File size: 9.1 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup QorIQ
5 *
6 * @brief Interrupt implementation.
7 */
8
9/*
10 * Copyright (c) 2010, 2017 embedded brains GmbH.  All rights reserved.
11 *
12 *  embedded brains GmbH
13 *  Dornierstr. 4
14 *  82178 Puchheim
15 *  Germany
16 *  <rtems@embedded-brains.de>
17 *
18 * The license and distribution terms for this file may be
19 * found in the file LICENSE in this distribution or at
20 * http://www.rtems.org/license/LICENSE.
21 */
22
23#include <sys/param.h>
24
25#include <rtems.h>
26
27#include <libcpu/powerpc-utility.h>
28
29#include <asm/epapr_hcalls.h>
30
31#include <bsp.h>
32#include <bsp/irq.h>
33#include <bsp/irq-generic.h>
34#include <bsp/vectors.h>
35#include <bsp/utility.h>
36#include <bsp/qoriq.h>
37
38#ifdef RTEMS_SMP
39#include <rtems/score/smpimpl.h>
40#endif
41
42RTEMS_INTERRUPT_LOCK_DEFINE(static, lock, "QorIQ IRQ")
43
44#define SPURIOUS 0xffff
45
46#ifdef QORIQ_IS_HYPERVISOR_GUEST
47
48void bsp_interrupt_set_affinity(
49        rtems_vector_number vector,
50        const Processor_mask *affinity
51)
52{
53        uint32_t config;
54        unsigned int priority;
55        uint32_t destination;
56        uint32_t new_destination;
57        rtems_interrupt_lock_context lock_context;
58
59        new_destination = _Processor_mask_Find_last_set(affinity) - 1;
60
61        rtems_interrupt_lock_acquire(&lock, &lock_context);
62        ev_int_get_config(vector, &config, &priority, &destination);
63        ev_int_set_config(vector, config, priority, new_destination);
64        rtems_interrupt_lock_release(&lock, &lock_context);
65}
66
67void bsp_interrupt_get_affinity(
68        rtems_vector_number vector,
69        Processor_mask *affinity
70)
71{
72        uint32_t config;
73        unsigned int priority;
74        uint32_t destination;
75
76        ev_int_get_config(vector, &config, &priority, &destination);
77        _Processor_mask_From_uint32_t(affinity, destination, 0);
78}
79
80void bsp_interrupt_vector_enable(rtems_vector_number vector)
81{
82        bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
83        ev_int_set_mask(vector, 0);
84}
85
86void bsp_interrupt_vector_disable(rtems_vector_number vector)
87{
88        bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
89        ev_int_set_mask(vector, 1);
90}
91
92void bsp_interrupt_dispatch(uintptr_t exception_number)
93{
94        unsigned int vector;
95
96        if (exception_number == 10) {
97                qoriq_decrementer_dispatch();
98                return;
99        }
100
101#ifdef RTEMS_SMP
102        if (exception_number == 36) {
103                _SMP_Inter_processor_interrupt_handler();
104                return;
105        }
106#endif
107
108        /*
109         * This works only if the "has-external-proxy" property is present in the
110         * "epapr,hv-pic" device tree node.
111         */
112        vector = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_EPR);
113
114        if (vector != SPURIOUS) {
115                uint32_t msr;
116
117                msr = ppc_external_exceptions_enable();
118                bsp_interrupt_handler_dispatch(vector);
119                ppc_external_exceptions_disable(msr);
120
121                ev_int_eoi(vector);
122        } else {
123                bsp_interrupt_handler_default(vector);
124        }
125}
126
127rtems_status_code bsp_interrupt_facility_initialize(void)
128{
129        return RTEMS_SUCCESSFUL;
130}
131
132#else /* !QORIQ_IS_HYPERVISOR_GUEST */
133
134#define VPR_MSK BSP_BBIT32(0)
135#define VPR_A BSP_BBIT32(1)
136#define VPR_P BSP_BBIT32(8)
137#define VPR_S BSP_BBIT32(9)
138#define VPR_PRIORITY(val) BSP_BFLD32(val, 12, 15)
139#define VPR_PRIORITY_GET(reg) BSP_BFLD32GET(reg, 12, 15)
140#define VPR_PRIORITY_SET(reg, val) BSP_BFLD32SET(reg, val, 12, 15)
141#define VPR_VECTOR(val) BSP_BFLD32(val, 16, 31)
142#define VPR_VECTOR_GET(reg) BSP_BFLD32GET(reg, 16, 31)
143#define VPR_VECTOR_SET(reg, val) BSP_BFLD32SET(reg, val, 16, 31)
144
145#define GCR_RST BSP_BBIT32(0)
146#define GCR_M BSP_BBIT32(2)
147
148#define SRC_CFG_IDX(i) ((i) - QORIQ_IRQ_EXT_BASE)
149
150static const uint16_t src_cfg_offsets [] = {
151        [SRC_CFG_IDX(QORIQ_IRQ_EXT_0)] = 0x10000 >> 4,
152        [SRC_CFG_IDX(QORIQ_IRQ_EXT_1)] = 0x10020 >> 4,
153        [SRC_CFG_IDX(QORIQ_IRQ_EXT_2)] = 0x10040 >> 4,
154        [SRC_CFG_IDX(QORIQ_IRQ_EXT_3)] = 0x10060 >> 4,
155        [SRC_CFG_IDX(QORIQ_IRQ_EXT_4)] = 0x10080 >> 4,
156        [SRC_CFG_IDX(QORIQ_IRQ_EXT_5)] = 0x100a0 >> 4,
157        [SRC_CFG_IDX(QORIQ_IRQ_EXT_6)] = 0x100c0 >> 4,
158        [SRC_CFG_IDX(QORIQ_IRQ_EXT_7)] = 0x100e0 >> 4,
159        [SRC_CFG_IDX(QORIQ_IRQ_EXT_8)] = 0x10100 >> 4,
160        [SRC_CFG_IDX(QORIQ_IRQ_EXT_9)] = 0x10120 >> 4,
161        [SRC_CFG_IDX(QORIQ_IRQ_EXT_10)] = 0x10140 >> 4,
162        [SRC_CFG_IDX(QORIQ_IRQ_EXT_11)] = 0x10160 >> 4,
163        [SRC_CFG_IDX(QORIQ_IRQ_IPI_0)] = 0x010a0 >> 4,
164        [SRC_CFG_IDX(QORIQ_IRQ_IPI_1)] = 0x010b0 >> 4,
165        [SRC_CFG_IDX(QORIQ_IRQ_IPI_2)] = 0x010c0 >> 4,
166        [SRC_CFG_IDX(QORIQ_IRQ_IPI_3)] = 0x010d0 >> 4,
167        [SRC_CFG_IDX(QORIQ_IRQ_MI_0)] = 0x11600 >> 4,
168        [SRC_CFG_IDX(QORIQ_IRQ_MI_1)] = 0x11620 >> 4,
169        [SRC_CFG_IDX(QORIQ_IRQ_MI_2)] = 0x11640 >> 4,
170        [SRC_CFG_IDX(QORIQ_IRQ_MI_3)] = 0x11660 >> 4,
171        [SRC_CFG_IDX(QORIQ_IRQ_MI_4)] = 0x11680 >> 4,
172        [SRC_CFG_IDX(QORIQ_IRQ_MI_5)] = 0x116a0 >> 4,
173        [SRC_CFG_IDX(QORIQ_IRQ_MI_6)] = 0x116c0 >> 4,
174        [SRC_CFG_IDX(QORIQ_IRQ_MI_7)] = 0x116e0 >> 4,
175        [SRC_CFG_IDX(QORIQ_IRQ_MSI_0)] = 0x11c00 >> 4,
176        [SRC_CFG_IDX(QORIQ_IRQ_MSI_1)] = 0x11c20 >> 4,
177        [SRC_CFG_IDX(QORIQ_IRQ_MSI_2)] = 0x11c40 >> 4,
178        [SRC_CFG_IDX(QORIQ_IRQ_MSI_3)] = 0x11c60 >> 4,
179        [SRC_CFG_IDX(QORIQ_IRQ_MSI_4)] = 0x11c80 >> 4,
180        [SRC_CFG_IDX(QORIQ_IRQ_MSI_5)] = 0x11ca0 >> 4,
181        [SRC_CFG_IDX(QORIQ_IRQ_MSI_6)] = 0x11cc0 >> 4,
182        [SRC_CFG_IDX(QORIQ_IRQ_MSI_7)] = 0x11ce0 >> 4,
183        [SRC_CFG_IDX(QORIQ_IRQ_GT_A_0)] = 0x01120 >> 4,
184        [SRC_CFG_IDX(QORIQ_IRQ_GT_A_1)] = 0x01160 >> 4,
185        [SRC_CFG_IDX(QORIQ_IRQ_GT_A_2)] = 0x011a0 >> 4,
186        [SRC_CFG_IDX(QORIQ_IRQ_GT_A_3)] = 0x011e0 >> 4,
187        [SRC_CFG_IDX(QORIQ_IRQ_GT_B_0)] = 0x02120 >> 4,
188        [SRC_CFG_IDX(QORIQ_IRQ_GT_B_1)] = 0x02160 >> 4,
189        [SRC_CFG_IDX(QORIQ_IRQ_GT_B_2)] = 0x021a0 >> 4,
190        [SRC_CFG_IDX(QORIQ_IRQ_GT_B_3)] = 0x021e0 >> 4
191};
192
193static volatile qoriq_pic_src_cfg *get_src_cfg(rtems_vector_number vector)
194{
195        uint32_t n = MIN(RTEMS_ARRAY_SIZE(qoriq.pic.ii_0), QORIQ_IRQ_EXT_BASE);
196
197        if (vector < n) {
198                return &qoriq.pic.ii_0 [vector];
199        } else if (vector < QORIQ_IRQ_EXT_BASE) {
200                return &qoriq.pic.ii_1 [vector - n];
201        } else {
202                uintptr_t offs = ((uintptr_t)
203                        src_cfg_offsets [vector - QORIQ_IRQ_EXT_BASE]) << 4;
204
205                return (volatile qoriq_pic_src_cfg *) ((uintptr_t) &qoriq.pic + offs);
206        }
207}
208
209rtems_status_code qoriq_pic_set_priority(
210        rtems_vector_number vector,
211        int new_priority,
212        int *old_priority
213)
214{
215        rtems_status_code sc = RTEMS_SUCCESSFUL;
216        uint32_t old_vpr = 0;
217
218        if (bsp_interrupt_is_valid_vector(vector)) {
219                volatile qoriq_pic_src_cfg *src_cfg = get_src_cfg(vector);
220
221                if (QORIQ_PIC_PRIORITY_IS_VALID(new_priority)) {
222                        rtems_interrupt_lock_context lock_context;
223
224                        rtems_interrupt_lock_acquire(&lock, &lock_context);
225                        old_vpr = src_cfg->vpr;
226                        src_cfg->vpr = VPR_PRIORITY_SET(old_vpr, (uint32_t) new_priority);
227                        rtems_interrupt_lock_release(&lock, &lock_context);
228                } else if (new_priority < 0) {
229                        old_vpr = src_cfg->vpr;
230                } else {
231                        sc = RTEMS_INVALID_PRIORITY;
232                }
233        } else {
234                sc = RTEMS_INVALID_ID;
235        }
236
237        if (old_priority != NULL) {
238                *old_priority = (int) VPR_PRIORITY_GET(old_vpr);
239        }
240
241        return sc;
242}
243
244void bsp_interrupt_set_affinity(
245        rtems_vector_number vector,
246        const Processor_mask *affinity
247)
248{
249        volatile qoriq_pic_src_cfg *src_cfg = get_src_cfg(vector);
250
251        src_cfg->dr = _Processor_mask_To_uint32_t(affinity, 0);
252}
253
254void bsp_interrupt_get_affinity(
255        rtems_vector_number vector,
256        Processor_mask *affinity
257)
258{
259        volatile qoriq_pic_src_cfg *src_cfg = get_src_cfg(vector);
260
261        _Processor_mask_From_uint32_t(affinity, src_cfg->dr, 0);
262}
263
264static void pic_vector_enable(rtems_vector_number vector, uint32_t msk)
265{
266        volatile qoriq_pic_src_cfg *src_cfg = get_src_cfg(vector);
267        rtems_interrupt_lock_context lock_context;
268
269        bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
270
271        rtems_interrupt_lock_acquire(&lock, &lock_context);
272        src_cfg->vpr = (src_cfg->vpr & ~VPR_MSK) | msk;
273        rtems_interrupt_lock_release(&lock, &lock_context);
274}
275
276void bsp_interrupt_vector_enable(rtems_vector_number vector)
277{
278        pic_vector_enable(vector, 0);
279}
280
281void bsp_interrupt_vector_disable(rtems_vector_number vector)
282{
283        pic_vector_enable(vector, VPR_MSK);
284}
285
286void bsp_interrupt_dispatch(uintptr_t exception_number)
287{
288        rtems_vector_number vector = qoriq.pic.iack;
289
290        if (vector != SPURIOUS) {
291                uint32_t msr = ppc_external_exceptions_enable();
292
293                bsp_interrupt_handler_dispatch(vector);
294
295                ppc_external_exceptions_disable(msr);
296
297                qoriq.pic.eoi = 0;
298                qoriq.pic.whoami;
299        } else {
300                bsp_interrupt_handler_default(vector);
301        }
302}
303
304static bool pic_is_ipi(rtems_vector_number vector)
305{
306        return QORIQ_IRQ_IPI_0 <= vector && vector <= QORIQ_IRQ_IPI_3;
307}
308
309static void pic_reset(void)
310{
311        qoriq.pic.gcr = GCR_RST;
312        while ((qoriq.pic.gcr & GCR_RST) != 0) {
313                /* Wait */
314        }
315}
316
317static void pic_global_timer_init(void)
318{
319        int i = 0;
320
321        qoriq.pic.tcra = 0;
322        qoriq.pic.tcrb = 0;
323
324        for (i = 0; i < 4; ++i) {
325                qoriq.pic.gta [0].bcr = GTBCR_CI;
326                qoriq.pic.gtb [0].bcr = GTBCR_CI;
327        }
328}
329
330rtems_status_code bsp_interrupt_facility_initialize(void)
331{
332        rtems_vector_number i = 0;
333        uint32_t processor_id = ppc_processor_id();
334
335        if (processor_id == 0) {
336                /* Core 0 must do the basic initialization */
337
338                pic_reset();
339
340                for (i = BSP_INTERRUPT_VECTOR_MIN; i <= BSP_INTERRUPT_VECTOR_MAX; ++i) {
341                        volatile qoriq_pic_src_cfg *src_cfg = get_src_cfg(i);
342
343                        src_cfg->vpr = VPR_MSK | VPR_P | VPR_PRIORITY(1) | VPR_VECTOR(i);
344
345                        if (!pic_is_ipi(i)) {
346                                src_cfg->dr = 0x1;
347                        }
348                }
349
350                qoriq.pic.mer03 = 0xf;
351                qoriq.pic.mer47 = 0xf;
352                qoriq.pic.svr = SPURIOUS;
353                qoriq.pic.gcr = GCR_M;
354
355                pic_global_timer_init();
356        }
357
358        qoriq.pic.ctpr = 0;
359
360        for (i = BSP_INTERRUPT_VECTOR_MIN; i <= BSP_INTERRUPT_VECTOR_MAX; ++i) {
361                qoriq.pic.iack;
362                qoriq.pic.eoi = 0;
363                qoriq.pic.whoami;
364        }
365
366        return RTEMS_SUCCESSFUL;
367}
368
369#endif /* QORIQ_IS_HYPERVISOR_GUEST */
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