source: rtems/c/src/lib/libbsp/powerpc/qoriq/include/bspopts.h.in @ daffa60

4.115
Last change on this file since daffa60 was daffa60, checked in by Ralf Corsépius <ralf.corsepius@…>, on May 24, 2012 at 4:36:40 AM

Add bspopts.h.in.

  • Property mode set to 100644
File size: 2.8 KB
Line 
1/* include/bspopts.h.in.  Generated from configure.ac by autoheader.  */
2
3/* default baud for console and other serial devices */
4#undef BSP_CONSOLE_BAUD
5
6/* enables the data cache, if defined to a value other than zero */
7#undef BSP_DATA_CACHE_ENABLED
8
9/* If defined, then the BSP Framework will put a non-zero pattern into the
10   RTEMS Workspace and C program heap. This should assist in finding code that
11   assumes memory starts set to zero. */
12#undef BSP_DIRTY_MEMORY
13
14/* disable U-Boot work area configuration */
15#undef BSP_DISABLE_UBOOT_WORK_AREA_CONFIG
16
17/* enables the instruction cache, if defined to a value other than zero */
18#undef BSP_INSTRUCTION_CACHE_ENABLED
19
20/* indicate that the interrupt stack is at the work area begin */
21#undef BSP_INTERRUPT_STACK_AT_WORK_AREA_BEGIN
22
23/* If defined, print a message and wait until pressed before resetting board
24   when application exits. */
25#undef BSP_PRESS_KEY_FOR_RESET
26
27/* If defined, reset the board when the application exits. */
28#undef BSP_RESET_BOARD_AT_EXIT
29
30/* enable usage of interrupts for the UART modules */
31#undef BSP_USE_UART_INTERRUPTS
32
33/* enables U-Boot support */
34#undef HAS_UBOOT
35
36/* Define to the address where bug reports for this package should be sent. */
37#undef PACKAGE_BUGREPORT
38
39/* Define to the full name of this package. */
40#undef PACKAGE_NAME
41
42/* Define to the full name and version of this package. */
43#undef PACKAGE_STRING
44
45/* Define to the one symbol short name of this package. */
46#undef PACKAGE_TARNAME
47
48/* Define to the home page for this package. */
49#undef PACKAGE_URL
50
51/* Define to the version of this package. */
52#undef PACKAGE_VERSION
53
54/* global timer used for system clock, 0..3 maps to A0..A3, and 4..7 maps to
55   B0..B3 */
56#undef QORIQ_CLOCK_TIMER
57
58/* PHY address for eTSEC interface 1 */
59#undef QORIQ_ETSEC_1_PHY_ADDR
60
61/* PHY address for eTSEC interface 2 */
62#undef QORIQ_ETSEC_2_PHY_ADDR
63
64/* PHY address for eTSEC interface 3 */
65#undef QORIQ_ETSEC_3_PHY_ADDR
66
67/* initial MSR value */
68#undef QORIQ_INITIAL_MSR
69
70/* initial SPEFSCR value */
71#undef QORIQ_INITIAL_SPEFSCR
72
73/* inter-processor communication area begin */
74#undef QORIQ_INTERCOM_AREA_BEGIN
75
76/* inter-processor communication area size */
77#undef QORIQ_INTERCOM_AREA_SIZE
78
79/* use 1 to enable UART 0, otherwise use 0 */
80#undef QORIQ_UART_0_ENABLE
81
82/* use 1 to enable UART 1, otherwise use 0 */
83#undef QORIQ_UART_1_ENABLE
84
85/* use 1 to enable UART 0 to Intercom bridge, otherwise use 0 */
86#undef QORIQ_UART_BRIDGE_0_ENABLE
87
88/* use 1 to enable UART 1 to Intercom bridge, otherwise use 0 */
89#undef QORIQ_UART_BRIDGE_1_ENABLE
90
91/* UART to Intercom bridge master core index */
92#undef QORIQ_UART_BRIDGE_MASTER_CORE
93
94/* UART to Intercom bridge slave core index */
95#undef QORIQ_UART_BRIDGE_SLAVE_CORE
96
97/* UART to Intercom bridge task priority */
98#undef QORIQ_UART_BRIDGE_TASK_PRIORITY
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