[0f77281] | 1 | AC_PREREQ([2.69]) |
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[12072880] | 2 | AC_INIT([rtems-c-src-lib-libbsp-powerpc-qoriq],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) |
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[dc0a7df] | 3 | AC_CONFIG_SRCDIR([bsp_specs]) |
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| 4 | RTEMS_TOP(../../../../../..) |
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| 5 | |
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| 6 | RTEMS_CANONICAL_TARGET_CPU |
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| 7 | AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.10]) |
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| 8 | RTEMS_BSP_CONFIGURE |
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| 9 | |
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| 10 | RTEMS_PROG_CC_FOR_TARGET |
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| 11 | RTEMS_CANONICALIZE_TOOLS |
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| 12 | RTEMS_PROG_CCAS |
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| 13 | |
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| 14 | RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([*],[1]) |
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| 15 | RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED |
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| 16 | |
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| 17 | RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED([*],[1]) |
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| 18 | RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED |
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| 19 | |
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[105ccdd5] | 20 | RTEMS_BSPOPTS_SET([BSP_USE_DATA_CACHE_BLOCK_TOUCH],[*],[1]) |
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| 21 | RTEMS_BSPOPTS_HELP([BSP_USE_DATA_CACHE_BLOCK_TOUCH],[if defined use dcbt instruction]) |
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| 22 | |
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[f6999e6] | 23 | RTEMS_BSPOPTS_SET([PPC_EXC_CONFIG_USE_FIXED_HANDLER],[*],[1]) |
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| 24 | RTEMS_BSPOPTS_HELP([PPC_EXC_CONFIG_USE_FIXED_HANDLER], |
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| 25 | [use fixed high-level exception handler]) |
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| 26 | |
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[fe1a4e4b] | 27 | RTEMS_BSPOPTS_SET([PPC_EXC_CONFIG_BOOKE_ONLY],[*],[1]) |
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| 28 | RTEMS_BSPOPTS_HELP([PPC_EXC_CONFIG_BOOKE_ONLY], |
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| 29 | [only support Book E exception types]) |
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| 30 | |
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[0db7c55] | 31 | RTEMS_BSPOPTS_SET([PPC_CACHE_ALIGNMENT],[qoriq_e6500*],[64]) |
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[f2e6c3e] | 32 | RTEMS_BSPOPTS_SET([PPC_CACHE_ALIGNMENT],[*],[]) |
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| 33 | RTEMS_BSPOPTS_HELP([PPC_CACHE_ALIGNMENT],[the cache alignment]) |
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| 34 | |
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| 35 | RTEMS_BSPOPTS_SET([PPC_CACHE_DATA_L1_SIZE],[*],[(32 * 1024)]) |
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| 36 | RTEMS_BSPOPTS_HELP([PPC_CACHE_DATA_L1_SIZE],[the L1 data cache size]) |
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| 37 | |
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[0db7c55] | 38 | RTEMS_BSPOPTS_SET([PPC_CACHE_DATA_L2_SIZE],[qoriq_e6500*],[(2048 * 1024)]) |
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[f2e6c3e] | 39 | RTEMS_BSPOPTS_SET([PPC_CACHE_DATA_L2_SIZE],[*],[(256 * 1024)]) |
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| 40 | RTEMS_BSPOPTS_HELP([PPC_CACHE_DATA_L2_SIZE],[the L2 data cache size]) |
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| 41 | |
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| 42 | RTEMS_BSPOPTS_SET([PPC_CACHE_INSTRUCTION_L1_SIZE],[*],[(32 * 1024)]) |
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| 43 | RTEMS_BSPOPTS_HELP([PPC_CACHE_INSTRUCTION_L1_SIZE],[the L1 instruction cache size]) |
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| 44 | |
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[0db7c55] | 45 | RTEMS_BSPOPTS_SET([PPC_CACHE_INSTRUCTION_L2_SIZE],[qoriq_e6500*],[(2048 * 1024)]) |
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[f2e6c3e] | 46 | RTEMS_BSPOPTS_SET([PPC_CACHE_INSTRUCTION_L2_SIZE],[*],[(256 * 1024)]) |
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| 47 | RTEMS_BSPOPTS_HELP([PPC_CACHE_INSTRUCTION_L2_SIZE],[the L2 instruction cache size]) |
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| 48 | |
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[dc0a7df] | 49 | RTEMS_BSPOPTS_SET([BSP_CONSOLE_BAUD],[*],[115200]) |
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| 50 | RTEMS_BSPOPTS_HELP([BSP_CONSOLE_BAUD],[default baud for console and other serial devices]) |
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| 51 | |
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| 52 | RTEMS_BSPOPTS_SET([BSP_USE_UART_INTERRUPTS],[*],[1]) |
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| 53 | RTEMS_BSPOPTS_HELP([BSP_USE_UART_INTERRUPTS],[enable usage of interrupts for the UART modules]) |
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| 54 | |
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[f383f4bf] | 55 | RTEMS_BSPOPTS_SET([BSP_FDT_BLOB_SIZE_MAX],[*],[262144]) |
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[e29f1f5] | 56 | RTEMS_BSPOPTS_HELP([BSP_FDT_BLOB_SIZE_MAX],[maximum size of the FDT blob in bytes]) |
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| 57 | |
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[f383f4bf] | 58 | RTEMS_BSPOPTS_SET([BSP_FDT_BLOB_READ_ONLY],[*],[1]) |
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[e29f1f5] | 59 | RTEMS_BSPOPTS_HELP([BSP_FDT_BLOB_READ_ONLY],[place the FDT blob into the read-only data area]) |
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| 60 | |
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[0db7c55] | 61 | RTEMS_BSPOPTS_SET([QORIQ_CPU_COUNT],[qoriq_e6500*],[24]) |
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[f2e6c3e] | 62 | RTEMS_BSPOPTS_SET([QORIQ_CPU_COUNT],[*],[2]) |
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[e29f1f5] | 63 | RTEMS_BSPOPTS_HELP([QORIQ_CPU_COUNT],[maximum virtual processor count]) |
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[f2e6c3e] | 64 | |
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[0db7c55] | 65 | RTEMS_BSPOPTS_SET([QORIQ_THREAD_COUNT],[qoriq_e6500*],[2]) |
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[f2e6c3e] | 66 | RTEMS_BSPOPTS_SET([QORIQ_THREAD_COUNT],[*],[1]) |
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| 67 | RTEMS_BSPOPTS_HELP([QORIQ_THREAD_COUNT],[the number of threads per processor]) |
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| 68 | |
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[dc0a7df] | 69 | RTEMS_BSPOPTS_SET([QORIQ_ETSEC_1_PHY_ADDR],[*],[-1]) |
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| 70 | RTEMS_BSPOPTS_HELP([QORIQ_ETSEC_1_PHY_ADDR],[PHY address for eTSEC interface 1]) |
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| 71 | |
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| 72 | RTEMS_BSPOPTS_SET([QORIQ_ETSEC_2_PHY_ADDR],[*],[0]) |
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| 73 | RTEMS_BSPOPTS_HELP([QORIQ_ETSEC_2_PHY_ADDR],[PHY address for eTSEC interface 2]) |
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| 74 | |
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| 75 | RTEMS_BSPOPTS_SET([QORIQ_ETSEC_3_PHY_ADDR],[*],[1]) |
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| 76 | RTEMS_BSPOPTS_HELP([QORIQ_ETSEC_3_PHY_ADDR],[PHY address for eTSEC interface 3]) |
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| 77 | |
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[f2e6c3e] | 78 | RTEMS_BSPOPTS_SET([QORIQ_UART_0_ENABLE],[qoriq_core_1],[0]) |
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| 79 | RTEMS_BSPOPTS_SET([QORIQ_UART_0_ENABLE],[*],[1]) |
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[dc0a7df] | 80 | RTEMS_BSPOPTS_HELP([QORIQ_UART_0_ENABLE],[use 1 to enable UART 0, otherwise use 0]) |
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| 81 | |
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[f2e6c3e] | 82 | RTEMS_BSPOPTS_SET([QORIQ_UART_1_ENABLE],[qoriq_core_1],[0]) |
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| 83 | RTEMS_BSPOPTS_SET([QORIQ_UART_1_ENABLE],[*],[1]) |
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[dc0a7df] | 84 | RTEMS_BSPOPTS_HELP([QORIQ_UART_1_ENABLE],[use 1 to enable UART 1, otherwise use 0]) |
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| 85 | |
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| 86 | RTEMS_BSPOPTS_SET([QORIQ_UART_BRIDGE_MASTER_CORE],[*],[0]) |
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| 87 | RTEMS_BSPOPTS_HELP([QORIQ_UART_BRIDGE_MASTER_CORE],[UART to Intercom bridge master core index]) |
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| 88 | |
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| 89 | RTEMS_BSPOPTS_SET([QORIQ_UART_BRIDGE_SLAVE_CORE],[*],[1]) |
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| 90 | RTEMS_BSPOPTS_HELP([QORIQ_UART_BRIDGE_SLAVE_CORE],[UART to Intercom bridge slave core index]) |
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| 91 | |
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| 92 | RTEMS_BSPOPTS_SET([QORIQ_UART_BRIDGE_TASK_PRIORITY],[*],[250]) |
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| 93 | RTEMS_BSPOPTS_HELP([QORIQ_UART_BRIDGE_TASK_PRIORITY],[UART to Intercom bridge task priority]) |
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| 94 | |
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| 95 | RTEMS_BSPOPTS_SET([QORIQ_UART_BRIDGE_0_ENABLE],[*],[0]) |
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| 96 | RTEMS_BSPOPTS_HELP([QORIQ_UART_BRIDGE_0_ENABLE],[use 1 to enable UART 0 to Intercom bridge, otherwise use 0]) |
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| 97 | |
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| 98 | RTEMS_BSPOPTS_SET([QORIQ_UART_BRIDGE_1_ENABLE],[qoriq_core_0],[1]) |
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| 99 | RTEMS_BSPOPTS_SET([QORIQ_UART_BRIDGE_1_ENABLE],[qoriq_core_1],[1]) |
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| 100 | RTEMS_BSPOPTS_SET([QORIQ_UART_BRIDGE_1_ENABLE],[*],[0]) |
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| 101 | RTEMS_BSPOPTS_HELP([QORIQ_UART_BRIDGE_1_ENABLE],[use 1 to enable UART 1 to Intercom bridge, otherwise use 0]) |
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| 102 | |
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| 103 | RTEMS_BSPOPTS_SET([BSP_INTERRUPT_STACK_AT_WORK_AREA_BEGIN],[*],[1]) |
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| 104 | RTEMS_BSPOPTS_HELP([BSP_INTERRUPT_STACK_AT_WORK_AREA_BEGIN],[indicate that the interrupt stack is at the work area begin]) |
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| 105 | |
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| 106 | RTEMS_BSPOPTS_SET([QORIQ_INTERCOM_AREA_BEGIN],[*],[0x3000000]) |
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| 107 | RTEMS_BSPOPTS_HELP([QORIQ_INTERCOM_AREA_BEGIN],[inter-processor communication area begin]) |
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| 108 | RTEMS_BSPOPTS_SET([QORIQ_INTERCOM_AREA_SIZE],[*],[0x1000000]) |
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| 109 | RTEMS_BSPOPTS_HELP([QORIQ_INTERCOM_AREA_SIZE],[inter-processor communication area size]) |
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| 110 | |
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[0db7c55] | 111 | RTEMS_BSPOPTS_SET([QORIQ_TLB1_ENTRY_COUNT],[qoriq_e6500*],[64]) |
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[f2e6c3e] | 112 | RTEMS_BSPOPTS_SET([QORIQ_TLB1_ENTRY_COUNT],[*],[16]) |
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| 113 | RTEMS_BSPOPTS_HELP([QORIQ_TLB1_ENTRY_COUNT],[TLB1 entry count]) |
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| 114 | |
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[0db7c55] | 115 | RTEMS_BSPOPTS_SET([QORIQ_INITIAL_HID0],[qoriq_e6500*],[0x40000000]) |
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[6a46d99] | 116 | RTEMS_BSPOPTS_SET([QORIQ_INITIAL_HID0],[*],[]) |
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| 117 | RTEMS_BSPOPTS_HELP([QORIQ_INITIAL_HID0],[initial HID0 value (EN_L2MMU_MHD is set by default on the T-series)]) |
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| 118 | |
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[43cc2b4] | 119 | RTEMS_BSPOPTS_SET([QORIQ_INITIAL_MSR],[qoriq_e6500_64*],[0x82002200]) |
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| 120 | RTEMS_BSPOPTS_SET([QORIQ_INITIAL_MSR],[qoriq_e6500_32*],[0x02002200]) |
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[dc0a7df] | 121 | RTEMS_BSPOPTS_SET([QORIQ_INITIAL_MSR],[*],[0x02000200]) |
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| 122 | RTEMS_BSPOPTS_HELP([QORIQ_INITIAL_MSR],[initial MSR value]) |
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| 123 | |
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[0db7c55] | 124 | RTEMS_BSPOPTS_SET([QORIQ_INITIAL_SPEFSCR],[qoriq_e6500*],[]) |
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[dc0a7df] | 125 | RTEMS_BSPOPTS_SET([QORIQ_INITIAL_SPEFSCR],[*],[0x00000000]) |
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| 126 | RTEMS_BSPOPTS_HELP([QORIQ_INITIAL_SPEFSCR],[initial SPEFSCR value]) |
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| 127 | |
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[0db7c55] | 128 | RTEMS_BSPOPTS_SET([QORIQ_INITIAL_BUCSR],[qoriq_e6500*],[0x01400201]) |
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[3e02a47] | 129 | RTEMS_BSPOPTS_SET([QORIQ_INITIAL_BUCSR],[*],[]) |
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| 130 | RTEMS_BSPOPTS_HELP([QORIQ_INITIAL_BUCSR],[initial BUCSR value]) |
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| 131 | |
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[0db7c55] | 132 | RTEMS_BSPOPTS_SET([QORIQ_MMU_DEVICE_MAS7],[qoriq_e6500*],[0xf]) |
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[0e05095a] | 133 | RTEMS_BSPOPTS_SET([QORIQ_MMU_DEVICE_MAS7],[*],[0x0]) |
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| 134 | RTEMS_BSPOPTS_HELP([QORIQ_MMU_DEVICE_MAS7],[MAS7 value for device TLB1 entries]) |
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| 135 | |
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[0db7c55] | 136 | RTEMS_BSPOPTS_SET([QORIQ_HAS_HYPERVISOR_MODE],[qoriq_e6500*],[1]) |
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[a12724f9] | 137 | RTEMS_BSPOPTS_SET([QORIQ_HAS_HYPERVISOR_MODE],[*],[]) |
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| 138 | RTEMS_BSPOPTS_HELP([QORIQ_HAS_HYPERVISOR_MODE],[defined if the processor core has a hypervisor mode]) |
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| 139 | |
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[dc0a7df] | 140 | RTEMS_BSPOPTS_SET([QORIQ_CLOCK_TIMER],[qoriq_core_1],[4]) |
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| 141 | RTEMS_BSPOPTS_SET([QORIQ_CLOCK_TIMER],[*],[0]) |
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| 142 | RTEMS_BSPOPTS_HELP([QORIQ_CLOCK_TIMER],[global timer used for system clock, 0..3 maps to A0..A3, and 4..7 maps to B0..B3]) |
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| 143 | |
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[75acd9e] | 144 | RTEMS_BSPOPTS_SET([QORIQ_CLOCK_TIMECOUNTER],[qoriq_core_1],[5]) |
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| 145 | RTEMS_BSPOPTS_SET([QORIQ_CLOCK_TIMECOUNTER],[*],[1]) |
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| 146 | RTEMS_BSPOPTS_HELP([QORIQ_CLOCK_TIMECOUNTER],[global timer used for the timecounter, 0..3 maps to A0..A3, and 4..7 maps to B0..B3]) |
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| 147 | |
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[8966e8a] | 148 | RTEMS_BSPOPTS_SET([QORIQ_CHIP_NUMBER],[qoriq_e6500*],[0]) |
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| 149 | RTEMS_BSPOPTS_SET([QORIQ_CHIP_NUMBER],[*],[1020]) |
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| 150 | RTEMS_BSPOPTS_HELP([QORIQ_CHIP_NUMBER],[chip number, e.g. 1020, 2040, 2080, 4240]) |
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| 151 | |
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| 152 | RTEMS_BSPOPTS_SET([QORIQ_CHIP_SERIES],[qoriq_e6500*],[\'T\']) |
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| 153 | RTEMS_BSPOPTS_SET([QORIQ_CHIP_SERIES],[*],[\'P\']) |
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| 154 | RTEMS_BSPOPTS_HELP([QORIQ_CHIP_SERIES],[chip series, e.g. 'P' or 'T']) |
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[f2e6c3e] | 155 | |
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[0db7c55] | 156 | RTEMS_BSPOPTS_SET([QORIQ_BUS_CLOCK_DIVIDER],[qoriq_e6500*],[2]) |
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[f2e6c3e] | 157 | RTEMS_BSPOPTS_SET([QORIQ_BUS_CLOCK_DIVIDER],[*],[1]) |
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| 158 | RTEMS_BSPOPTS_HELP([QORIQ_BUS_CLOCK_DIVIDER],[divider of the platform clock to get the clock most on-chip peripherals]) |
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| 159 | |
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[dc0a7df] | 160 | RTEMS_CHECK_NETWORKING |
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| 161 | AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes") |
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| 162 | |
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[bd39add] | 163 | RTEMS_CHECK_SMP |
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| 164 | AM_CONDITIONAL(HAS_SMP,[test "$rtems_cv_HAS_SMP" = "yes"]) |
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| 165 | |
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[dc0a7df] | 166 | RTEMS_BSP_CLEANUP_OPTIONS(0, 0) |
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| 167 | RTEMS_PPC_EXCEPTIONS |
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| 168 | RTEMS_BSP_LINKCMDS |
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| 169 | |
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| 170 | AC_CONFIG_FILES([Makefile]) |
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| 171 | AC_OUTPUT |
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