1 | /** |
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2 | * @file |
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3 | * |
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4 | * @ingroup QorIQ |
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5 | * |
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6 | * @brief QorIQ clock configuration. |
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7 | */ |
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8 | |
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9 | /* |
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10 | * Copyright (c) 2011-2012 embedded brains GmbH. All rights reserved. |
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11 | * |
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12 | * embedded brains GmbH |
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13 | * Obere Lagerstr. 30 |
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14 | * 82178 Puchheim |
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15 | * Germany |
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16 | * <rtems@embedded-brains.de> |
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17 | * |
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18 | * The license and distribution terms for this file may be |
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19 | * found in the file LICENSE in this distribution or at |
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20 | * http://www.rtems.com/license/LICENSE. |
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21 | */ |
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22 | |
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23 | #include <libcpu/powerpc-utility.h> |
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24 | |
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25 | #include <bsp.h> |
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26 | #include <bsp/qoriq.h> |
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27 | #include <bsp/irq.h> |
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28 | |
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29 | /* This is defined in clockdrv_shell.h */ |
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30 | static rtems_isr Clock_isr(void *arg); |
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31 | |
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32 | static uint32_t qoriq_clock_nanoseconds_per_timer_tick; |
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33 | |
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34 | static volatile qoriq_pic_global_timer *const qoriq_clock = |
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35 | #if QORIQ_CLOCK_TIMER < 4 |
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36 | &qoriq.pic.gta [QORIQ_CLOCK_TIMER]; |
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37 | #else |
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38 | &qoriq.pic.gtb [QORIQ_CLOCK_TIMER - 4]; |
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39 | #endif |
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40 | |
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41 | #define CLOCK_INTERRUPT (QORIQ_IRQ_GT_BASE + QORIQ_CLOCK_TIMER) |
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42 | |
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43 | static void qoriq_clock_handler_install(rtems_isr_entry *old_isr) |
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44 | { |
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45 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
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46 | |
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47 | *old_isr = NULL; |
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48 | |
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49 | sc = qoriq_pic_set_affinity( |
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50 | CLOCK_INTERRUPT, |
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51 | ppc_processor_id() |
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52 | ); |
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53 | if (sc != RTEMS_SUCCESSFUL) { |
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54 | rtems_fatal_error_occurred(0xdeadbeef); |
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55 | } |
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56 | |
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57 | sc = qoriq_pic_set_priority( |
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58 | CLOCK_INTERRUPT, |
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59 | QORIQ_PIC_PRIORITY_LOWEST, |
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60 | NULL |
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61 | ); |
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62 | if (sc != RTEMS_SUCCESSFUL) { |
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63 | rtems_fatal_error_occurred(0xdeadbeef); |
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64 | } |
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65 | |
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66 | sc = rtems_interrupt_handler_install( |
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67 | CLOCK_INTERRUPT, |
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68 | "Clock", |
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69 | RTEMS_INTERRUPT_UNIQUE, |
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70 | Clock_isr, |
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71 | NULL |
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72 | ); |
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73 | if (sc != RTEMS_SUCCESSFUL) { |
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74 | rtems_fatal_error_occurred(0xdeadbeef); |
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75 | } |
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76 | } |
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77 | |
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78 | static void qoriq_clock_initialize(void) |
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79 | { |
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80 | uint32_t timer_frequency = BSP_bus_frequency / 8; |
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81 | uint32_t nanoseconds_per_second = 1000000000; |
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82 | uint32_t interval = (uint32_t) (((uint64_t) timer_frequency |
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83 | * (uint64_t) rtems_configuration_get_microseconds_per_tick()) / 1000000); |
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84 | |
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85 | qoriq_clock_nanoseconds_per_timer_tick = |
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86 | nanoseconds_per_second / timer_frequency; |
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87 | |
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88 | qoriq_clock->bcr = GTBCR_COUNT(interval); |
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89 | } |
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90 | |
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91 | static void qoriq_clock_cleanup(void) |
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92 | { |
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93 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
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94 | |
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95 | qoriq_clock->bcr = GTBCR_CI; |
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96 | |
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97 | sc = rtems_interrupt_handler_remove( |
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98 | CLOCK_INTERRUPT, |
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99 | Clock_isr, |
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100 | NULL |
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101 | ); |
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102 | if (sc != RTEMS_SUCCESSFUL) { |
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103 | rtems_fatal_error_occurred(0xdeadbeef); |
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104 | } |
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105 | } |
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106 | |
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107 | static uint32_t qoriq_clock_nanoseconds_since_last_tick(void) |
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108 | { |
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109 | uint32_t current = GTCCR_COUNT_GET(qoriq_clock->ccr); |
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110 | uint32_t base = qoriq_clock->bcr; |
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111 | |
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112 | return (base - current) * qoriq_clock_nanoseconds_per_timer_tick; |
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113 | } |
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114 | |
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115 | #define Clock_driver_support_at_tick() |
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116 | #define Clock_driver_support_initialize_hardware() \ |
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117 | qoriq_clock_initialize() |
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118 | #define Clock_driver_support_install_isr(clock_isr, old_isr) \ |
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119 | qoriq_clock_handler_install(&old_isr) |
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120 | #define Clock_driver_support_shutdown_hardware() \ |
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121 | qoriq_clock_cleanup() |
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122 | #define Clock_driver_nanoseconds_since_last_tick \ |
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123 | qoriq_clock_nanoseconds_since_last_tick |
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124 | |
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125 | /* Include shared source clock driver code */ |
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126 | #include "../../../shared/clockdrv_shell.h" |
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