1 | /* |
---|
2 | * This set of routines starts the application. It includes application, |
---|
3 | * board, and monitor specific initialization and configuration. |
---|
4 | * The generic CPU dependent initialization has been performed |
---|
5 | * before any of these are invoked. |
---|
6 | * |
---|
7 | * COPYRIGHT (c) 1989-2008. |
---|
8 | * On-Line Applications Research Corporation (OAR). |
---|
9 | * |
---|
10 | * The license and distribution terms for this file may be |
---|
11 | * found in the file LICENSE in this distribution or at |
---|
12 | * http://www.rtems.com/license/LICENSE. |
---|
13 | * |
---|
14 | * $Id$ |
---|
15 | */ |
---|
16 | |
---|
17 | #include <string.h> |
---|
18 | #include <fcntl.h> |
---|
19 | |
---|
20 | #include <libcpu/bat.h> |
---|
21 | #include <libcpu/spr.h> |
---|
22 | #include <libcpu/powerpc-utility.h> |
---|
23 | |
---|
24 | #include <bsp.h> |
---|
25 | #include <bsp/irq.h> |
---|
26 | #include <bsp/vectors.h> |
---|
27 | #include <bsp/bootcard.h> |
---|
28 | #include <bsp/irq-generic.h> |
---|
29 | |
---|
30 | /* |
---|
31 | * CPU Bus Frequency |
---|
32 | */ |
---|
33 | unsigned int BSP_bus_frequency; |
---|
34 | |
---|
35 | /* Configuration parameter for clock driver */ |
---|
36 | uint32_t bsp_time_base_frequency; |
---|
37 | |
---|
38 | /* Legacy */ |
---|
39 | uint32_t bsp_clicks_per_usec; |
---|
40 | |
---|
41 | /* |
---|
42 | * Memory on this board. |
---|
43 | */ |
---|
44 | extern char RamSize[]; |
---|
45 | extern char bsp_interrupt_stack_start[]; |
---|
46 | extern char bsp_interrupt_stack_end[]; |
---|
47 | extern char bsp_interrupt_stack_size[]; |
---|
48 | uint32_t BSP_mem_size = (uint32_t)RamSize; |
---|
49 | |
---|
50 | /* Default decrementer exception handler */ |
---|
51 | static int default_decrementer_exception_handler( BSP_Exception_frame *frame, unsigned number) |
---|
52 | { |
---|
53 | ppc_set_decrementer_register(UINT32_MAX); |
---|
54 | |
---|
55 | return 0; |
---|
56 | } |
---|
57 | |
---|
58 | /* |
---|
59 | * bsp_start |
---|
60 | * |
---|
61 | * This routine does the bulk of the system initialization. |
---|
62 | */ |
---|
63 | |
---|
64 | void bsp_start( void ) |
---|
65 | { |
---|
66 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
---|
67 | uintptr_t intrStackStart; |
---|
68 | uintptr_t intrStackSize; |
---|
69 | |
---|
70 | /* |
---|
71 | * Note we can not get CPU identification dynamically, so |
---|
72 | * force current_ppc_cpu. |
---|
73 | */ |
---|
74 | current_ppc_cpu = PPC_PSIM; |
---|
75 | |
---|
76 | /* |
---|
77 | * initialize the device driver parameters |
---|
78 | * assume we are running with 20MHz bus |
---|
79 | * this should speed up some tests :-) |
---|
80 | */ |
---|
81 | BSP_bus_frequency = 20; |
---|
82 | bsp_time_base_frequency = 20000000; |
---|
83 | bsp_clicks_per_usec = BSP_bus_frequency; |
---|
84 | |
---|
85 | /* |
---|
86 | * Initialize the interrupt related settings. |
---|
87 | */ |
---|
88 | intrStackStart = (uintptr_t) bsp_interrupt_stack_start; |
---|
89 | intrStackSize = (uintptr_t) bsp_interrupt_stack_size; |
---|
90 | |
---|
91 | BSP_mem_size = (uint32_t )RamSize; |
---|
92 | |
---|
93 | /* |
---|
94 | * Initialize default raw exception handlers. |
---|
95 | */ |
---|
96 | sc = ppc_exc_initialize( |
---|
97 | PPC_INTERRUPT_DISABLE_MASK_DEFAULT, |
---|
98 | intrStackStart, |
---|
99 | intrStackSize |
---|
100 | ); |
---|
101 | if (sc != RTEMS_SUCCESSFUL) { |
---|
102 | BSP_panic("cannot initialize exceptions"); |
---|
103 | } |
---|
104 | |
---|
105 | /* Install default handler for the decrementer exception */ |
---|
106 | sc = ppc_exc_set_handler( ASM_DEC_VECTOR, default_decrementer_exception_handler); |
---|
107 | if (sc != RTEMS_SUCCESSFUL) { |
---|
108 | BSP_panic("cannot install decrementer exception handler"); |
---|
109 | } |
---|
110 | |
---|
111 | /* Initalize interrupt support */ |
---|
112 | sc = bsp_interrupt_initialize(); |
---|
113 | if (sc != RTEMS_SUCCESSFUL) { |
---|
114 | BSP_panic("cannot intitialize interrupts"); |
---|
115 | } |
---|
116 | |
---|
117 | #if 0 |
---|
118 | /* |
---|
119 | * Setup BATs and enable MMU |
---|
120 | */ |
---|
121 | /* Memory */ |
---|
122 | setdbat(0, 0x0<<24, 0x0<<24, 2<<24, _PAGE_RW); |
---|
123 | setibat(0, 0x0<<24, 0x0<<24, 2<<24, 0); |
---|
124 | /* PCI */ |
---|
125 | setdbat(1, 0x8<<24, 0x8<<24, 1<<24, IO_PAGE); |
---|
126 | setdbat(2, 0xc<<24, 0xc<<24, 1<<24, IO_PAGE); |
---|
127 | |
---|
128 | _write_MSR(_read_MSR() | MSR_DR | MSR_IR); |
---|
129 | __asm__ volatile("sync; isync"); |
---|
130 | #endif |
---|
131 | } |
---|